公开(公告)号：US09122593B2

公开(公告)日：2015-09-01

申请号：US14599725

申请日：2015-01-19

Applicant: Seagate Technology LLC

Inventor： Ryan James Goss ,  David Scott Seekins ,  Mark Allen Gaertner

IPC: G06F12/00 ,  G06F12/02

CPC classification number: G06F12/0261 ,  G06F12/0246 ,  G06F2212/702 ,  G06F2212/7205

Abstract: Method and apparatus for managing a memory, such as but not limited to a flash memory. In accordance with some embodiments, initial state information is stored which identifies an actual state of a garbage collection unit (GCU) of a memory during a normal operational mode. During a restoration mode after a memory power cycle event, a virtualized state of the GCU is determined responsive to the initial state information and to data read from the GCU. The memory is transitioned from the restoration mode to the normal operational mode once the virtualized state for the GCU is determined.

公开(公告)号：US09105360B2

公开(公告)日：2015-08-11

申请号：US13789123

申请日：2013-03-07

Applicant: Seagate Technology LLC

Inventor： Ryan James Goss ,  Mark Allen Gaertner ,  Antoine Khoueir ,  David Scott Ebsen ,  Jon D. Trantham

IPC: G06F12/00 ,  G11C29/50 ,  G06F11/10 ,  G11C13/00

CPC classification number: G11C29/50008 ,  G06F11/10 ,  G06F11/1012 ,  G11C13/00 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2013/0083 ,  G11C2013/0092

Abstract: An incremental signal is defined that includes at least one of a duration and a peak voltage that is less than a respective minimum programming time or minimum programming voltage step of a resistive memory element. A characterization procedure is repeatedly performed that at least involves: applying a signal to the memory element, the signal being incremented by the incremental signal during each subsequent application; measuring a first resistance of the memory element in response to the signal; and c) measuring a second resistance of the memory element after a time period has elapsed from the measurement of the first resistance with no programming signal applied. In response to the first and second resistance measurements of the characterization procedure, a characterization parameter of the memory element is formed.

Abstract translation: 定义增量信号，其包括持续时间和峰值电压中的至少一个小于电阻式存储器元件的相应的最小编程时间或最小编程电压阶跃。 重复执行表征过程，其至少包括：将信号施加到存储元件，在每个随后的应用期间，信号由增量信号递增; 响应于所述信号测量所述存储元件的第一电阻; 以及c）在没有施加编程信号的第一电阻的测量经过一段时间之后测量存储元件的第二电阻。 响应于表征过程的第一和第二电阻测量，形成存储元件的表征参数。

公开(公告)号：US09025359B2

公开(公告)日：2015-05-05

申请号：US13761301

申请日：2013-02-07

Applicant: Seagate Technology LLC

Inventor： Ara Patapoutian ,  Antoine Khoueir ,  Ryan James Goss ,  Jon D. Trantham

IPC: G11C13/00

Abstract: Data is written to cells of a resistance-based, non-volatile memory. An activity metric is tracked since the writing of the data to the cells. In response to the activity metric satisfying a threshold, a bias signal is applied to the cells to reverse a resistance shift of the cells.

公开(公告)号：US20150074486A1

公开(公告)日：2015-03-12

申请号：US14025277

申请日：2013-09-12

Applicant: Seagate Technology LLC

Inventor： Mark Allen Gaertner ,  Bruce Douglas Buch ,  Ryan James Goss

IPC: G06F11/10 ,  G06F12/02

CPC classification number: G06F11/1068 ,  G06F11/1048 ,  G06F12/0246 ,  G06F2212/7203 ,  G06F2212/7207

Abstract: Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, a non-volatile memory is arranged into a plurality of blocks, with each of the blocks constituting an integral plural number N of fixed-sized, multi-bit transfer units. A processing circuit retrieves at least a portion of the data stored in a selected block to a volatile memory buffer in response to a transfer unit (TU) bit map. The TU bit map is stored in a memory and provides a multi-bit sequence of bits corresponding to the N transfer units of the selected block. The values of the bits in the multi-bit sequence of bits indicate whether the corresponding transfer units are to be retrieved.

Abstract translation: 用于管理诸如闪存之类的存储器中的数据的方法和装置。 根据一些实施例，非易失性存储器被布置成多个块，其中每个块构成固定大小的多位传输单元的整数个数量N。 处理电路响应于传送单元（TU）位图，将存储在所选块中的数据的至少一部分检索到易失性存储器缓冲器。 TU位图被存储在存储器中并且提供与所选块的N个传送单元相对应的位的多位序列。 多比特序列中的比特值表示是否检索相应的传送单元。

公开(公告)号：US20140244896A1

公开(公告)日：2014-08-28

申请号：US13777810

申请日：2013-02-26

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Ryan James Goss ,  David Scott Ebsen ,  Mark Allen Gaertner ,  Michael Joseph Steiner ,  Antoine Khoueir

IPC: G06F3/06

CPC classification number: G06F3/067 ,  G06F3/0611 ,  G06F3/0619 ,  G06F3/0649 ,  G06F3/0685

Abstract: Method and apparatus for managing data in a cloud computing environment. In accordance with some embodiments, data updates are received to a multi-tier memory structure across a cloud network and stored as working data in an upper rewritable non-volatile memory tier of the memory structure. The working data are periodically logged to a lower non-volatile memory tier in the memory structure while a current version of the working data remain in the upper memory tier. The upper and lower memory tiers each are formed of rewritable memory cells having different constructions and storage attributes.

Abstract translation: 用于在云计算环境中管理数据的方法和装置。 根据一些实施例，数据更新被接收到跨云网络的多层存储器结构，并作为工作数据存储在存储器结构的上部可重写非易失性存储器层中。 工作数据被定期地记录到存储器结构中的较低的非易失性存储器层，而当前版本的工作数据保留在上层存储器层中。 上层和下层记忆层每个由具有不同构造和存储属性的可重写存储单元形成。

公开(公告)号：US20140129891A1

公开(公告)日：2014-05-08

申请号：US14154859

申请日：2014-01-14

Applicant: Seagate Technology LLC

Inventor： Navneeth Kankani ,  Mark Allen Gaertner ,  Rodney Virgil Bowman ,  Ryan James Goss ,  David Scott Seekins ,  Tong Shirh Stone

IPC: G06F11/10

CPC classification number: G06F11/102 ,  G06F11/1012 ,  G11C29/52

Abstract: A first data set is written to first memory units identified as having a higher data reliability and a second data set is written to second memory units identified as having a lower data reliability than the first memory units. In some cases, the second data set may include metadata or redundancy information that is useful to aid in reading and/or decoding the first data set. The act of writing the second data set increases the data reliability of the first data set. The second data set may be a null pattern, such as all erased bits.

Abstract translation: 将第一数据集写入被识别为具有较高数据可靠性的第一存储器单元，并且将第二数据组写入被识别为具有比第一存储器单元更低的数据可靠性的第二存储器单元。 在一些情况下，第二数据集可以包括有助于读取和/或解码第一数据集的元数据或冗余信息。 写入第二数据集的动作增加了第一数据集的数据可靠性。 第二数据集可以是空模式，例如所有擦除位。

公开(公告)号：US11848055B2

公开(公告)日：2023-12-19

申请号：US17406346

申请日：2021-08-19

Applicant: Seagate Technology LLC

Inventor： Ryan James Goss

IPC: G11C16/16 ,  G11C16/08 ,  G11C16/30 ,  G11C16/28

CPC classification number: G11C16/16 ,  G11C16/08 ,  G11C16/28 ,  G11C16/30

Abstract: A solid-state memory may have many non-individually erasable memory cells arranged into dies with each die having a first plane and a second plane. Receipt of a single read command from a host connected to the solid-state memory can prompt generation of a first reference voltage and a second reference voltage by the controller to produce asynchronous data retrieval. The reference voltages can be different and selected by the controller to induce a predetermined delay between retrieval of data from the first plane and retrieval of data from the second plane from the single read command. Passage of each reference voltage concurrently to a common single data address of the first plane and the second plane may produce asynchronous retrieval of data from the respective first plane and second plane.

公开(公告)号：US11726921B2

公开(公告)日：2023-08-15

申请号：US15929775

申请日：2020-05-21

Applicant: Seagate Technology LLC

Inventor： Ryan James Goss ,  Daniel John Benjamin ,  David W. Claude ,  Graham David Ferris ,  Ryan Charles Weidemann

IPC: G06F12/1009

CPC classification number: G06F12/1009 ,  G06F2212/657

Abstract: Apparatus and method for managing metadata in a data storage device such as a solid-state drive (SSD). The metadata are stored in combined (combo) pages in a non-volatile memory (NVM) each having first and second level map entries. The second level map entries provide a logical-to-physical address translation layer for user data blocks stored to the NVM, and the first level map entries describe the second level map entries in the combo page. A global map structure is accessed to identify a selected combo page in the NVM associated with a pending access command. The first and second level map entries are retrieved from the combo page, and the second level map entries are used to identify a target location for the transfer of user data blocks to or from the NVM.

公开(公告)号：US11307806B2

公开(公告)日：2022-04-19

申请号：US16936348

申请日：2020-07-22

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Shuhei Tanakamaru ,  Ryan James Goss ,  Dana Lynn Simonson ,  Erich Franz Haratsch

IPC: G06F3/06

Abstract: Improving performance in solid state devices (SSDs) by controlling or throttling the depth of the request queue. In one implementation, a method includes monitoring a request queue in a solid state device (an SSD), the request queue comprising a first request and a second request having an actual time interval therebetween, determining a queue depth for the request queue, determining a target interval based on the queue depth and a target queue depth, and responsive to the actual time interval being less than the target interval, delaying acting on the second request until after the target interval.

公开(公告)号：US20210182192A1

公开(公告)日：2021-06-17

申请号：US16714121

申请日：2019-12-13

Applicant: Seagate Technology LLC

Inventor： Daniel John Benjamin ,  Ryan Charles Weidemann ,  Ryan James Goss ,  David W. Claude ,  Graham David Ferris

IPC: G06F12/0804 ,  G06F12/02 ,  G06F12/10

Abstract: Method and apparatus for enhancing power cycle performance of a storage device, such as a solid-state drive (SSD). In some embodiments, map data that describe the contents of a non-volatile memory (NVM) are arranged as snapshots and intervening journal updates. During a scram interval in which the storage device transitions to a powered down condition, the snapshots and journal updates for primary segments with high client interest are updated prior to storage to the NVM. During a reinitialization interval in which the storage device transitions to a powered up condition, the updated primary segments are loaded, after which the storage device provides the client device with an operationally ready notification. Remaining secondary segments are updated and loaded after the notification. The primary segments are identified based on a detected workload from the client device. Configuration changes can further be made based on the detected workload.