公开(公告)号：US09087745B2

公开(公告)日：2015-07-21

申请号：US13346118

申请日：2012-01-09

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L21/00 ,  H01L27/12 ,  H01L29/786

CPC分类号： H01L29/66969 ,  H01L21/46 ,  H01L27/1225 ,  H01L29/7869

摘要： It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

摘要翻译： 本发明的目的是提供一种包括具有良好的电性能和高可靠性的薄膜晶体管的半导体器件，以及一种以高生产率制造半导体器件的方法。 在倒置交错（底栅极）薄膜晶体管中，使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且在半导体层和源之间设置使用金属氧化物层形成的缓冲层， 漏电极层。 有意地提供金属氧化物层作为半导体层与源极和漏极电极层之间的缓冲层，从而获得欧姆接触。

公开(公告)号：US08841710B2

公开(公告)日：2014-09-23

申请号：US13546345

申请日：2012-07-11

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L29/76 ,  H01L29/49 ,  H01L29/786 ,  H01L29/45 ,  H01L21/02 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/016 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/15 ,  H01L27/3225 ,  H01L27/3241 ,  H01L27/3248 ,  H01L27/3258 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/786 ,  H01L29/78618

摘要： In an active matrix display device, electric characteristics of thin film transistors included in a circuit are important, and performance of the display device depends on the electric characteristics. Thus, by using an oxide semiconductor film including In, Ga, and Zn for an inverted staggered thin film transistor, variation in electric characteristics of the thin film transistor can be reduced. Three layers of a gate insulating film, an oxide semiconductor layer and a channel protective layer are successively formed by a sputtering method without being exposed to air. Further, in the oxide semiconductor layer, the thickness of a region overlapping with the channel protective film is larger than that of a region in contact with a conductive film.

摘要翻译： 在有源矩阵显示装置中，包括在电路中的薄膜晶体管的电特性是重要的，显示装置的性能取决于电特性。 因此，通过使用包括In，Ga和Zn的氧化物半导体膜用于反向交错薄膜晶体管，可以降低薄膜晶体管的电特性的变化。 通过溅射法连续地形成三层栅极绝缘膜，氧化物半导体层和沟道保护层，而不暴露于空气。 此外，在氧化物半导体层中，与沟道保护膜重叠的区域的厚度大于与导电膜接触的区域的厚度。

公开(公告)号：US08785242B2

公开(公告)日：2014-07-22

申请号：US13230905

申请日：2011-09-13

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Akiharu Miyanaga ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Akiharu Miyanaga ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L21/34

CPC分类号： H01L29/66772 ,  H01L29/6675 ,  H01L29/78618 ,  H01L29/7869

摘要： An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

摘要翻译： 一个实施例是包括交错（顶栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。

公开(公告)号：US08772773B2

公开(公告)日：2014-07-08

申请号：US12553122

申请日：2009-09-03

申请人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Tomoya Futamura ,  Takahiro Kasahara

发明人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Tomoya Futamura ,  Takahiro Kasahara

IPC分类号： H01L29/04 ,  H01L27/12 ,  H01L29/786

摘要： A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.

公开(公告)号：US08704216B2

公开(公告)日：2014-04-22

申请号：US12706737

申请日：2010-02-17

申请人： Hiromichi Godo ,  Kengo Akimoto ,  Shunpei Yamazaki

发明人： Hiromichi Godo ,  Kengo Akimoto ,  Shunpei Yamazaki

IPC分类号： H01L29/786

CPC分类号： H01L29/78693 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02573 ,  H01L21/02631 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

摘要： An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced.

摘要翻译： 目的是为了减小阈值电压的变化，以稳定每个使用氧化物半导体层的薄膜晶体管的电特性。 目的是减少关断电流。 使用氧化物半导体层的薄膜晶体管通过在氧化物半导体层上层叠含有绝缘氧化物的氧化物半导体层而形成，使得氧化物半导体层和源极和漏极电极层彼此接触，氧化物半导体层包含绝缘体 介于其间的氧化物; 从而可以减小薄膜晶体管的阈值电压的变化，从而能够稳定电特性。 此外，可以减少截止电流。

公开(公告)号：US08502216B2

公开(公告)日：2013-08-06

申请号：US12612700

申请日：2009-11-05

申请人： Kengo Akimoto ,  Shunpei Yamazaki

发明人： Kengo Akimoto ,  Shunpei Yamazaki

IPC分类号： H01L29/26

CPC分类号： H01L29/66742 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

摘要： An object is to prevent an impurity such as moisture and oxygen from being mixed into an oxide semiconductor and suppress variation in semiconductor characteristics of a semiconductor device in which an oxide semiconductor is used. Another object is to provide a semiconductor device with high reliability. A gate insulating film provided over a substrate having an insulating surface, a source and a drain electrode which are provided over the gate insulating film, a first oxide semiconductor layer provided over the source electrode and the drain electrode, and a source and a drain region which are provided between the source electrode and the drain electrode and the first oxide semiconductor layer are provided. A barrier film is provided in contact with the first oxide semiconductor layer.

摘要翻译： 本发明的目的是防止诸如水分和氧气的杂质混入氧化物半导体中并抑制其中使用氧化物半导体的半导体器件的半导体特性的变化。 另一个目的是提供一种具有高可靠性的半导体器件。 提供在具有绝缘表面的衬底上的栅极绝缘膜，设置在栅极绝缘膜上的源极和漏极，设置在源电极和漏极上的第一氧化物半导体层，以及源极和漏极区 设置在源电极和漏电极之间以及第一氧化物半导体层。 提供与第一氧化物半导体层接触的阻挡膜。

公开(公告)号：US08481363B2

公开(公告)日：2013-07-09

申请号：US13227585

申请日：2011-09-08

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L21/34

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity. The semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layer.

摘要翻译： 该半导体器件包括薄膜晶体管，该薄膜晶体管包括栅极电极层，栅极电极层上的栅极绝缘层，栅极绝缘层上的源极电极层和漏极电极层，源电极层上的缓冲层和 漏极电极层和缓冲层上的半导体层。 与栅电极层重叠的半导体层的一部分与栅极绝缘层相接触并且设置在源极电极层和漏极电极层之间。 半导体层是含有铟，镓和锌的氧化物半导体层。 缓冲层含有具有n型导电性的金属氧化物。 半导体层和源极和漏极电极层通过缓冲层彼此电连接。

公开(公告)号：US08344372B2

公开(公告)日：2013-01-01

申请号：US12570498

申请日：2009-09-30

申请人： Shunpei Yamazaki ,  Kengo Akimoto ,  Atsushi Umezaki

发明人： Shunpei Yamazaki ,  Kengo Akimoto ,  Atsushi Umezaki

IPC分类号： H01L29/786 ,  H01L21/44

CPC分类号： H01L27/124 ,  G09G3/3233 ,  G09G2310/0286 ,  G09G2310/0297 ,  H01L21/02565 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/12 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518

摘要： With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. The increase in the numbers of gate lines and signal lines makes it difficult to mount an IC chip having a driver circuit for driving the gate line and the signal line by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit driving the pixel portion are provided over the same substrate. The pixel portion and at least a part of the driver circuit are formed using thin film transistors in each of which an oxide semiconductor is used. Both the pixel portion and the driver circuit are provided over the same substrate, whereby manufacturing costs are reduced.

摘要翻译： 随着显示装置的定义的增加，像素的数量增加，因此栅极线和信号线的数量增加。 栅极线和信号线的数量的增加使得难以安装具有用于通过接合等驱动栅极线和信号线的驱动电路的IC芯片，这导致制造成本的增加。 驱动像素部的像素部和驱动电路设置在同一基板上。 像素部分和驱动电路的至少一部分使用薄膜晶体管形成，其中每个使用氧化物半导体。 像素部分和驱动电路均设置在相同的基板上，由此降低了制造成本。

公开(公告)号：US08334540B2

公开(公告)日：2012-12-18

申请号：US13173559

申请日：2011-06-30

申请人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Tomoya Futamura ,  Takahiro Kasahara

发明人： Shunpei Yamazaki ,  Kengo Akimoto ,  Shigeki Komori ,  Hideki Uochi ,  Tomoya Futamura ,  Takahiro Kasahara

IPC分类号： H01L29/04

CPC分类号： H01L29/7869 ,  H01L27/0266 ,  H01L27/1225 ,  H01L27/124

摘要： The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.

摘要翻译： 保护电路使用非线性元件形成，该非线性元件包括覆盖栅电极的栅极绝缘膜; 第一布线层和第二布线层，其在栅极绝缘膜上方并且其端部与栅电极重叠; 以及氧化物半导体层，其在所述栅电极的上方并与所述栅极绝缘膜和所述第一布线层和所述第二布线层的端部接触。 非线性元件的栅电极和扫描线或信号线包括在布线中，非线性元件的第一或第二布线层直接连接到布线，以施加栅极的电位 电极。

公开(公告)号：US08030663B2

公开(公告)日：2011-10-04

申请号：US12535712

申请日：2009-08-05

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L29/15 ,  H01L29/22

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A semiconductor device including thin film transistors having high electrical properties and reliability is proposed. Further, a method for manufacturing the semiconductor devices with mass productivity is proposed. The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity. The semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layer.

摘要翻译： 提出了包括具有高电特性和可靠性的薄膜晶体管的半导体器件。 此外，提出了一种以大规模生产率制造半导体器件的方法。 该半导体器件包括薄膜晶体管，该薄膜晶体管包括栅极电极层，栅极电极层上的栅极绝缘层，栅极绝缘层上的源极电极层和漏极电极层，源电极层上的缓冲层和 漏极电极层和缓冲层上的半导体层。 与栅电极层重叠的半导体层的一部分与栅极绝缘层相接触并且设置在源极电极层和漏极电极层之间。 半导体层是含有铟，镓和锌的氧化物半导体层。 缓冲层含有具有n型导电性的金属氧化物。 半导体层和源极和漏极电极层通过缓冲层彼此电连接。