公开(公告)号：US11515274B2

公开(公告)日：2022-11-29

申请号：US16885297

申请日：2020-05-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fang-Yu Liang ,  Hsiu-Jen Lin ,  Kai-Chiang Wu ,  Chih-Chiang Tsao

IPC: H01L23/00 ,  H01L23/538 ,  H01L23/498

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a semiconductor die laterally covered by an insulating encapsulation, a first redistribution structure disposed on the semiconductor die and the insulating encapsulation, a second redistribution structure disposed opposite to the first redistribution structure, and a through insulating via (TIV) penetrating through the insulating encapsulation. The semiconductor die is electrically coupled to the first redistribution structure through the second redistribution structure and the TIV. The first redistribution structure includes a patterned conductive layer covered by a patterned dielectric layer, and under-ball metallurgy (UBM) pattern partially covered by the patterned dielectric layer. A first portion of the UBM pattern physically contacts a via portion of the patterned conductive layer which is tapered toward the UBM pattern, and a second portion of the UBM pattern is connected to the first portion and protruded from the patterned dielectric layer.

公开(公告)号：US11417616B2

公开(公告)日：2022-08-16

申请号：US16924116

申请日：2020-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kai-Chiang Wu ,  Han-Ping Pu ,  Yen-Ping Wang

IPC: H01L23/66 ,  H01L23/498 ,  H01L23/544 ,  H01L21/56 ,  H01L23/31

Abstract: A package structure includes a chip package and an antenna package. The chip package includes at least one semiconductor die and a first insulating encapsulation encapsulating the at least one semiconductor die. The antenna package is located on and electrically coupled to the chip package. The antenna package includes metallic patterns embedded in a second insulating encapsulation, wherein each of the metallic patterns has a first surface, a second surface opposite to the first surface and a side surface connecting the first surface and the second surface, wherein the first surface and the side surface of each of the metallic patterns are covered by the second insulating encapsulation, and the second surface is levelled and coplanar with a third surface of the second insulating encapsulation. A method of manufacturing a package structure is also provided.

公开(公告)号：US11373922B2

公开(公告)日：2022-06-28

申请号：US16993285

申请日：2020-08-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sen-Kuei Hsu ,  Ching-Feng Yang ,  Hsin-Yu Pan ,  Kai-Chiang Wu ,  Yi-Che Chiang

IPC: H01L23/52 ,  H01L23/367 ,  H01L23/00 ,  H01L21/768 ,  H01L23/522 ,  H01L23/538

Abstract: A semiconductor package includes a die, a dummy die, a plurality of conductive terminals, an insulating layer and a plurality of thermal through vias. The dummy die is disposed aside the die. The conductive terminals are disposed at a first side of the dummy die and the die and electrically connected to the dummy die and the die. The insulating layer is disposed at a second side opposite to the first side of the dummy die and the die. The thermal through vias penetrating through the insulating layer.

公开(公告)号：US11348874B2

公开(公告)日：2022-05-31

申请号：US16924130

申请日：2020-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kai-Chiang Wu ,  Chin-Liang Chen ,  Jiun-Yi Wu ,  Yen-Ping Wang

IPC: H01L23/538 ,  H01L25/00 ,  H01L23/31 ,  H01L25/065

Abstract: A semiconductor package includes a redistribution layer structure, a first semiconductor chip, a circuit board structure and an encapsulation layer. The redistribution layer structure has a first side and a second side opposite to the first side. The first semiconductor chip is electrically connected to the first side of the redistribution layer structure. The circuit board structure is electrically connected to the first side of the redistribution layer structure, and the circuit board structure includes a first mask layer having an opening pattern that corresponds to first semiconductor chip. The encapsulation layer laterally encapsulates the circuit board structure and fills in a space between the semiconductor chip and the opening pattern of the first mask layer of the circuit board structure.

公开(公告)号：US11264316B2

公开(公告)日：2022-03-01

申请号：US16513730

申请日：2019-07-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chuei-Tang Wang ,  Chun-Lin Lu ,  Kai-Chiang Wu

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/66 ,  H01L21/56 ,  H01L21/683 ,  H01L21/48 ,  H01L23/31 ,  H01Q1/22 ,  H01Q9/16 ,  H01Q9/04

Abstract: A package structure includes a first RDL structure, a die, an encapsulant, a film, a TIV and a second RDL structure. The die is located over the first RDL structure. The encapsulant laterally encapsulates sidewalls of the die. The film is disposed between the die and the first RDL structure, and between the encapsulant and the first RDL structure. The TIV penetrates through the encapsulant and the film to connect to the first RDL structure. The second RDL structure is disposed on the die, the TIV and the encapsulant and electrically connected to die and the TIV.

公开(公告)号：US11233019B2

公开(公告)日：2022-01-25

申请号：US16893422

申请日：2020-06-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fang-Yu Liang ,  Ching-Feng Yang ,  Kai-Chiang Wu

IPC: H01L21/4763 ,  H01L23/66 ,  H01L23/00 ,  H01L23/538 ,  H01L23/552 ,  H01L23/31 ,  H01L25/16 ,  H01L21/56 ,  H01L21/683 ,  H01L21/3205 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/288 ,  H01L21/321 ,  H01L21/48 ,  H01Q1/40

Abstract: A method including followings is provided. An encapsulated device including a semiconductor die and an insulating encapsulation laterally encapsulating the semiconductor die is provided. An insulating layer is formed over a surface of the encapsulated device. A groove pattern is formed on the insulating layer. A conductive paste is filled in the groove pattern and the conductive paste filled in the groove pattern is cured.

公开(公告)号：US10825773B2

公开(公告)日：2020-11-03

申请号：US16292348

申请日：2019-03-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chun-Lin Lu ,  Han-Ping Pu ,  Kai-Chiang Wu

IPC: H01L23/12 ,  H01L21/00 ,  H01L21/4763 ,  H01L23/48 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L23/528 ,  H01L25/18 ,  H01L21/56

Abstract: A package structure includes an insulating encapsulation, at least one semiconductor die, a redistribution circuit structure, and first reinforcement structures. The at least one semiconductor die is encapsulated in the insulating encapsulation. The redistribution circuit structure is located on the insulating encapsulation and electrically connected to the at least one semiconductor die. The first reinforcement structures are embedded in the redistribution circuit structure. A shape of the package structure includes a polygonal shape on a vertical projection along a stacking direction of the insulating encapsulation and the redistribution circuit structure, and the first reinforcement structures are located on and extended along diagonal lines of the package structure.

公开(公告)号：US20200135669A1

公开(公告)日：2020-04-30

申请号：US16171335

申请日：2018-10-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Fang-Yu Liang ,  Ching-Feng Yang ,  Kai-Chiang Wu

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/00 ,  H01L23/538 ,  H01L23/552 ,  H01L25/16 ,  H01L21/56 ,  H01L21/683 ,  H01L21/3205 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/288 ,  H01L21/321 ,  H01L21/48 ,  H01Q1/40

Abstract: A semiconductor package includes an encapsulated semiconductor device, a first redistribution structure, an insulating layer, and an antenna. The encapsulated semiconductor device includes a semiconductor device encapsulated by an encapsulation material. The redistribution structure is disposed on a first side the encapsulated semiconductor device and electrically connected to the semiconductor device. The insulating layer is disposed on a second side of the encapsulated semiconductor device and comprises a groove pattern. The antenna is filled the groove pattern, wherein an upper surface of the antenna is substantially coplanar with an upper surface of the insulating layer.

公开(公告)号：US20190287819A1

公开(公告)日：2019-09-19

申请号：US16429081

申请日：2019-06-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Nan-Chin Chuang ,  Ching-Feng Yang ,  Kai-Chiang Wu

IPC: H01L21/56 ,  H01L21/762 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538

Abstract: An integrated fan-out package having a multi-band antenna and a method of forming the same are disclosed. An integrated fan-out package includes a semiconductor die, a molding layer and a plurality of through integrated fan-out vias. The molding layer is aside the semiconductor die. The through integrated fan-out vias are through the molding layer and arranged to form a plurality of dipole antennas. At least one of the plurality of dipole antennas includes two dipole arms each having a transmitting strip and a radiating strip connected to the transmitting part, and the radiating strip has a first part, a second part and a filter part between and in contact with the first part and the second part. The cross-sectional area of the filter part is less than the cross-sectional area of the first part or the second part of the radiating strip.

公开(公告)号：US10312112B2

公开(公告)日：2019-06-04

申请号：US15627457

申请日：2017-06-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Nan-Chin Chuang ,  Ching-Feng Yang ,  Kai-Chiang Wu

IPC: H01L23/31 ,  H01L21/76 ,  H01L21/56 ,  H01L23/538 ,  H01L23/00 ,  H01L21/762

Abstract: An integrated fan-out package having a multi-band antenna and a method of forming the same are disclosed. An integrated fan-out package includes a semiconductor die, a molding layer and a plurality of through integrated fan-out vias. The molding layer is aside the semiconductor die. The through integrated fan-out vias are through the molding layer and arranged to form a plurality of dipole antennas. At least one of the plurality of dipole antennas includes two dipole arms each having a transmitting strip and a radiating strip connected to the transmitting part, and the radiating strip has a first part, a second part and a filter part between and in contact with the first part and the second part. The cross-sectional area of the filter part is less than the cross-sectional area of the first part or the second part of the radiating strip.