Secure cache of web session information using web browser cookies
    81.
    发明授权
    Secure cache of web session information using web browser cookies 失效
    使用网络浏览器cookie安全缓存Web会话信息

    公开(公告)号:US07197568B2

    公开(公告)日:2007-03-27

    申请号:US10321411

    申请日:2002-12-17

    Abstract: A secure method and system for accessing a cache for web session is provided using web browser cookies. The cache for the web session data uses an encoded identifier, determined using for example the Keyed-Hash Message Authentication Code, based on information identifying a client. The client communication is accompanied by a cookie (persistent state object) that also includes the identifier encoded in the same manner. This encoded identifier in the received cookie is used for accessing the cached data. Where a secure communication channel is available, such as a secure socket layer (SSL connection), a second cookie which is only transmitted over SSL is used as a signature for the first cookie.

    Abstract translation: 使用Web浏览器cookie提供用于访问Web会话缓存的安全方法和系统。 基于识别客户端的信息,用于web会话数据的缓存使用使用例如密钥哈希消息认证码确定的编码标识符。 客户端通信伴随着一个Cookie(持久状态对象),它也包含以相同方式编码的标识符。 接收到的cookie中的编码标识符用于访问缓存的数据。 在可用的安全通信信道(例如安全套接字层(SSL连接))的情况下,仅通过SSL发送的第二个cookie被用作第一个cookie的签名。

    System and method for providing presence age information in a unified communication system
    82.
    发明申请
    System and method for providing presence age information in a unified communication system 有权
    用于在统一通信系统中提供存在时代信息的系统和方法

    公开(公告)号:US20070067439A1

    公开(公告)日:2007-03-22

    申请号:US11232474

    申请日:2005-09-21

    CPC classification number: H04L67/24 H04L51/04 H04L51/28 H04L67/306

    Abstract: A telecommunications system includes a network; a plurality of client devices operably coupled to said network, said plurality of client devices adapted to set one or more time contact parameters for buddies on a contact list; and a presence server including a timer, and adapted to maintain a timing of time contacts for selected contacts responsive to said parameters.

    Abstract translation: 电信系统包括网络; 多个客户机设备,可操作地耦合到所述网络,所述多个客户端设备适于为联系人列表上的伙伴设置一个或多个时间接触参数; 以及存在服务器,其包括定时器,并且适于响应于所述参数来维持所选择的联系人的时间联系的定时。

    Adaptive catalog page display
    83.
    发明授权
    Adaptive catalog page display 失效
    自适应目录页面显示

    公开(公告)号:US07174508B2

    公开(公告)日:2007-02-06

    申请号:US09998023

    申请日:2001-11-30

    CPC classification number: G06Q30/02 G06F17/30905 G06Q30/0601

    Abstract: Pages are provided in response to a request from a browser received by a server. The server obtains an adapted page, based on a template page, from a display infrastructure. The display infrastructure uses a template page identifier obtained from a resolution component. The resolution component obtains template page identifiers by matching attributes relating to the page request with attributes associated with template page identifiers stored in a database. The template page identifiers are provided based on the best match of the template page attributes and the page request attributes, with default values being used and a defined ranking being used where multiple matched template pages exist.

    Abstract translation: 页面是响应于服务器接收到的浏览器的请求而提供的。 服务器从显示基础设施获取基于模板页面的适配页面。 显示基础架构使用从分辨率组件获取的模板页面标识符。 解析组件通过将与页面请求相关的属性与存储在数据库中的模板页标识符相关联的属性相匹配来获得模板页标识符。 基于模板页面属性和页面请求属性的最佳匹配提供模板页面标识符,其中使用默认值,并且在存在多个匹配的模板页面的情况下使用定义的排名。

    Gift registry management through business contexts in a service oriented architecture
    84.
    发明申请
    Gift registry management through business contexts in a service oriented architecture 审中-公开
    通过面向服务的架构中的业务环境进行礼品注册管理

    公开(公告)号:US20060293967A1

    公开(公告)日:2006-12-28

    申请号:US11168649

    申请日:2005-06-28

    CPC classification number: G06Q30/02 G06Q30/0609 G06Q30/0625 G06Q30/0633

    Abstract: There is provided a method, system and apparatus for managing access to gift registry resources in a service oriented architecture (SOA) architected commerce system. In this regard, a commerce system that has been configured according to an exemplary aspect of the invention can include a gift registry including a set of gift registry resources and business context services logic coupled to authentication logic. The business context services logic can be configured to issue contexts to requesting users for interacting with the gift registry. The gift registry, in turn, can moderate access to the gift registry resources according to the contexts.

    Abstract translation: 提供了一种用于在面向服务的架构(SOA)架构的商业系统中管理对礼品注册表资源的访问的方法,系统和装置。 在这方面,已经根据本发明的示例性方面配置的商业系统可以包括礼物登记册,其包括一组礼物注册资源和耦合到认证逻辑的业务上下文服务逻辑。 可以将业务上下文服务逻辑配置为发出请求用户与礼品注册表进行交互的上下文。 礼品注册表反过来可以根据上下文调节礼品注册表资源的访问。

    Substrate engineering for optimum CMOS device performance

    公开(公告)号:US20060240611A1

    公开(公告)日:2006-10-26

    申请号:US11474774

    申请日:2006-06-26

    CPC classification number: H01L21/823807

    Abstract: An integrated semiconductor structure having different types of complementary metal oxide semiconductor devices (CMOS), i.e., PFETs and NFETs, located atop a semiconductor substrate, wherein each CMOS device is fabricated such that the current flow for each device is optimal is provided. Specifically, the structure includes a semiconductor substrate that has a (110) surface orientation and a notch pointing in a direction of current flow; and at least one PFET and at least one NFET located on the semiconductor substrate. The at least one PFET has a current flow in a direction and the at least one NFET has a current flow in a direction. The direction is perpendicular to the direction. A method of fabricating such as integrated semiconductor structure is also provided.

    STRUCTURE AND METHOD OF APPLYING STRESSES TO PFET AND NFET TRANSISTOR CHANNELS FOR IMPROVED PERFORMANCE
    86.
    发明申请
    STRUCTURE AND METHOD OF APPLYING STRESSES TO PFET AND NFET TRANSISTOR CHANNELS FOR IMPROVED PERFORMANCE 有权
    将应力施加到用于改进性能的PFET和NFET晶体管通道的结构和方法

    公开(公告)号:US20060113568A1

    公开(公告)日:2006-06-01

    申请号:US10904808

    申请日:2004-11-30

    CPC classification number: H01L29/7843 H01L21/823807 H01L29/665

    Abstract: A semiconductor device structure is provided which includes a first semiconductor device; a second semiconductor device; and a unitary stressed film disposed over both the first and second semiconductor devices. The stressed film has a first portion overlying the first semiconductor device, the first portion imparting a first magnitude compressive stress to a conduction channel of the first semiconductor device, the stressed film further having a second portion overlying the second semiconductor device, the second portion not imparting the first magnitude compressive stress to a conduction channel of the second semiconductor device, the second portion including an ion concentration not present in the second portion such that the second portion imparts one of a compressive stress having a magnitude much lower than the first magnitude, zero stress, and a tensile stress to the conduction channel of the second semiconductor device.

    Abstract translation: 提供一种半导体器件结构,其包括第一半导体器件; 第二半导体器件; 以及设置在第一和第二半导体器件两者上的单一应力膜。 应力膜具有覆盖第一半导体器件的第一部分,第一部分向第一半导体器件的导电通道施加第一大小压缩应力,应力膜还具有覆盖第二半导体器件的第二部分,第二部分不 将第一强度压缩应力施加到第二半导体器件的导电通道,第二部分包括不存在于第二部分中的离子浓度,使得第二部分施加具有远低于第一大小的量级的压缩应力之一, 零应力和对第二半导体器件的导电通道的拉伸应力。

    Method and apparatus for writing a non-rectangular frame to a display device
    87.
    发明申请
    Method and apparatus for writing a non-rectangular frame to a display device 审中-公开
    用于将非矩形框架写入显示装置的方法和装置

    公开(公告)号:US20060109285A1

    公开(公告)日:2006-05-25

    申请号:US10996004

    申请日:2004-11-23

    CPC classification number: G09G5/14

    Abstract: The invention is directed to an apparatus and method for writing a non-rectangular frame to a display device and for animating window transitions. The apparatus comprises a memory for storing at least one parameter for defining a first aperture boundary and a data selecting part. The data selecting part is adapted for comparing the associated coordinates of each datum of a first frame to the first boundary, determining if a first condition is true, and processing each first-frame datum for which the condition is true. The method comprises defining a first aperture boundary, comparing the associated coordinates of each datum of a first frame to the first boundary to determine if a first condition is true, and for each first-frame datum for which the condition is true, processing the first-frame datum. By repeatedly selecting image data for processing, the animation of window transitions may be achieved.

    Abstract translation: 本发明涉及一种用于将非矩形框架写入显示装置并用于动画化窗口转换的装置和方法。 该装置包括用于存储用于限定第一孔径边界和数据选择部分的至少一个参数的存储器。 数据选择部分适于将第一帧的每个数据的相关联的坐标与第一边界进行比较,确定第一条件是否为真,以及处理条件为真的每个第一帧数据。 该方法包括定义第一孔径边界,将第一帧的每个数据的相关坐标与第一边界进行比较,以确定第一条件是否为真,以及对于条件为真的每个第一帧数据,处理第一 帧基准 通过重复选择用于处理的图像数据,可以实现窗口转换的动画。

    Increasing carrier mobility in NFET and PFET transistors on a common wafer
    89.
    发明授权
    Increasing carrier mobility in NFET and PFET transistors on a common wafer 有权
    在普通晶圆上增加NFET和PFET晶体管的载流子迁移率

    公开(公告)号:US06939814B2

    公开(公告)日:2005-09-06

    申请号:US10695754

    申请日:2003-10-30

    Abstract: Enhanced carrier mobility in transistors of differing (e.g. complementary) conductivity types is achieved on a common chip by provision of two or more respective stressed layers, such as etch stop layers, overlying the transistors with stress being wholly or partially relieved in portions of the respective layers, preferably by implantations with heavy ions such as germanium, arsenic, xenon, indium, antimony, silicon, nitrogen oxygen or carbon in accordance with a block-out mask. The distribution and small size of individual areas of such stressed structures also prevents warping or curling of even very thin substrates.

    Abstract translation: 通过提供两个或更多个相应的应力层(例如覆盖晶体管的相应的应力层,例如蚀刻停止层),在共同的芯片上实现增强的不同(例如互补)导电类型的晶体管中的载流子迁移率,其中应力在相应的部分中被部分地完全或部分缓解 层,优选通过根据阻挡掩模的重离子如锗,砷,氙,铟,锑,硅,氮氧或碳的注入。 这种应力结构的各个区域的分布和小尺寸也防止甚至非常薄的基底的翘曲或卷曲。

    Three dimensional CMOS integrated circuits having device layers built on different crystal oriented wafers
    90.
    发明申请
    Three dimensional CMOS integrated circuits having device layers built on different crystal oriented wafers 审中-公开
    三维CMOS集成电路具有建立在不同晶体取向晶片上的器件层

    公开(公告)号:US20050067620A1

    公开(公告)日:2005-03-31

    申请号:US10914433

    申请日:2004-08-09

    Abstract: Three-dimensional (3D) integration schemes of fabricating a 3D integrated circuit in which the pFETs are located on an optimal crystallographic surface for that device and the nFETs are located on a optimal crystallographic surface for that type of device are provided. In accordance with a first 3D integration scheme of the present invention, first semiconductor devices are pre-built on a semiconductor surface of a first silicon-on-insulator (SOI) substrate and second semiconductor devices are pre-built on a semiconductor surface of a second SOI substrate. After pre-building those two structures, the structure are bonded together and interconnect through wafer-via through vias. In a second 3D integration scheme, a blanket silicon-on-insulator (SOI) substrate having a first SOI layer of a first crystallographic orientation is bonded to a surface of a pre-fabricating wafer having second semiconductor devices on a second SOI layer that has a different crystallographic orientation than the first SOI layer; and forming first semiconductor device on the first SOI layer.

    Abstract translation: 提供制造3D集成电路的三维(3D)积分方案,其中pFET位于该器件的最佳晶体表面上,并且nFET位于用于该类型器件的最佳晶体表面上。 根据本发明的第一3D集成方案,第一半导体器件预先构建在第一绝缘体上硅(SOI)衬底的半导体表面上,并且第二半导体器件预先构建在第一绝缘体上硅绝缘体 第二SOI衬底。 在预先构建这两个结构之后,将结构粘合在一起并通过晶片通孔通孔进行互连。 在第二3D集成方案中,具有第一晶体取向的第一SOI层的绝缘硅绝缘体(SOI)衬底被结合到具有第二SOI层的具有第二半导体器件的预制晶片的表面上,所述第二SOI层具有 不同于第一SOI层的晶体取向; 以及在所述第一SOI层上形成第一半导体器件。

Patent Agency Ranking