Abstract:
A secure method and system for accessing a cache for web session is provided using web browser cookies. The cache for the web session data uses an encoded identifier, determined using for example the Keyed-Hash Message Authentication Code, based on information identifying a client. The client communication is accompanied by a cookie (persistent state object) that also includes the identifier encoded in the same manner. This encoded identifier in the received cookie is used for accessing the cached data. Where a secure communication channel is available, such as a secure socket layer (SSL connection), a second cookie which is only transmitted over SSL is used as a signature for the first cookie.
Abstract:
A telecommunications system includes a network; a plurality of client devices operably coupled to said network, said plurality of client devices adapted to set one or more time contact parameters for buddies on a contact list; and a presence server including a timer, and adapted to maintain a timing of time contacts for selected contacts responsive to said parameters.
Abstract:
Pages are provided in response to a request from a browser received by a server. The server obtains an adapted page, based on a template page, from a display infrastructure. The display infrastructure uses a template page identifier obtained from a resolution component. The resolution component obtains template page identifiers by matching attributes relating to the page request with attributes associated with template page identifiers stored in a database. The template page identifiers are provided based on the best match of the template page attributes and the page request attributes, with default values being used and a defined ranking being used where multiple matched template pages exist.
Abstract:
There is provided a method, system and apparatus for managing access to gift registry resources in a service oriented architecture (SOA) architected commerce system. In this regard, a commerce system that has been configured according to an exemplary aspect of the invention can include a gift registry including a set of gift registry resources and business context services logic coupled to authentication logic. The business context services logic can be configured to issue contexts to requesting users for interacting with the gift registry. The gift registry, in turn, can moderate access to the gift registry resources according to the contexts.
Abstract:
An integrated semiconductor structure having different types of complementary metal oxide semiconductor devices (CMOS), i.e., PFETs and NFETs, located atop a semiconductor substrate, wherein each CMOS device is fabricated such that the current flow for each device is optimal is provided. Specifically, the structure includes a semiconductor substrate that has a (110) surface orientation and a notch pointing in a direction of current flow; and at least one PFET and at least one NFET located on the semiconductor substrate. The at least one PFET has a current flow in a direction and the at least one NFET has a current flow in a direction. The direction is perpendicular to the direction. A method of fabricating such as integrated semiconductor structure is also provided.
Abstract:
A semiconductor device structure is provided which includes a first semiconductor device; a second semiconductor device; and a unitary stressed film disposed over both the first and second semiconductor devices. The stressed film has a first portion overlying the first semiconductor device, the first portion imparting a first magnitude compressive stress to a conduction channel of the first semiconductor device, the stressed film further having a second portion overlying the second semiconductor device, the second portion not imparting the first magnitude compressive stress to a conduction channel of the second semiconductor device, the second portion including an ion concentration not present in the second portion such that the second portion imparts one of a compressive stress having a magnitude much lower than the first magnitude, zero stress, and a tensile stress to the conduction channel of the second semiconductor device.
Abstract:
The invention is directed to an apparatus and method for writing a non-rectangular frame to a display device and for animating window transitions. The apparatus comprises a memory for storing at least one parameter for defining a first aperture boundary and a data selecting part. The data selecting part is adapted for comparing the associated coordinates of each datum of a first frame to the first boundary, determining if a first condition is true, and processing each first-frame datum for which the condition is true. The method comprises defining a first aperture boundary, comparing the associated coordinates of each datum of a first frame to the first boundary to determine if a first condition is true, and for each first-frame datum for which the condition is true, processing the first-frame datum. By repeatedly selecting image data for processing, the animation of window transitions may be achieved.
Abstract:
A blood glucose meter having a test strip port and an adjustable lancet device disposed at the same end of the device body is disclosed. The device body further includes an enclosure at the proximal end of the device body which houses a test strip storage vial and which facilitates one-handed opening and closing of the vial to simplify access to test strips contained therein. The enclosure is further provided with a window which allows the reading of the lot numbers on the label of the test strip vial therein without necessitating removal of the vial. A data connector is also provided on the device body for communication access, such as to upload data from other devices or to download data to other devices. By combining these multiple components into a single device body, the blood glucose meter requires fewer steps for sampling and testing, and makes device use easier and more convenient.
Abstract:
Enhanced carrier mobility in transistors of differing (e.g. complementary) conductivity types is achieved on a common chip by provision of two or more respective stressed layers, such as etch stop layers, overlying the transistors with stress being wholly or partially relieved in portions of the respective layers, preferably by implantations with heavy ions such as germanium, arsenic, xenon, indium, antimony, silicon, nitrogen oxygen or carbon in accordance with a block-out mask. The distribution and small size of individual areas of such stressed structures also prevents warping or curling of even very thin substrates.
Abstract:
Three-dimensional (3D) integration schemes of fabricating a 3D integrated circuit in which the pFETs are located on an optimal crystallographic surface for that device and the nFETs are located on a optimal crystallographic surface for that type of device are provided. In accordance with a first 3D integration scheme of the present invention, first semiconductor devices are pre-built on a semiconductor surface of a first silicon-on-insulator (SOI) substrate and second semiconductor devices are pre-built on a semiconductor surface of a second SOI substrate. After pre-building those two structures, the structure are bonded together and interconnect through wafer-via through vias. In a second 3D integration scheme, a blanket silicon-on-insulator (SOI) substrate having a first SOI layer of a first crystallographic orientation is bonded to a surface of a pre-fabricating wafer having second semiconductor devices on a second SOI layer that has a different crystallographic orientation than the first SOI layer; and forming first semiconductor device on the first SOI layer.