公开(公告)号：US20120168105A1

公开(公告)日：2012-07-05

申请号：US13350187

申请日：2012-01-13

申请人： Wolfgang Ruf ,  Frank Fey ,  Markus Häussler ,  Ole Hansen

发明人： Wolfgang Ruf ,  Frank Fey ,  Markus Häussler ,  Ole Hansen

IPC分类号： D21F1/02

CPC分类号： D21F1/02 ,  D21F1/022 ,  D21F1/024

摘要： A headbox for a machine for producing a fibrous web, in particular a paper, cardboard or tissue web from at least one fibrous stock suspension, includes a feeding device for feeding the at least one fibrous stock suspension; a perforated distribution pipe plate which is arranged immediately downstream from the feeding device in the flow direction of the at least one fibrous stock suspension and which includes a plurality of flow channels arranged in rows and columns; an intermediate channel which is arranged immediately downstream from the perforated distribution pipe plate in the flow direction of the at least one fibrous stock suspension and which extends in a width direction of the headbox and includes two walls, for example having the width of the machine; a turbulence generator which is arranged immediately downstream of the intermediate channel in the flow direction of the at least one fibrous stock suspension and which has a plurality of flow channels arranged in rows and columns; and a headbox nozzle which is arranged immediately downstream of turbulence generator in the flow direction of the at least one fibrous stock suspension and which has a nozzle gap. Feeding device, perforated distribution pipe plate and intermediate channel are arranged in a first alignment plane, and turbulence generator and headbox nozzle are arranged in a second alignment plane. The two alignment planes form an angle in the range of >90 and

摘要翻译： 用于从至少一种纤维原料悬浮液生产纤维网，特别是纸，纸板或纸巾纸的机器的流浆箱包括用于供给所述至少一种纤维原料悬浮液的进料装置; 穿孔分布管板，其沿所述至少一个纤维原料悬浮液的流动方向紧邻所述进料装置的下游布置并且包括排成行和列的多个流动通道; 中间通道，其布置在所述穿孔分配管板的所述至少一个纤维原料悬浮液的流动方向的正下方，并且在所述流浆箱的宽度方向上延伸，并且包括两个壁，例如具有所述机器的宽度; 湍流发生器，其布置在所述至少一个纤维原料悬浮液的流动方向的紧邻中间通道的下游，并且具有以行和列排列的多个流动通道; 以及流柱箱喷嘴，其在所述至少一个纤维原料悬浮液的流动方向上紧挨着湍流发生器的下游排列并且具有喷嘴间隙。 进料装置，穿孔分配管板和中间通道布置在第一对准平面中，并且湍流发生器和流浆箱喷嘴布置在第二对准平面中。 两个对准平面在> 90°和<180°的范围内形成一个角度，例如≥100和

公开(公告)号：US07752510B2

公开(公告)日：2010-07-06

申请号：US11684533

申请日：2007-03-09

申请人： Manfred Proell ,  Stephan Schroeder ,  Wolfgang Ruf ,  Hermann Haas

发明人： Manfred Proell ,  Stephan Schroeder ,  Wolfgang Ruf ,  Hermann Haas

IPC分类号： G01R31/28 ,  G01R31/26 ,  G11C29/00

CPC分类号： G01R31/3172 ,  G01R31/31926 ,  G01R31/31935

摘要： An integrated device comprises a functional circuit, a test circuit for testing the functional circuit and for providing an error data item and a register element for storing the error data item and for outputting the error data item at an error data output of the integrated device responsive to an output signal. The register element is connected to a data input of the integrated device in order to accept a data item, which is applied to the data input, responsive to the output signal.

摘要翻译： 集成装置包括功能电路，用于测试功能电路并提供错误数据项的测试电路和用于存储错误数据项的寄存器元件，并用于在集成器件的错误数据输出端输出错误数据项 到输出信号。 寄存器元件连接到集成器件的数据输入，以便响应于输出信号接受应用于数据输入的数据项。

公开(公告)号：US07428662B2

公开(公告)日：2008-09-23

申请号：US10478403

申请日：2002-05-15

申请人： Alexander Benedix ,  Reinhard Düregger ,  Robert Hermann ,  Wolfgang Ruf

发明人： Alexander Benedix ,  Reinhard Düregger ,  Robert Hermann ,  Wolfgang Ruf

IPC分类号： G06F11/00 ,  G06F11/277

CPC分类号： G11C29/40 ,  G11C29/48

摘要： Disclosed is a test method for testing a data store having an integrated test data compression circuit where the data store has a memory cell array with a multiplicity of addressable memory cells, read/write amplifiers for reading and writing data to the memory cell via an internal data bus in the data store and a test data compression circuit which compresses test data sequences, which are each read serially from the memory cell array, with stored reference test data sequences in order to produce a respective indicator data item which indicates whether at least one data error has occurred in the test data sequence which has been read.

摘要翻译： 公开了一种用于测试具有集成测试数据压缩电路的数据存储器的测试方法，其中数据存储器具有具有多个可寻址存储器单元的存储单元阵列，用于经由内部存储器单元向存储器单元读取和写入数据的读/写放大器 数据存储器中的数据总线和压缩从存储单元阵列中串行读取的测试数据序列的测试数据压缩电路与存储的参考测试数据序列一起，以产生相应的指示符数据项，该指示符数据项指示是否至少一个 已经读取的测试数据序列中发生了数据错误。

公开(公告)号：US20070258307A1

公开(公告)日：2007-11-08

申请号：US11742572

申请日：2007-04-30

申请人： Manfred Proell ,  Stephan Schroeder ,  Wolfgang Ruf ,  Hermann Haas

发明人： Manfred Proell ,  Stephan Schroeder ,  Wolfgang Ruf ,  Hermann Haas

IPC分类号： G11C7/00

CPC分类号： G11C11/406 ,  G11C11/40615 ,  G11C11/40622

摘要： A memory circuit comprises a memory cell array with dynamic memory cells arranged on word lines and bit lines, a selection unit providing selection information and a refresh circuit selecting the memory cells in each case in dependence on the selection information and refreshing the selected memory cells so that any information stored therein is retained in each case.

摘要翻译： 存储器电路包括具有布置在字线和位线上的动态存储器单元的存储单元阵列，提供选择信息的选择单元和根据选择信息选择存储单元的刷新电路，并刷新所选择的存储器单元 在每种情况下保留其中存储的任何信息。

公开(公告)号：US20070226591A1

公开(公告)日：2007-09-27

申请号：US11684533

申请日：2007-03-09

申请人： Manfred Proell ,  Stephan Schroeder ,  Wolfgang Ruf ,  Hermann Haas

发明人： Manfred Proell ,  Stephan Schroeder ,  Wolfgang Ruf ,  Hermann Haas

IPC分类号： G11C29/00

CPC分类号： G01R31/3172 ,  G01R31/31926 ,  G01R31/31935

摘要： An integrated device comprises a functional circuit, a test circuit for testing the functional circuit and for providing an error data item and a register element for storing the error data item and for outputting the error data item at an error data output of the integrated device responsive to an output signal. The register element is connected to a data input of the integrated device in order to accept a data item, which is applied to the data input, responsive to the output signal.

摘要翻译： 集成装置包括功能电路，用于测试功能电路并提供错误数据项的测试电路和用于存储错误数据项的寄存器元件，并用于在集成器件的错误数据输出端输出错误数据项 到输出信号。 寄存器元件连接到集成器件的数据输入，以便响应于输出信号接受应用于数据输入的数据项。

公开(公告)号：US07221617B2

公开(公告)日：2007-05-22

申请号：US11127536

申请日：2005-05-12

申请人： Bjorn Flach ,  Monica De Castro Martins ,  Wolfgang Ruf ,  Martin Schnell

发明人： Bjorn Flach ,  Monica De Castro Martins ,  Wolfgang Ruf ,  Martin Schnell

IPC分类号： G11C8/00

CPC分类号： G11C7/1078 ,  G11C7/1045 ,  G11C7/1051 ,  G11C7/1066 ,  G11C7/1072 ,  G11C7/22 ,  G11C11/4096 ,  G11C2207/107

摘要： A backwards-compatible memory module is disclosed. According to one aspect, a memory module comprises addressable memory cells organized in organization units having a predetermined number of memory cells, a read/write control device clocked by a first clock signal, a plurality of prefetch registers for initially storing data read from the memory cells wherein the register size corresponds to the predetermined number. In a first operating mode, a switching device clocked by a second clock signal successively couples the prefetch registers to data input/output terminals. The number of data input/output terminals corresponds to the predetermined number. In a second operating mode, the switching device is controlled by at least one address signal and couples at least one of the prefetch registers to the data input/output terminals.

摘要翻译： 公开了向后兼容的存储器模块。 根据一个方面，一种存储器模块包括以具有预定数量的存储器单元的组织单元组织的可寻址存储器单元，由第一时钟信号定时的读/写控制装置，用于初始存储从存储器读取的数据的多个预取寄存器 其中寄存器大小对应于预定数量的单元。 在第一操作模式中，由第二时钟信号计时的开关器件将预取寄存器连续地耦合到数据输入/输出端子。 数据输入/输出端子的数量对应于预定数量。 在第二操作模式中，开关装置由至少一个地址信号控制，并将预取寄存器中的至少一个耦合到数据输入/输出端子。

公开(公告)号：US06895538B2

公开(公告)日：2005-05-17

申请号：US09907694

申请日：2001-07-18

申请人： Alexander Benedix ,  Henning Hartmann ,  Reinhard Düregger ,  Wolfgang Ruf

发明人： Alexander Benedix ,  Henning Hartmann ,  Reinhard Düregger ,  Wolfgang Ruf

IPC分类号： G11C29/44 ,  H01L23/544 ,  G11C29/00

CPC分类号： H01L23/544 ,  G11C29/44 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/00

摘要： A test configuration that includes a device and a method for testing the device in which test results determined during the testing of the device are stored in a memory in the device. In this way, the test results are connected with the device and available at any time for later evaluations.

摘要翻译： 包括用于测试设备的测试配置和测试设备的方法，其中在设备测试期间确定测试结果被存储在设备中的存储器中。 以这种方式，测试结果与设备连接，随时可用于以后的评估。

公开(公告)号：US06819606B2

公开(公告)日：2004-11-16

申请号：US10339031

申请日：2003-01-09

申请人： Alexander Benedix ,  Stefan Dankowski ,  Reinhard Dueregger ,  Wolfgang Ruf

发明人： Alexander Benedix ,  Stefan Dankowski ,  Reinhard Dueregger ,  Wolfgang Ruf

IPC分类号： G11C700

CPC分类号： G11C29/70

摘要： A method is provided for storing data in a memory device having memory cells arranged in memory cell rows and memory cell columns. The method can include a step for providing redundant memory cells in the memory device. The method can also include a step for localizing defective cells. Further, the method can include a step of accessing the redundant memory cells by means of a predeterminable access mode. The method can also include a step of bypassing defective memory cells of the memory device in a manner dependent on the predeterminable access mode during operation of the memory device for accessing redundant memory cells and for replacement by redundant memory cells. Further, the method can include a step for providing redundant memory cells for storing additional information describing a defect correction.

摘要翻译： 提供了一种用于将数据存储在具有布置在存储单元行和存储单元列中的存储单元的存储器件中的方法。 该方法可以包括在存储器件中提供冗余存储器单元的步骤。 该方法还可以包括用于定位缺陷单元的步骤。 此外，该方法可以包括通过可预定访问模式访问冗余存储器单元的步骤。 该方法还可以包括在存储器设备的操作期间以取决于可预定访问模式的方式绕过存储器件的有缺陷的存储单元的步骤，用于访问冗余存储器单元并由冗余存储器单元替换。 此外，该方法可以包括用于提供用于存储描述缺陷校正的附加信息的冗余存储器单元的步骤。

公开(公告)号：US06777924B2

公开(公告)日：2004-08-17

申请号：US10377348

申请日：2003-02-28

申请人： Björn Flach ,  Wolfgang Ruf ,  Martin Schnell ,  Jörg Stippler ,  Andreas Logisch

发明人： Björn Flach ,  Wolfgang Ruf ,  Martin Schnell ,  Jörg Stippler ,  Andreas Logisch

IPC分类号： G01R104

CPC分类号： G01R31/2853

摘要： A method and device allow testing functionally identical semiconductor devices on a programmable testing device. The semiconductor devices are placed in magazine devices and a uniform magazine interface with respect to the testing device is provided for similar semiconductor devices in different types of packages. The semiconductor devices are advantageously tested one after the other on a testing device essentially without deference to their type of package and without any mechanical conversions being necessary on the testing device.

摘要翻译： 一种方法和装置允许在可编程测试装置上测试功能上相同的半导体器件。 半导体器件被放置在盒装置中，并且针对不同类型的封装件的类似的半导体器件提供了相对于测试装置的统一的盒子接口。 半导体器件有利地在测试装置上一个接一个地测试，基本上不依赖于它们的封装类型，并且在测试装置上不需要任何机械转换。

公开(公告)号：US5804037A

公开(公告)日：1998-09-08

申请号：US735895

申请日：1996-10-23

申请人： Albrecht Meinecke ,  Helmut Heinzmann ,  Wolfgang Ruf ,  Dieter Egelhof ,  Volker Schmidt-Rohr

发明人： Albrecht Meinecke ,  Helmut Heinzmann ,  Wolfgang Ruf ,  Dieter Egelhof ,  Volker Schmidt-Rohr

IPC分类号： D21F1/02 ,  D21F9/00

CPC分类号： D21F1/028 ,  D21F1/02 ,  D21F9/006

摘要： A nozzle of a multilayer headbox wherein the headbox includes a nozzle for distributing the stock suspension on a wire. The nozzle is subdivided by at least one machine-wide fin, the fin forming with the nozzle at least two machine-wide nozzle ducts. At least the mean value of the clearance of at least one nozzle duct diminishes steadily in the flow direction, the percentage decrease of the clearance in the fluidically essential area of the nozzle being at least twice as large as in the starting area of the nozzle.

摘要翻译： 多层流浆箱的喷嘴，其中流浆箱包括用于将原料悬浮液分布在丝线上的喷嘴。 喷嘴由至少一个机器宽的翅片细分，与喷嘴形成的翅片至少有两个机器宽的喷嘴管道。 至少一个喷嘴管道的间隙的平均值至少在流动方向上稳定地减小，喷嘴的流体必需区域中的间隙的百分比减小至少是喷嘴起始区域的两倍。