公开(公告)号：US20110204316A1

公开(公告)日：2011-08-25

申请号：US13029361

申请日：2011-02-17

申请人： Franz Kreupl ,  Deepak C. Sekar

发明人： Franz Kreupl ,  Deepak C. Sekar

IPC分类号： H01L45/00 ,  H01L21/02

CPC分类号： H01L27/222 ,  H01L27/24 ,  H01L43/08 ,  H01L45/04 ,  H01L45/145

摘要： A memory device in a 3-D read and write memory includes a resistance-changing layer, and a local contact resistance in series with, and local to, the resistance-changing layer. The local contact resistance is established by a junction between a semiconductor layer and a metal layer. Further, the local contact resistance has a specified level of resistance according to a doping concentration of the semiconductor and a barrier height of the junction. A method for fabricating such a memory device is also presented.

摘要翻译： 3-D读写存储器中的存储器件包括电阻变化层和与电阻变化层串联连接的局部接触电阻。 局部接触电阻由半导体层和金属层之间的接合点构成。 此外，局部接触电阻根据半导体的掺杂浓度和结的势垒高度具有指定的电阻水平。 还提出了一种用于制造这种存储器件的方法。

公开(公告)号：US07615439B1

公开(公告)日：2009-11-10

申请号：US12240758

申请日：2008-09-29

申请人： April Dawn Schricker ,  Deepak C. Sekar ,  Andy Fu ,  Mark Clark

发明人： April Dawn Schricker ,  Deepak C. Sekar ,  Andy Fu ,  Mark Clark

IPC分类号： H01L21/8234

CPC分类号： H01L45/1233 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/2418 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/06 ,  H01L45/122 ,  H01L45/144 ,  H01L45/149 ,  H01L45/1683

摘要： Forming a metal-insulator diode and carbon memory element in a single damascene process is disclosed. A trench having a bottom and a sidewall is formed in an insulator. A first diode electrode is formed in the trench during a single damascene process. A first insulating region comprising a first insulating material is formed in the trench during the single damascene process. A second insulating region comprising a second insulating material is formed in the trench during the single damascene process. A second diode electrode is formed in the trench during the single damascene process. The first insulating region and the second insulating region reside between the first diode electrode and the second diode electrode to form a metal-insulator-insulator-metal (MIIM) diode. A region of carbon is formed in the trench during the single damascene process. At least a portion of the carbon is electrically in series with the MIIM diode.

摘要翻译： 公开了在单个镶嵌工艺中形成金属绝缘体二极管和碳记忆元件。 具有底部和侧壁的沟槽形成在绝缘体中。 在单个镶嵌工艺期间，在沟槽中形成第一二极管电极。 在单个镶嵌工艺期间，在沟槽中形成包括第一绝缘材料的第一绝缘区域。 在单个镶嵌工艺期间，在沟槽中形成包括第二绝缘材料的第二绝缘区域。 在单镶嵌工艺期间，在沟槽中形成第二二极管电极。 第一绝缘区域和第二绝缘区域位于第一二极管电极和第二二极管电极之间，以形成金属 - 绝缘体 - 绝缘体 - 金属（MIIM）二极管。 在单个镶嵌工艺期间，在沟槽中形成碳区域。 至少一部分碳与MIIM二极管电串联。

公开(公告)号：US08274130B2

公开(公告)日：2012-09-25

申请号：US12582509

申请日：2009-10-20

申请人： Andrei Mihnea ,  Deepak C. Sekar ,  George Samachisa ,  Roy Scheuerlein ,  Li Xiao

发明人： Andrei Mihnea ,  Deepak C. Sekar ,  George Samachisa ,  Roy Scheuerlein ,  Li Xiao

IPC分类号： H01L29/861

CPC分类号： G11C13/0007 ,  G11C13/003 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/72 ,  H01L27/24

摘要： A storage system and method for forming a storage system that uses punch-through diodes as a steering element in series with a reversible resistivity-switching element is described. The punch-through diode allows bipolar operation of a cross-point memory array. The punch-through diode may have a symmetrical non-linear current/voltage relationship. The punch-through diode has a high current at high bias for selected cells and a low leakage current at low bias for unselected cells. Therefore, it is compatible with bipolar switching in cross-point memory arrays having resistive switching elements. The punch-through diode may be a N+/P−/N+ device or a P+/N−/P+ device.

摘要翻译： 描述了一种用于形成使用穿通二极管作为与可逆电阻率切换元件串联的转向元件的存储系统的存储系统和方法。 穿通二极管允许交叉点存储器阵列的双极性操作。 穿通二极管可具有对称的非线性电流/电压关系。 穿通二极管在选择的电池的高偏压下具有高电流，对于未选择的电池，在低偏压下具有低泄漏电流。 因此，它与具有电阻式开关元件的交叉点存储器阵列中的双极开关兼容。 穿通二极管可以是N + / P- / N +器件或P + / N- / P +器件。

公开(公告)号：US20100321977A1

公开(公告)日：2010-12-23

申请号：US12488159

申请日：2009-06-19

申请人： Deepak C. Sekar ,  Klaus Schuegraf ,  Roy Scheuerlein

发明人： Deepak C. Sekar ,  Klaus Schuegraf ,  Roy Scheuerlein

IPC分类号： G11C11/00 ,  G11C8/08 ,  G11C8/00

CPC分类号： G11C13/0007 ,  G11C7/00 ,  G11C8/12 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2013/0088 ,  G11C2013/009 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/72

摘要： A storage system and method for operating the storage system that uses reversible resistance-switching elements is described. Techniques are disclosed herein for varying programming conditions to account for different resistances that memory cells have. These techniques can program memory cells in fewer attempts, which can save time and/or power. Techniques are disclosed herein for achieving a high programming bandwidth while reducing the worst case current and/or power consumption. In one embodiment, a page mapping scheme is provided that programs multiple memory cells in parallel in a way that reduces the worst case current and/or power consumption.

摘要翻译： 描述了一种用于操作使用可逆电阻切换元件的存储系统的存储系统和方法。 本文公开了用于改变编程条件以解决存储器单元具有的不同电阻的技术。 这些技术可以以较少的尝试编程存储器单元，这可以节省时间和/或功率。 本文公开了用于实现高编程带宽同时减少最坏情况下的电流和/或功率消耗的技术。 在一个实施例中，提供了以减少最坏情况下的电流和/或功率消耗的方式并行地编程多个存储器单元的页面映射方案。

公开(公告)号：US08487292B2

公开(公告)日：2013-07-16

申请号：US12842798

申请日：2010-07-23

申请人： Deepak C. Sekar ,  Franz Kreupl

发明人： Deepak C. Sekar ,  Franz Kreupl

IPC分类号： H01L47/00

CPC分类号： H01L45/146 ,  G11C13/0007 ,  G11C2213/35 ,  G11C2213/71 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/1641 ,  H01L45/1675

摘要： A non-volatile resistance-switching memory element includes a resistance-switching element formed from a metal oxide layer having a dopant which is provided at a relatively high concentration such as 10% or greater. Further, the dopant is a cation having a relatively large ionic radius such as 70 picometers or greater, such as Magnesium, Chromium, Calcium, Scandium or Yttrium. A cubic fluorite phase lattice may be formed in the metal oxide even at room temperature so that switching power may be reduced. The memory element may be pillar-shaped, extending between first and second electrodes and being in series with a steering element such as a diode. The metal oxide layer may be deposited at the same time as the dopant. Or, using atomic layer deposition, an oxide of a first metal can be deposited, followed by an oxide of a second metal, followed by annealing to cause intermixing, in repeated cycles.

摘要翻译： 非易失性电阻切换存储元件包括由具有以比较高的浓度（例如10％以上）设置的掺杂剂的金属氧化物层形成的电阻切换元件。 此外，掺杂剂是诸如镁，铬，钙，钪或钇之类的诸如70皮度或更大的离子半径相对较大的阳离子。 即使在室温下也可以在金属氧化物中形成立方萤石相晶格，从而可以降低开关功率。 存储元件可以是柱形的，在第一和第二电极之间延伸并且与诸如二极管的转向元件串联。 金属氧化物层可以与掺杂剂同时沉积。 或者，使用原子层沉积，可沉积第一金属的氧化物，然后沉积第二金属的氧化物，然后在重复循环中进行退火以引起混合。

公开(公告)号：US08435831B2

公开(公告)日：2013-05-07

申请号：US12942575

申请日：2010-11-09

申请人： Deepak C. Sekar ,  Franz Kreupl ,  Raghuveer Makala ,  Peter Rabkin

发明人： Deepak C. Sekar ,  Franz Kreupl ,  Raghuveer Makala ,  Peter Rabkin

IPC分类号： H01L21/00

CPC分类号： H01L45/146 ,  G11C13/0007 ,  G11C2213/35 ,  G11C2213/71 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/1641 ,  H01L45/1675

摘要： Non-volatile storage elements having a reversible resistivity-switching element and techniques for fabricating the same are disclosed herein. The reversible resistivity-switching element may be formed by depositing an oxygen diffusion resistant material (e.g., heavily doped Si, W, WN) over the top electrode. A trap passivation material (e.g., fluorine, nitrogen, hydrogen, deuterium) may be incorporated into one or more of the bottom electrode, a metal oxide region, or the top electrode of the reversible resistivity-switching element. One embodiment includes a reversible resistivity-switching element having a bi-layer capping layer between the metal oxide and the top electrode. Fabricating the device may include depositing (un-reacted) titanium and depositing titanium oxide in situ without air break. One embodiment includes incorporating titanium into the metal oxide of the reversible resistivity-switching element. The titanium might be implanted into the metal oxide while depositing the metal oxide, or after deposition of the metal oxide.

公开(公告)号：US20120302029A1

公开(公告)日：2012-11-29

申请号：US13571100

申请日：2012-08-09

申请人： Andrei Mihnea ,  Deepak C. Sekar ,  George Samachisa ,  Roy Scheuerlein ,  Li Xiao

发明人： Andrei Mihnea ,  Deepak C. Sekar ,  George Samachisa ,  Roy Scheuerlein ,  Li Xiao

IPC分类号： H01L21/02

CPC分类号： G11C13/0007 ,  G11C13/003 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/72 ,  H01L27/24

摘要： A storage system and method for forming a storage system that uses punch-through diodes as a steering element in series with a reversible resistivity-switching element is described. The punch-through diode allows bipolar operation of a cross-point memory array. The punch-through diode may have a symmetrical non-linear current/voltage relationship. The punch-through diode has a high current at high bias for selected cells and a low leakage current at low bias for unselected cells. Therefore, it is compatible with bipolar switching in cross-point memory arrays having resistive switching elements. The punch-through diode may be a N+/P−/N+ device or a P+/N−/P+ device.

摘要翻译： 描述了一种用于形成使用穿通二极管作为与可逆电阻率切换元件串联的转向元件的存储系统的存储系统和方法。 穿通二极管允许交叉点存储器阵列的双极性操作。 穿通二极管可具有对称的非线性电流/电压关系。 穿通二极管在选择的电池的高偏压下具有高电流，对于未选择的电池，在低偏压下具有低泄漏电流。 因此，它与具有电阻式开关元件的交叉点存储器阵列中的双极开关兼容。 穿通二极管可以是N + / P- / N +器件或P + / N- / P +器件。

公开(公告)号：US07935594B2

公开(公告)日：2011-05-03

申请号：US12566486

申请日：2009-09-24

申请人： April Dawn Schricker ,  Deepak C. Sekar ,  Andy Fu ,  Mark Clark

发明人： April Dawn Schricker ,  Deepak C. Sekar ,  Andy Fu ,  Mark Clark

IPC分类号： H01L21/8234

CPC分类号： H01L45/1233 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/2418 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/06 ,  H01L45/122 ,  H01L45/144 ,  H01L45/149 ,  H01L45/1683

摘要： Forming a metal-insulator diode and carbon memory element in a single damascene process is disclosed. A trench having a bottom and a sidewall is formed in an insulator. A first diode electrode is formed in the trench during a single damascene process. A first insulating region comprising a first insulating material is formed in the trench during the single damascene process. A second insulating region comprising a second insulating material is formed in the trench during the single damascene process. A second diode electrode is formed in the trench during the single damascene process. The first insulating region and the second insulating region reside between the first diode electrode and the second diode electrode to form a metal-insulator-insulator-metal (MIIM) diode. A region of carbon is formed in the trench during the single damascene process. At least a portion of the carbon is electrically in series with the MIIM diode.

摘要翻译： 公开了在单个镶嵌工艺中形成金属绝缘体二极管和碳记忆元件。 具有底部和侧壁的沟槽形成在绝缘体中。 在单个镶嵌工艺期间，在沟槽中形成第一二极管电极。 在单个镶嵌工艺期间，在沟槽中形成包括第一绝缘材料的第一绝缘区域。 在单个镶嵌工艺期间，在沟槽中形成包括第二绝缘材料的第二绝缘区域。 在单镶嵌工艺期间，在沟槽中形成第二二极管电极。 第一绝缘区域和第二绝缘区域位于第一二极管电极和第二二极管电极之间，以形成金属 - 绝缘体 - 绝缘体 - 金属（MIIM）二极管。 在单个镶嵌工艺期间，在沟槽中形成碳区域。 至少一部分碳与MIIM二极管电串联。

公开(公告)号：US20100078758A1

公开(公告)日：2010-04-01

申请号：US12240766

申请日：2008-09-29

申请人： Deepak C. Sekar ,  Tanmay Kumar ,  Peter Rabkin ,  Xiying Chen

发明人： Deepak C. Sekar ,  Tanmay Kumar ,  Peter Rabkin ,  Xiying Chen

IPC分类号： H01L29/861 ,  G11C11/50 ,  H01L21/44

CPC分类号： H01L45/145 ,  H01L27/2418 ,  H01L45/00 ,  H01L45/04 ,  H01L45/06 ,  H01L45/144 ,  H01L45/149

摘要： A metal-insulator diode is disclosed. In one aspect, the metal-insulator diode comprises a first electrode comprising a first metal, a first region comprising a first insulating material, a second region comprising a second insulating material, and a second electrode comprising a second metal. The first region and the second region reside between the first electrode and the second electrode. The second insulating material is doped with nitrogen. Note that the second insulating material may have an interface with either the first electrode or the second electrode.

摘要翻译： 公开了一种金属绝缘体二极管。 在一个方面，金属绝缘体二极管包括第一电极，第一电极包括第一金属，第一区域包括第一绝缘材料，第二区域包括第二绝缘材料，第二电极包括第二金属。 第一区域和第二区域位于第一电极和第二电极之间。 第二绝缘材料掺杂有氮。 注意，第二绝缘材料可以具有与第一电极或第二电极的界面。

公开(公告)号：US08498146B2

公开(公告)日：2013-07-30

申请号：US13397448

申请日：2012-02-15

申请人： Deepak C. Sekar ,  Klaus Schuegraf ,  Roy Scheuerlein

发明人： Deepak C. Sekar ,  Klaus Schuegraf ,  Roy Scheuerlein

IPC分类号： G11C11/00

CPC分类号： G11C13/0007 ,  G11C7/00 ,  G11C8/12 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0076 ,  G11C2013/0088 ,  G11C2013/009 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/72

摘要： A storage system and method for operating the storage system that uses reversible resistance-switching elements is described. Techniques are disclosed herein for varying programming conditions to account for different resistances that memory cells have. These techniques can program memory cells in fewer attempts, which can save time and/or power. Techniques are disclosed herein for achieving a high programming bandwidth while reducing the worst case current and/or power consumption.

摘要翻译： 描述了一种用于操作使用可逆电阻切换元件的存储系统的存储系统和方法。 本文公开了用于改变编程条件以解决存储器单元具有的不同电阻的技术。 这些技术可以以较少的尝试编程存储器单元，这可以节省时间和/或功率。 本文公开了用于实现高编程带宽同时减少最坏情况下的电流和/或功率消耗的技术。