公开(公告)号：US06990423B2

公开(公告)日：2006-01-24

申请号：US10606971

申请日：2003-06-25

申请人： Benjamin Brown ,  Peter Huber ,  Mark Donahue ,  John Pane

发明人： Benjamin Brown ,  Peter Huber ,  Mark Donahue ,  John Pane

IPC分类号： G02F3/00

CPC分类号： G01R31/31703 ,  G01R31/31932 ,  H04L43/50

摘要： Automatic test equipment for testing non-deterministic packet data from a device-under-test is disclosed. The automatic test equipment includes a memory for storing expected packet data and a receiver for receiving the packet data from the device-under-test. A data validation circuit is coupled to the receiver for validating non-deterministic packet data based on the expected packet data from the vector memory.

摘要翻译： 公开了用于测试来自被测设备的非确定性分组数据的自动测试设备。 自动测试设备包括用于存储预期分组数据的存储器和用于从被测器件接收分组数据的接收器。 数据验证电路耦合到接收机，用于基于来自向量存储器的预期分组数据验证非确定性分组数据。

公开(公告)号：US06981192B2

公开(公告)日：2005-12-27

申请号：US10256586

申请日：2002-09-27

申请人： Michael C. Panis

发明人： Michael C. Panis

IPC分类号： G01R31/319 ,  G01R31/3193 ,  G11B20/20 ,  G06F11/00

CPC分类号： G01R31/31924 ,  G01R31/31908 ,  G01R31/31937

摘要： A pin electronics circuit for automatic test equipment includes first and second sampling circuits for sampling first and second legs of a differential signal produced by a DUT (Device Under Test). Timing signals activate the first and second sampling circuits to sample the legs of the differential signal at precisely defined instants of time to produce first and second collections of samples. To deskew the legs of a differential signal with respect to each other, corresponding features within the first and second collections are identified and a difference is taken between them. The differential skew can then be applied to correct measurements of differential signals.

摘要翻译： 用于自动测试设备的引脚电子电路包括用于对DUT（被测设备）产生的差分信号的第一和第二支路进行采样的第一和第二采样电路。 定时信号激活第一和第二采样电路，以精确定义的时刻来采样差分信号的支路，以产生第一和第二采样集合。 为了相对于彼此偏移差分信号的腿，识别第一和第二集合内的对应特征，并且在它们之间取得差异。 然后可以应用差分偏移来校正差分信号的测量。

公开(公告)号：US06853181B1

公开(公告)日：2005-02-08

申请号：US10749266

申请日：2003-12-31

申请人： Edward Ostertag

发明人： Edward Ostertag

IPC分类号： G01R31/28 ,  G01R31/319 ,  G01R31/32

CPC分类号： G01R31/31924 ,  G01R31/31905

摘要： A channel architecture for use in automatic test equipment is disclosed. The channel architecture comprises pattern generation circuitry and timing circuitry responsive to the pattern generation circuitry to generate timing signals. Formatting circuitry coupled to the output of the timing circuitry generates pulse waveforms for application to pin electronics circuitry. The pin electronics circuitry is responsive to the formatting circuitry for interfacing the automatic test equipment to a device-under-test. The pattern generation circuitry, the timing circuitry, the formatting circuitry and the pin electronics circuitry are formed on the same integrated circuit.

公开(公告)号：US06894504B2

公开(公告)日：2005-05-17

申请号：US10220716

申请日：2001-03-05

申请人： Roger Faulkner

发明人： Roger Faulkner

IPC分类号： H04B3/48 ,  H04M3/30 ,  H01H31/04 ,  G01R19/00

CPC分类号： H04M3/306 ,  H04B3/48 ,  H04M3/2209 ,  H04M3/30

摘要： A method and apparatus for pre-qualifying lines with respect to estimating the insertion loss of the line is presented. End-to-end insertion loss at high frequencies is estimated from measurements made at low frequencies through the voice switch at the central office of a telephone company. An AC voltage waveform is applied to the telephone line being tested. Real and imaginary components of the resultant waveform are measured. These measurements are captured and used to estimate the insertion loss of the telephone line at frequencies in the range of 40 kHz to 300 kHz.

摘要翻译： 提出了一种用于对线的插入损耗估计进行预先排列的方法和装置。 通过电话公司中心局的语音切换在低频率下进行测量，估计高频端对端插入损耗。 交流电压波形被施加到被测电话线上。 测量结果波形的实部和虚部。 这些测量被捕获并用于估计在40kHz至300kHz的范围内的电话线的插入损耗。

公开(公告)号：US06872085B1

公开(公告)日：2005-03-29

申请号：US10675087

申请日：2003-09-30

申请人： Thomas S. Cohen ,  Marc B. Cartier ,  John R. Dunham ,  Jason J. Payne

发明人： Thomas S. Cohen ,  Marc B. Cartier ,  John R. Dunham ,  Jason J. Payne

IPC分类号： H01R12/16 ,  H01R13/648 ,  H01R4/66

CPC分类号： H01R12/724 ,  H01R13/6585 ,  Y10S439/947

摘要： There is disclosed an electrical connector assembly having a first electrical connector mateable to a second electrical connector. In one embodiment, the first electrical connector includes a plurality of wafers, with each wafer having an insulative housing, a plurality of signal conductors and a shield plate. A portion of the shield plate is exposed so that a conductive member can electrically connect the shield plates of the wafers at the exposed portion of the shield plate. In one embodiment, the second electrical connector includes an insulative housing, and a plurality of signal conductors and ground conductors in a plurality of rows. Each row corresponds to a wafer of the first electrical connector. Each signal conductor has a contact tail and each ground conductors has two contact tails. The signal conductors and the ground conductors are positioned adjacent to one another so that for each signal conductor contact tail, there are ground conductor contact tails adjacent either side of the signal conductor contact tail.

摘要翻译： 公开了一种具有可与第二电连接器配合的第一电连接器的电连接器组件。 在一个实施例中，第一电连接器包括多个晶片，每个晶片具有绝缘壳体，多个信号导体和屏蔽板。 屏蔽板的一部分被暴露，使得导电构件可以在屏蔽板的暴露部分处电连接晶片的屏蔽板。 在一个实施例中，第二电连接器包括绝缘壳体，以及多个信号导体和多行中的接地导体。 每行对应于第一电连接器的晶片。 每个信号导体具有接触尾部，并且每个接地导体具有两个接触尾部。 信号导体和接地导体彼此相邻地定位，使得对于每个信号导体接触尾部，在信号导体接触尾部的任一侧具有接地导体接触尾部。

公开(公告)号：US06864698B2

公开(公告)日：2005-03-08

申请号：US10396589

申请日：2003-03-24

申请人： Ray Mirkhani ,  John Mahoney

发明人： Ray Mirkhani ,  John Mahoney

IPC分类号： G01R31/28 ,  G01R31/02

CPC分类号： G01R31/2851

摘要： Automatic test equipment is disclosed including a console and a testhead cooled by a hybrid cooling system. The testhead includes a card cage assembly having a plurality of slots disposed in spaced-apart relationship and adapted for receiving a plurality of electronic board assemblies. The hybrid cooling system includes a first cooling assembly coupled to the card cage assembly for distributing a first cooling medium proximate the electronic board assemblies and a second cooling assembly. The second cooling assembly is disposed proximate the card cage assembly and includes user-activatable cooling ports for selective access to a second cooling medium for the electronic board assemblies.

摘要翻译： 公开了包括由混合冷却系统冷却的控制台和测试头的自动测试设备。 检测头包括一个卡笼组件，该卡笼组件具有以间隔开的关系设置的多个槽，并适于容纳多个电子板组件。 混合冷却系统包括联接到卡笼组件的第一冷却组件，用于分配靠近电子板组件的第一冷却介质和第二冷却组件。 第二冷却组件设置在卡笼组件附近，并且包括用户可激活的冷却端口，用于选择性地接近用于电子板组件的第二冷却介质。

公开(公告)号：US06895081B1

公开(公告)日：2005-05-17

申请号：US09294563

申请日：1999-04-20

申请人： Kurt E. Schmidt ,  David J. Groessl ,  Yun Zhang

发明人： Kurt E. Schmidt ,  David J. Groessl ,  Yun Zhang

IPC分类号： H04L29/14 ,  G06Q10/06 ,  H04B3/46 ,  H04L1/00 ,  H04L25/02 ,  H04M3/00 ,  H04M3/30 ,  H04M11/00 ,  H04Q3/42 ,  H04M1/24 ,  H04M3/08 ,  H04M3/22

CPC分类号： G06Q10/06 ,  H04B3/46 ,  H04L1/0003 ,  H04L25/022 ,  H04M3/306 ,  Y02D50/10

摘要： A method characterizes a customer line for data transmission. The method includes measuring electrical properties of the customer line from a central location, identifying a line model from the measurements, and identifying a modem model for a modem selected for use with the customer line. The modem model gives performance data for the selected modem. The method also predicts performance data for the customer line when operated with the selected modem by combining the line and modem models.

摘要翻译： 一种用于数据传输的客户线路的特征。 该方法包括从中心位置测量客户线路的电气特性，从测量中识别线路模型，以及为选择用于客户线路的调制解调器识别调制解调器模型。 调制解调器模型给出所选调制解调器的性能数据。 该方法还通过组合线路和调制解调器模型来预测用所选调制解调器操作时客户线路的性能数据。

公开(公告)号：US06894552B2

公开(公告)日：2005-05-17

申请号：US10376664

申请日：2003-02-28

申请人： Cosmin Iorga ,  Alan Hussey ,  Kuok Ling

发明人： Cosmin Iorga ,  Alan Hussey ,  Kuok Ling

IPC分类号： H03H11/26

CPC分类号： H03H11/265

摘要： A differential delay cell is disclosed. The delay cell includes a voltage bus and a differential pair of MOS transistors having respective source terminals coupled to define a current node, and respective drain terminal outputs that cooperate to form a differential output. A current source is disposed at the current node while a differential diode-connected load is disposed between the differential pair and the voltage bus. The differential diode-connected load comprises at least one n-channel MOS transistor configured as a diode.

摘要翻译： 公开了一种差分延迟单元。 延迟单元包括电压总线和具有耦合以限定电流节点的各个源极端子的MOS晶体管的差分对以及协作以形成差分输出的相应的漏极端子输出。 电流源设置在当前节点处，而差分二极管连接的负载设置在差分对和电压总线之间。 差分二极管连接的负载包括配置为二极管的至少一个n沟道MOS晶体管。

公开(公告)号：US06976183B2

公开(公告)日：2005-12-13

申请号：US10008967

申请日：2001-11-09

申请人： Robert Bruce Gage ,  Peter Reichert

发明人： Robert Bruce Gage ,  Peter Reichert

IPC分类号： G01R31/319 ,  H04L7/00 ,  H03K19/094

CPC分类号： G01R31/31922

摘要： A clock system is disclosed for distributing and generating a digital clock signal for a plurality of electronic assemblies. The clock system includes a remote fixed-frequency clock for generating a first clock signal of a first frequency and a plurality of local clock modules. The local clock modules are respectively disposed on the plurality of electronic assemblies and each include synthesizer circuitry for creating a variable clock signal of a different frequency than the first frequency. Fanout circuitry is coupled between the remote fixed frequency clock and the plurality of local clock modules to distribute the first clock signal.

摘要翻译： 公开了用于分配和生成用于多个电子组件的数字时钟信号的时钟系统。 时钟系统包括用于产生第一频率的第一时钟信号和多个本地时钟模块的远程固定频率时钟。 本地时钟模块分别设置在多个电子组件上，并且每个包括用于产生与第一频率不同的频率的可变时钟信号的合成器电路。 扇出电路耦合在远程固定频率时钟和多个本地时钟模块之间以分配第一时钟信号。

公开(公告)号：US06894505B2

公开(公告)日：2005-05-17

申请号：US10317310

申请日：2002-12-12

申请人： Tushar K. Gohel

发明人： Tushar K. Gohel

IPC分类号： G06F3/00 ,  G06F11/22 ,  G06F13/00 ,  G06F13/38 ,  G06F13/40 ,  G01R31/02 ,  G06F13/14

CPC分类号： G06F13/4077

摘要： An interface for a bus test instrument is readily adaptable for testing a wide range of bus types. The interface includes a pair of transmit lines and a pair of receive lines. A transmitting circuit is adaptable for transmitting either single-ended or differential signals over the transmit lines, and at least one receiving circuit is adaptable for receiving either single-ended or differential signals from either the receive lines or the transmit lines. The flexible interface allows the testing of single-ended and differential busses, as well as busses that support both unidirectional and bidirectional communication.

摘要翻译： 总线测试仪的接口很容易适用于测试各种总线类型。 接口包括一对发送线和一对接收线。 发射电路适用于通过发射线路发送单端或差分信号，并且至少一个接收电路适于接收来自接收线路或发射线路的单端或差分信号。 灵活的接口允许测试单端和差分总线，以及支持单向和双向通信的总线。