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1.发明授权Mounting structure of circuit board having multi-layered ceramic capacitor thereon 有权具有多层陶瓷电容器的电路板的安装结构公开(公告)号：US09148955B2
公开(公告)日：2015-09-29
申请号：US13481348
申请日：2012-05-25
Applicant: Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
Inventor： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
CPC classification number: H05K1/111 , H01G4/12 , H01G4/30 , H05K3/3442 , H05K2201/10015 , H05K2201/2045 , Y02P70/611 , Y02P70/613
Abstract: Disclosed herein is a mounting structure of a circuit board having a multi-layered ceramic capacitor thereon. The mounting structure of a circuit board having a multi-layered ceramic capacitor thereon, in which a dielectric layer on which inner electrodes are disposed is stacked and external electrode terminals connecting the inner electrodes in parallel are disposed on both ends thereof, wherein the inner electrodes of the multi-layered ceramic capacitor and the circuit board are disposed so as to be a horizontal direction to connect the external electrode terminals with a land on the circuit board by a conductive material and a ratio of a bonding area ASOLEDER of the conductive material to the area AMLCC of the external electrode terminals AMLCC is set to be less than 1.4, thereby remarkably reducing the vibration noise.
Abstract translation: 这里公开了一种其上具有多层陶瓷电容器的电路板的安装结构。 其上设置有多层陶瓷电容器的电路板的安装结构，其中布置有内部电极的电介质层，并且将其内部电极并联连接的外部电极端子设置在其两端，其中内部电极 将多层陶瓷电容器和电路板设置成水平方向，以通过导电材料将导电材料的外部电极端子与电路板上的焊盘接合，并且将导电材料的接合面积ASOLEDER与 外部电极端子AMLCC的面积AMLCC被设定为小于1.4，从而显着地降低了振动噪声。
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公开(公告)号：US08630083B2
公开(公告)日：2014-01-14
申请号：US13447692
申请日：2012-04-16
Applicant: Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
Inventor： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
Abstract: A multi-layered capacitor includes a capacitor element in which a plurality of dielectric layers are multi-layered, and which comprises a first inner electrode and a second inner electrode that are alternately formed on neighboring dielectric layers of the plurality of dielectric layers, a first external electrode and a second external electrode which are formed on an outside surface of the capacitor element to be electrically connected to the first inner electrode and the second inner electrode, respectively, and a deformation suppressing electrode which is formed on the outside surface of the capacitor element and separated from the first external electrode and the second external electrode to be electrically isolated from the first inner electrode and the second inner electrode.
Abstract translation: 多层电容器包括电容器元件，其中多个电介质层是多层的，并且包括交替地形成在多个电介质层的相邻电介质层上的第一内电极和第二内电极，第一 外部电极和第二外部电极，分别形成在电容器元件的外表面上以与第一内部电极和第二内部电极电连接;变形抑制电极，形成在电容器的外表面上 并且与第一外部电极和第二外部电极分离以与第一内部电极和第二内部电极电隔离。
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公开(公告)号：US20130155574A1
公开(公告)日：2013-06-20
申请号：US13541494
申请日：2012-07-03
Applicant: Min Cheol PARK , Byoung Hwa Lee , Dong Seok Park , Young Ghyu Ahn , Sang Soo Park
Inventor： Min Cheol PARK , Byoung Hwa Lee , Dong Seok Park , Young Ghyu Ahn , Sang Soo Park
IPC: H01G4/012
Abstract: A multilayer ceramic electronic component having high reliability by reducing equivalent series resistance (ESR) dispersion is provided. Connectivity between internal electrodes and external electrodes is secured by introducing dummy electrodes connected to first and second terminal electrodes, to third and fourth internal electrode layers. ESR dispersion of the multilayer ceramic electronic component is reduced to obtain high reliability.
Abstract translation: 提供了通过降低等效串联电阻（ESR）色散而具有高可靠性的多层陶瓷电子元件。 通过将连接到第一和第二端子电极的虚设电极引入第三和第四内部电极层来确保内部电极和外部电极之间的连通性。 降低多层陶瓷电子部件的ESR分散，获得高可靠性。
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公开(公告)号：US20120327557A1
公开(公告)日：2012-12-27
申请号：US13531242
申请日：2012-06-22
Applicant: Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
Inventor： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
IPC: H01G4/12
CPC classification number: H01G4/1272 , H01G2/065 , H01G4/005 , H01G4/12 , H01G4/228 , H01G4/232 , H01G4/30
Abstract: There is provided a chip type laminated capacitor including: a ceramic body formed by laminating a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 μm or less; first and second outer electrodes; a first inner electrode having one end forming a first margin together with one end surface of the ceramic body at which the second outer electrode is formed and the other end leading to the first outer electrode; and a second inner electrode having one end forming a second margin together with the other end surface of the ceramic body at which the first outer electrode is formed and the other end leading to the second outer electrode, wherein the first and second margins have different widths under a condition that they are 200 μm or less.
Abstract translation: 提供一种芯片型层叠电容器，其包括：陶瓷体，其通过层叠厚度等于其中包含的晶粒的平均粒径的10倍以上且为3μm以下的电介质层而形成; 第一和第二外部电极; 第一内部电极，其一端与形成有第二外部电极的陶瓷体的一个端面一起形成第一边缘，而另一端通向第一外部电极; 以及第二内部电极，其一端与形成有第一外部电极的陶瓷体的另一个端面一起形成第二边缘，另一端通向第二外部电极，其中第一和第二边缘具有不同的宽度 在200μm以下的条件下。
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公开(公告)号：US20120275081A1
公开(公告)日：2012-11-01
申请号：US13447692
申请日：2012-04-16
Applicant: Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
Inventor： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
IPC: H01G4/30
Abstract: A multi-layered capacitor includes a capacitor element in which a plurality of dielectric layers are multi-layered, and which comprises a first inner electrode and a second inner electrode that are alternately formed on neighboring dielectric layers of the plurality of dielectric layers, a first external electrode and a second external electrode which are formed on an outside surface of the capacitor element to be electrically connected to the first inner electrode and the second inner electrode, respectively, and a deformation suppressing electrode which is formed on the outside surface of the capacitor element and separated from the first external electrode and the second external electrode to be electrically isolated from the first inner electrode and the second inner electrode.
Abstract translation: 多层电容器包括电容器元件，其中多个电介质层是多层的，并且包括交替地形成在多个电介质层的相邻电介质层上的第一内电极和第二内电极，第一 外部电极和第二外部电极，分别形成在电容器元件的外表面上以与第一内部电极和第二内部电极电连接;变形抑制电极，形成在电容器的外表面上 并且与第一外部电极和第二外部电极分离以与第一内部电极和第二内部电极电隔离。
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Patent Agency Ranking
公开(公告)号：US08233263B2
公开(公告)日：2012-07-31
申请号：US12248476
申请日：2008-10-09
Applicant: Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
Inventor： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
Abstract: A multilayer chip capacitor includes a capacitor body including a stack of a plurality of dielectric layers and having first and second side faces and first and second end faces, a plurality of external electrodes of opposite polarity alternated on each of the first and second side faces, and a plurality of internal electrodes each including one or two leads extending to an outer face of the capacitor body and respectively connected to the external electrodes. A horizontal distance between leads of the internal electrodes of opposite polarity adjacent to each other in a stack direction is longer than a pitch between the external electrodes of opposite polarity adjacent to each other on the same side face of the capacitor body.
Abstract translation: 多层片状电容器包括电容器主体，其包括多个电介质层的叠层，并且具有第一和第二侧面以及第一和第二端面，多个相反极性的外部电极在第一和第二侧面中的每一个上交替， 以及多个内部电极，每个内部电极包括延伸到电容器主体的外表面并分别连接到外部电极的一个或两个引线。 在堆叠方向上彼此相邻的内部电极的引线之间的水平距离比在电容器主体的同一侧面上彼此相邻的外部电极之间的间距长。
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公开(公告)号：US08149565B2
公开(公告)日：2012-04-03
申请号：US12421953
申请日：2009-04-10
Applicant: Byoung Hwa Lee , Sung Kwon Wi , Hong Yeon Cho , Dong Seok Park , Sang Soo Park , Min Cheol Park
Inventor： Byoung Hwa Lee , Sung Kwon Wi , Hong Yeon Cho , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC: H01G15/00
CPC classification number: H05K1/0231 , H01G2/065 , H01G4/35 , H05K2201/09318 , H05K2201/09481 , H05K2201/10636 , H05K2201/10969 , Y02P70/611
Abstract: A circuit board device includes a circuit board comprising a mounting area, and first and second power lines and a ground pad formed on the mounting area, and a vertical multilayer chip capacitor (MLCC) comprising a capacitor body, a plurality of first and second polarity inner electrodes, first and second outer electrodes, and a third outer electrode, wherein the first and second power lines are separately disposed on the mounting area, connected to the first and second outer electrodes, and electrically connected to each other only by the vertical MLCC, and the ground pad is disposed between the first and second power lines and connected to the third outer electrode.
Abstract translation: 一种电路板装置，包括：电路板，包括安装区域;以及第一和第二电力线以及形成在所述安装区域上的接地焊盘;以及垂直多层片状电容器（MLCC），其包括电容器本体，多个第一和第二极性 内部电极，第一外部电极和第二外部电极以及第三外部电极，其中第一和第二电力线分别设置在安装区域上，连接到第一和第二外部电极，并且仅通过垂直MLCC 并且接地焊盘设置在第一和第二电源线之间并且连接到第三外部电极。
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公开(公告)号：US08081416B2
公开(公告)日：2011-12-20
申请号：US12267112
申请日：2008-11-07
Applicant: Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
Inventor： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
Abstract: A multilayer chip capacitor includes a capacitor body provided by a stack of a plurality of dielectric layers, a plurality of internal electrodes disposed in the capacitor body such that the internal electrodes of opposite polarities are alternately disposed to face each other with the dielectric layer interposed between each facing set of the internal electrodes, and a plurality of external electrodes disposed on an outer face of the capacitor body and electrically connected with the internal electrode. Each of the plurality of internal electrodes includes a main electrode part, and at least one lead extending from the main electrode part to a side face of the capacitor body and connected to a corresponding one of the external electrodes. The lead extends to the corresponding external electrode to be inclined with respect to the main electrode part thereof.
Abstract translation: 多层片状电容器包括：由多个电介质层的堆叠体构成的电容器主体，设置在电容器主体中的多个内部电极，使得相互极性的内部电极交替地配置成彼此面对，其中介电层介于 每个面对的内部电极组，以及多个外部电极，设置在电容器主体的外表面上并与内部电极电连接。 多个内部电极中的每一个包括主电极部分和从电极主体的主电极部分延伸到侧面的至少一个引线，并连接到对应的一个外部电极。 引线延伸到对应的外部电极，以相对于其主电极部分倾斜。
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公开(公告)号：US07974072B2
公开(公告)日：2011-07-05
申请号：US11979875
申请日：2007-11-09
Applicant: Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
Inventor： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
CPC classification number: H01G4/232 , H01G4/005 , H01G4/30 , H03H2001/0014
Abstract: A multilayer capacitor array having a plurality of multilayer capacitor devices formed in a single multilayer structure, the multilayer capacitor array including: a capacitor body formed by depositing a plurality of dielectric layers and having first and second side surfaces opposite to each other; a plurality of first polarity internal electrodes and second polarity internal electrodes, disposed oppositely to each other in the capacitor body, interposing the dielectric layer there between, and formed of a single electrode plate comprising a single lead, respectively; and a plurality of first polarity external electrodes and second polarity external electrodes, formed on the first side surface and second side surface, respectively, and connected to a correspondent polarity internal electrode via the lead, the first polarity external electrode formed on the first side surface and the second polarity external electrode formed on the second side surface, wherein the numbers of the first polarity external electrodes and the second polarity external electrodes are two or more, respectively, and are identical to each other, and a total number of the multilayer capacitor devices in the multilayer capacitor array is identical to the number of the first polarity external electrodes.
Abstract translation: 1.一种多层电容器阵列，具有形成为单层多层结构的多层多层电容器件，所述层叠电容器阵列包括：通过沉积多个电介质层而形成的电容器体，并且具有彼此相对的第一和第二侧面; 多个第一极性内部电极和第二极性内部电极，其彼此相对设置在电容器主体中，分别在其间插入电介质层，并由单个引线构成的单个电极板形成; 以及多个第一极性外部电极和第二极性外部电极，分别形成在所述第一侧面和所述第二侧面上，并且经由所述引线与相应的极性内部电极连接，所述第一极性外部电极形成在所述第一侧面 和形成在第二侧面上的第二极性外部电极，其中第一极性外部电极和第二极性外部电极的数量分别为两个或更多个，并且彼此相同，并且层叠电容器的总数 多层电容器阵列中的器件与第一极性外部电极的数量相同。
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公开(公告)号：US20110085277A1
公开(公告)日：2011-04-14
申请号：US12694926
申请日：2010-01-27
Applicant: Kang Heon HUR , Eun Hyuk Chae , Sung Kwon Wi , Doo Young Kim , Dong Seok Park , Byoung Hwa Lee , Sang Soo Park , Min Cheol Park , Hae Suk Chunk
Inventor： Kang Heon HUR , Eun Hyuk Chae , Sung Kwon Wi , Doo Young Kim , Dong Seok Park , Byoung Hwa Lee , Sang Soo Park , Min Cheol Park , Hae Suk Chunk
CPC classification number: H01G4/005
Abstract: A multilayer chip capacitor includes a capacitor body, a plurality of internal electrodes, and a plurality of external electrodes. The capacitor body is formed of a ceramic sintered product and has first and second side surfaces facing each other. The plurality of internal electrodes each of which has two leads extending to the first and second side surfaces of the capacitor body, respectively, are arranged such that the internal electrodes with one polarity and the internal electrodes with the other polarity are alternately stacked inside the capacitor body. The plurality of external electrodes are formed on the first and second side surfaces of the capacitor body along a stacked direction of the internal electrodes such that the external electrodes with one polarity and the external electrodes with the other polarity are alternately arranged on each of the first and second side surfaces, and are connected to the leads.
Abstract translation: 多层片状电容器包括电容器本体，多个内部电极和多个外部电极。 电容器体由陶瓷烧结体形成，并且具有彼此面对的第一和第二侧面。 分别具有分别延伸到电容器本体的第一和第二侧面的两个引线的多个内部电极被布置成使得具有一个极性的内部电极和具有另一个极性的内部电极交替堆叠在电容器内部 身体。 多个外部电极沿着内部电极的堆叠方向形成在电容器主体的第一和第二侧表面上，使得具有一个极性的外部电极和具有另一个极性的外部电极交替地布置在第一 和第二侧表面，并且连接到引线。
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