公开(公告)号：US06768140B1

公开(公告)日：2004-07-27

申请号：US10115317

申请日：2002-04-03

申请人： Kyushik Hong ,  Richard S. Burton ,  Noureddine Matine ,  Debora L. Green ,  Charles F. Krumm

发明人： Kyushik Hong ,  Richard S. Burton ,  Noureddine Matine ,  Debora L. Green ,  Charles F. Krumm

IPC分类号： H01L29737

CPC分类号： H01L29/66318 ,  H01L29/7304 ,  H01L29/7371

摘要： According to one exemplary embodiment, a heterojunction bipolar transistor comprises an emitter. The heterojunction bipolar transistor further comprises a first emitter cap comprising a first high-doped layer, a low-doped layer, and a second high-doped layer, where the first high-doped layer is situated on the emitter, the low-doped layer is situated on the first high-doped layer, and the second high-doped layer is situated on the low-doped layer. The first high-doped layer, the low-doped layer, and the second high-doped layer form an emitter ballast resistor. According to this exemplary embodiment, the low-doped layer has a thickness and a dopant concentration level such that the resistance of the low-doped layer is substantially independent of the dopant concentration level, but corresponds to the thickness of the low-doped layer.

摘要翻译： 根据一个示例性实施例，异质结双极晶体管包括发射极。 异质结双极晶体管还包括第一发射极帽，其包括第一高掺杂层，低掺杂层和第二高掺杂层，其中第一高掺杂层位于发射极上，低掺杂层 位于第一高掺杂层上，第二高掺杂层位于低掺杂层上。 第一高掺杂层，低掺杂层和第二高掺杂层形成发射极镇流电阻。 根据该示例性实施例，低掺杂层具有厚度和掺杂剂浓度水平，使得低掺杂层的电阻基本上与掺杂剂浓度水平无关，但对应于低掺杂层的厚度。

公开(公告)号：US5457399A

公开(公告)日：1995-10-10

申请号：US993767

申请日：1992-12-14

申请人： Charles F. Krumm

发明人： Charles F. Krumm

IPC分类号： G01R31/26 ,  G01R1/06 ,  G01R1/067 ,  G01R31/28 ,  H01L21/66

CPC分类号： G01R31/2884 ,  G01R1/06772 ,  G01R31/2831 ,  H01L22/14

摘要： The present invention performs RF performance measurements on basic transistors of a microwave monolithic integrated circuit while it is being fabricated. The circuitry necessary to assess the performance potential at the frequency and power levels of interest is provided by incorporating matching elements onto RF probes used for in-process tests. This invention measures the RF performance potential of GaAs monolithic microwave integrated circuits at an early stage in the process before expensive process sequence has been completed. The essence of the invention is that the transistors are measured with an RF probe that has RF matching circuitry included as an integral part of the probe. Consequently, the performance potential of circuits on the wafer is assessed at the earliest possible point in the manufacturing process; specifically as soon as Schottky barrier gates have been deposited. This in-process measurement approach may be applied to any microwave monolithic integrated circuit. Once the correlation between in-process and post-process measurement results are established, the present method may be used to routinely screen wafers, thereby saving roughly two-thirds of the processing costs of "RF bad" wafers.

摘要翻译： 本发明在制造微波单片集成电路的基本晶体管时进行RF性能测量。 通过将匹配元件合并到用于进程中测试的RF探针上，可以提供评估感兴趣频率和功率水平下的性能潜力所需的电路。 本发明在昂贵的处理顺序完成之前，在该过程的早期阶段测量了GaAs单片微波集成电路的射频性能。 本发明的实质是用RF探针测量晶体管，RF探头具有作为探头的组成部分的RF匹配电路。 因此，在制造过程中尽可能早地评估晶圆上电路的性能潜力; 一旦肖特基势垒门已经存放就可以。 这种在线测量方法可以应用于任何微波单片集成电路。 一旦建立了进程间和后处理测量结果之间的相关性，本方法可用于常规地筛选晶片，从而节省“RF不良”晶片的大约三分之二的处理成本。

公开(公告)号：US07505503B2

公开(公告)日：2009-03-17

申请号：US11678194

申请日：2007-02-23

申请人： Nguyen X. Nguyen ,  Charles F. Krumm

发明人： Nguyen X. Nguyen ,  Charles F. Krumm

IPC分类号： H01S5/183

CPC分类号： H01S5/18352 ,  H01S5/0282 ,  H01S5/0422 ,  H01S5/0425 ,  H01S5/18308 ,  H01S5/2063 ,  H01S2301/166 ,  H01S2301/176

摘要： A vertical cavity surface emitting laser (VCSEL) is disclosed that has a relatively low vertical resistance between the Ohmic contact to the upper distributed Bragg reflector (DBR) and the active layer, and a structure to substantially confine the current flow to the laser cavity so that the VCSEL can produce a more efficient and substantially single-mode output. In particular, the VCSEL includes a substrate, a lower DBR disposed over the substrate, an active layer disposed over the lower DBR, and an upper DBR. The upper DBR includes a groove and an Ohmic contact situated within the groove to lower the vertical resistance between the contact and the active layer. An ion implanted layer is also formed along the side wall of the active layer to substantially confine the current flow to the laser cavity.

摘要翻译： 公开了一种垂直腔表面发射激光器（VCSEL），其在与上分布布拉格反射器（DBR）的欧姆接触和有源层之间具有相对低的垂直电阻，以及将电流基本上限制到激光腔的结构， VCSEL可以产生更有效和基本上单模式的输出。 特别地，VCSEL包括衬底，设置在衬底上的下DBR，设置在下DBR上的有源层和上DBR。 上DBR包括凹槽和位于凹槽内的欧姆接触，以降低触点和有源层之间的垂直电阻。 离子注入层也沿着有源层的侧壁形成，以将电流基本上限制到激光腔。

公开(公告)号：US20080205465A1

公开(公告)日：2008-08-28

申请号：US11678194

申请日：2007-02-23

申请人： Nguyen X. Nguyen ,  Charles F. Krumm

发明人： Nguyen X. Nguyen ,  Charles F. Krumm

IPC分类号： H01S5/187

CPC分类号： H01S5/18352 ,  H01S5/0282 ,  H01S5/0422 ,  H01S5/0425 ,  H01S5/18308 ,  H01S5/2063 ,  H01S2301/166 ,  H01S2301/176

摘要： A vertical cavity surface emitting laser (VCSEL) is disclosed that has a relatively low vertical resistance between the Ohmic contact to the upper distributed Bragg reflector (DBR) and the active layer, and a structure to substantially confine the current flow to the laser cavity so that the VCSEL can produce a more efficient and substantially single-mode output. In particular, the VCSEL includes a substrate, a lower DBR disposed over the substrate, an active layer disposed over the lower DBR, and an upper DBR. The upper DBR includes a groove and an Ohmic contact situated within the groove to lower the vertical resistance between the contact and the active layer. An ion implanted layer is also formed along the side wall of the active layer to substantially confine the current flow to the laser cavity.

摘要翻译： 公开了一种垂直腔表面发射激光器（VCSEL），其在与上分布布拉格反射器（DBR）的欧姆接触和有源层之间具有相对低的垂直电阻，以及将电流基本上限制到激光腔的结构， VCSEL可以产生更有效和基本上单模式的输出。 特别地，VCSEL包括衬底，设置在衬底上的下DBR，设置在下DBR上的有源层和上DBR。 上DBR包括凹槽和位于凹槽内的欧姆接触，以降低触点和有源层之间的垂直电阻。 离子注入层也沿着有源层的侧壁形成，以将电流基本上限制到激光腔。

公开(公告)号：US5049971A

公开(公告)日：1991-09-17

申请号：US614579

申请日：1990-11-15

申请人： Charles F. Krumm

发明人： Charles F. Krumm

IPC分类号： H01L29/06 ,  H03K17/00 ,  H03K17/56 ,  H03K17/84

CPC分类号： H01L29/0661 ,  H03K17/56 ,  H03K17/84 ,  H03K2217/0036

摘要： A device useful both as a switch and power limiter and particularly adapted for use in microwave application. The device is made with conventional FET processing technology, a current conducting layer being formed at a surface of a substrate, the device then being electrically isolated by using any one of a number of conventional processes. Ohmic contacts are deposited to make electrical contact at the conducting layer. A groove is then cut with a focused ion beam across the conducting layer and between the ohmic contacts. The length of the groove controls the threshold voltage for the device and the depth controls the saturation current. Very low values of saturation current can be obtained by controlling the groove dimensions thus significantly reducing the DC power drain when the device is operated just above saturation. A very high differential resistance ratio is obtained by adjusting the threshold voltage of the device.

摘要翻译： 用作开关和功率限制器并且特别适用于微波应用的装置。 该装置由常规的FET处理技术制成，在衬底的表面上形成电流导电层，然后通过使用多种常规工艺中的任何一种将该器件电隔离。 沉积欧姆接触以在导电层处电接触。 然后用聚焦离子束在导电层和欧姆接触之间切割凹槽。 凹槽的长度控制器件的阈值电压，深度控制饱和电流。 通过控制沟槽尺寸可以获得非常低的饱和电流值，从而在器件刚刚高于饱和时显着降低直流功率消耗。 通过调节器件的阈值电压可获得非常高的差分电阻比。

公开(公告)号：US4313126A

公开(公告)日：1982-01-26

申请号：US41156

申请日：1979-05-21

申请人： Charles F. Krumm ,  Robert A. Pucel

发明人： Charles F. Krumm ,  Robert A. Pucel

IPC分类号： H01L29/08 ,  H01L29/423 ,  H01L29/812 ,  H01L29/80

CPC分类号： H01L29/42316 ,  H01L29/0891 ,  H01L29/8124

摘要： A field effect transistor is provided wherein a semiconductor body has a source region and a plurality of drain regions with a gate region common to the plurality of drain regions. A common gate electrode is formed over the common gate region to control the flow of carriers to each one of the plurality of drain regions. With such arrangement an efficient multi-drain field effect transistor is provided through the use of a common gate electrode formed on the semiconductor body.

摘要翻译： 提供一种场效应晶体管，其中半导体本体具有源极区和多个具有与多个漏极区共同的栅极区的漏极区。 公共栅极电极形成在公共栅极区域上以控制载流子流到多个漏极区域中的每一个。 通过这种布置，通过使用形成在半导体主体上的公共栅电极来提供有效的多漏极场效应晶体管。