公开(公告)号：US20050285233A1

公开(公告)日：2005-12-29

申请号：US10876010

申请日：2004-06-24

申请人： Kun-Ming Huang ,  Cheng-Fu Hsu

发明人： Kun-Ming Huang ,  Cheng-Fu Hsu

IPC分类号： H01L21/336 ,  H01L23/58 ,  H01L29/786

CPC分类号： H01L29/66765 ,  H01L27/1248 ,  H01L29/78669 ,  H01L29/78678

摘要： A thin film transistor device structure and a method for fabricating the thin film transistor device structure each comprise a thin film transistor device formed over a substrate. The thin film transistor device structure also comprises a passivation layer formed of a silicon rich silicon oxide material formed over the thin film transistor device. The passivation layer formed of the silicon rich silicon oxide material provides the thin film transistor device with enhanced performance.

摘要翻译： 薄膜晶体管器件结构和制造薄膜晶体管器件结构的方法各自包括在衬底上形成的薄膜晶体管器件。 薄膜晶体管器件结构还包括由形成在薄膜晶体管器件上的富硅氧化物材料形成的钝化层。 由富硅氧化物材料形成的钝化层提供具有增强性能的薄膜晶体管器件。

公开(公告)号：US20050006701A1

公开(公告)日：2005-01-13

申请号：US10614462

申请日：2003-07-07

申请人： Tzu-Chiang Sung ,  Cheng-Fu Hsu

发明人： Tzu-Chiang Sung ,  Cheng-Fu Hsu

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/08 ,  H01L29/76 ,  H01L29/78 ,  H01L29/94

CPC分类号： H01L29/7816 ,  H01L21/823814 ,  H01L21/823878 ,  H01L21/823892 ,  H01L29/0847 ,  H01L29/086 ,  H01L29/66659 ,  H01L29/66674 ,  H01L29/7801 ,  H01L29/7835

摘要： A high voltage device comprising a substrate of a first type, a first and second well respectively of the first and a second type in the substrate, a gate formed on the substrate, a first and second doped region both of the second type, respectively formed in the first and second well and both sides of the gate, and a third doped region of the first type in the first well and adjacent to the first doped region.

摘要翻译： 一种高电压装置，包括第一类型的衬底，分别位于衬底中的第一和第二类型的第一阱和第二阱，形成在衬底上的栅极，第二类型的第一和第二掺杂区域，分别形成 在栅极的第一和第二阱和两侧，以及在第一阱中并与第一掺杂区相邻的第一类型的第三掺杂区。

公开(公告)号：US08907739B2

公开(公告)日：2014-12-09

申请号：US13181609

申请日：2011-07-13

申请人： Guang-Hwa Shiue ,  Che-Ming Hsu ,  Cheng-Fu Hsu

发明人： Guang-Hwa Shiue ,  Che-Ming Hsu ,  Cheng-Fu Hsu

IPC分类号： H01P3/08 ,  H05K1/02 ,  H03H1/00

CPC分类号： H01P3/08 ,  H03H2001/0085 ,  H05K1/0245

摘要： A differential signal line structure is disposed on a substrate including a signal layer, a filter layer and a grounding layer. The signal layer, the filter layer and the grounding layer are arranged from up to down and in parallel manner. The differential signal line structure accordingly includes a differential signal line group, a first wire and a first grounding circuit; the differential signal line group is disposed in the signal layer; and the first wire is disposed in the filter layer and is arranged in a corresponding position right underneath the differential signal line group. The first grounding circuit is disposed in the grounding layer and is electrically connected to an end point of the first wire through a first via.

摘要翻译： 差分信号线结构设置在包括信号层，滤波层和接地层的基板上。 信号层，过滤层和接地层从上到下并行布置。 差分信号线结构相应地包括差分信号线组，第一线和第一接地电路; 差分信号线组设置在信号层中; 并且第一线路布置在滤波器层中并且布置在差分信号线组下方的对应位置。 第一接地电路设置在接地层中，并通过第一通孔电连接到第一导线的端点。

公开(公告)号：US07221039B2

公开(公告)日：2007-05-22

申请号：US10876010

申请日：2004-06-24

申请人： Kun-Ming Huang ,  Cheng-Fu Hsu

发明人： Kun-Ming Huang ,  Cheng-Fu Hsu

IPC分类号： H01L23/58

CPC分类号： H01L29/66765 ,  H01L27/1248 ,  H01L29/78669 ,  H01L29/78678

摘要： A thin film transistor device structure and a method for fabricating the thin film transistor device structure each comprise a thin film transistor device formed over a substrate. The thin film transistor device structure also comprises a passivation layer formed of a silicon rich silicon oxide material formed over the thin film transistor device. The passivation layer formed of the silicon rich silicon oxide material provides the thin film transistor device with enhanced performance.

摘要翻译： 薄膜晶体管器件结构和制造薄膜晶体管器件结构的方法各自包括在衬底上形成的薄膜晶体管器件。 薄膜晶体管器件结构还包括由形成在薄膜晶体管器件上的富硅氧化物材料形成的钝化层。 由富硅氧化物材料形成的钝化层提供具有增强性能的薄膜晶体管器件。

公开(公告)号：US6077776A

公开(公告)日：2000-06-20

申请号：US40434

申请日：1998-03-18

申请人： Ching-Wen Cho ,  Cheng-Fu Hsu ,  Sen-Fu Chen ,  Po-Tao Chu

发明人： Ching-Wen Cho ,  Cheng-Fu Hsu ,  Sen-Fu Chen ,  Po-Tao Chu

IPC分类号： H01L21/28 ,  H01L21/3105 ,  H01L21/4763

CPC分类号： H01L21/28123 ,  H01L21/28035 ,  H01L21/3105 ,  Y10S438/906

摘要： A new method of removing impurities and moisture from the surface of a wafer and thereby preventing polysilicon residue is described. A dielectric layer is provided over the surface of a semiconductor substrate. A polysilicon layer is deposited overlying the dielectric layer. A hard mask layer is deposited overlying the polysilicon layer and patterned to form a hard mask. The wafer is cleaned whereby moisture and impurities form on the surfaces of the hard mask and the polysilicon layer. Thereafter, the wafer is heat treated whereby the moisture and impurities are removed. Thereafter, the polysilicon layer is etched away where it is not covered by the hard mask to complete formation of a polysilicon line on a wafer in the fabrication of an integrated circuit.

摘要翻译： 描述了从晶片表面去除杂质和水分从而防止多晶硅残渣的新方法。 在半导体衬底的表面上设置电介质层。 沉积覆盖在电介质层上的多晶硅层。 沉积覆盖多晶硅层的硬掩模层并图案化以形成硬掩模。 清洁晶片，从而在硬掩模和多晶硅层的表面上形成水分和杂质。 此后，对晶片进行热处理，除去水分和杂质。 此后，多晶硅层被蚀刻掉，其中它不被硬掩模覆盖，以在集成电路的制造中在晶片上完成多晶硅线的形成。

公开(公告)号：US20120032749A1

公开(公告)日：2012-02-09

申请号：US13181609

申请日：2011-07-13

申请人： Guang-Hwa SHIUE ,  Che-Ming HSU ,  Cheng-Fu HSU

发明人： Guang-Hwa SHIUE ,  Che-Ming HSU ,  Cheng-Fu HSU

IPC分类号： H01P3/08

CPC分类号： H01P3/08 ,  H03H2001/0085 ,  H05K1/0245

摘要： A differential signal line structure is disposed on a substrate including a signal layer, a filter layer and a grounding layer. The signal layer, the filter layer and the grounding layer are arranged from up to down and in parallel manner. The differential signal line structure accordingly includes a differential signal line group, a first wire and a first grounding circuit; the differential signal line group is disposed in the signal layer; and the first wire is disposed in the filter layer and is arranged in a corresponding position right underneath the differential signal line group. The first grounding circuit is disposed in the grounding layer and is electrically connected to an end point of the first wire through a first via.

摘要翻译： 差分信号线结构设置在包括信号层，滤波层和接地层的基板上。 信号层，过滤层和接地层从上到下并行布置。 差分信号线结构相应地包括差分信号线组，第一线和第一接地电路; 差分信号线组设置在信号层中; 并且第一线路布置在滤波器层中并且布置在差分信号线组下方的对应位置。 第一接地电路设置在接地层中，并通过第一通孔电连接到第一导线的端点。