公开(公告)号：US20080237854A1

公开(公告)日：2008-10-02

申请号：US11690862

申请日：2007-03-26

Applicant: Ping-Chang Wu ,  Chieh-Ching Huang

Inventor： Ping-Chang Wu ,  Chieh-Ching Huang

IPC: H01L23/48

CPC classification number: H01L24/10 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2924/00014

Abstract: First, a substrate having a conductor therein is provided. Next, a first dielectric layer is disposed on the conductor and the substrate and a first opening is formed in the first dielectric layer for exposing the conductor. A first metal layer is deposited over the surface of the first dielectric layer and into the first opening. Next, an etching stop layer and a second metal layer are deposited over the surface of the first metal layer, and a pattern transfer process is performed by using a second dielectric layer as a mask to remove a portion of the first metal layer, the etching stop layer, and the second metal layer for exposing the first dielectric layer. A passivation layer is disposed on the second metal layer and the first dielectric layer and a second opening is formed in the passivation layer to expose a portion of the second metal layer.

Abstract translation: 首先，提供具有导体的基板。 接下来，在导体和基板上设置第一电介质层，并且在第一电介质层中形成第一开口以暴露导体。 第一金属层沉积在第一介电层的表面上并进入第一开口。 接下来，在第一金属层的表面上沉积蚀刻停止层和第二金属层，并且通过使用第二介电层作为掩模来执行图案转移处理以去除第一金属层的一部分，蚀刻 停止层和用于暴露第一介电层的第二金属层。 钝化层设置在第二金属层上，第一介电层和第二开口形成在钝化层中以暴露第二金属层的一部分。

公开(公告)号：US20080303177A1

公开(公告)日：2008-12-11

申请号：US11759003

申请日：2007-06-06

Applicant: Ping-Chang Wu ,  Chieh-Ching Huang ,  Kuang-Hui Tang

Inventor： Ping-Chang Wu ,  Chieh-Ching Huang ,  Kuang-Hui Tang

IPC: H01L23/52

CPC classification number: H01L24/05 ,  H01L22/32 ,  H01L2224/02166 ,  H01L2224/05093 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A bonding pad structure including a bonding pad and a passivation layer is described. The bonding pad is disposed on a chip. The passivation layer covers the bonding pad. In addition, the passivation layer has a first opening exposing a bonding region of the bonding pad and a second opening exposing a probing region of the bonding pad, respectively.

Abstract translation: 描述了包括接合焊盘和钝化层的接合焊盘结构。 接合焊盘设置在芯片上。 钝化层覆盖接合焊盘。 此外，钝化层具有暴露接合焊盘的接合区域的第一开口和分别暴露接合焊盘的探测区域的第二开口。

公开(公告)号：US20090033346A1

公开(公告)日：2009-02-05

申请号：US11830833

申请日：2007-07-30

Applicant: Ping-Chang Wu ,  Chieh-Ching Huang

Inventor： Ping-Chang Wu ,  Chieh-Ching Huang

IPC: G01R1/073

CPC classification number: G01R31/2884 ,  H01L24/06 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/11 ,  H01L2924/14 ,  H01L2924/00

Abstract: A group probing over active area (POAA) pads arrangement includes a chip having a set of bonding pads, at least a first set of probing pads and a second set of probing pads. Each of the first set of probing pads and the second set of probing pads are electrically connected to one of the corresponding bonding pads, respectively. And each of the first set of probing pads and the second set of probing pads are interlaced in a diagonal line pattern. According to a concept of grouping and interlacing the probing pads, each bonding pad obtains at least two probing pads. Therefore times of test probing performed on each probing pad are reduced and repeated probe's pressures toward inter metal dielectric (IMD) layers underneath the probing pads are consequently reduced.

Abstract translation: 探测有源区（POAA）焊盘布置的组包括具有一组焊盘，至少第一组探测焊盘和第二组探测焊盘的芯片。 第一组探测焊盘和第二组探测焊盘中的每一个分别电连接到相应的焊盘之一。 并且第一组探测垫和第二组探测垫中的每一个以对角线图案交织。 根据探测焊盘的分组和隔行扫描的概念，每个焊盘获得至少两个探测焊盘。 因此，在每个探测垫上执行的测试探测次数减少，并且因此减少探针对探测垫下方的金属间电介质（IMD）层的压力。

公开(公告)号：US20080246144A1

公开(公告)日：2008-10-09

申请号：US11695617

申请日：2007-04-03

Applicant: Ping-Chang Wu ,  Chieh-Ching Huang

Inventor： Ping-Chang Wu ,  Chieh-Ching Huang

IPC: H01L23/48 ,  H01L21/4763

CPC classification number: H01L24/05 ,  H01L22/32 ,  H01L24/03 ,  H01L24/11 ,  H01L2224/02166 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04073 ,  H01L2224/05558 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/00014 ,  H01L2224/05552

Abstract: A method for fabricating a contact pad is disclosed. A first metal layer is disposed on a substrate for serving as a probing region. A second metal layer is disposed on the substrate thereafter to serve as an electrical connection region. Preferably, the first metal layer and the second metal layer are composed of different material and are electrically connected. The present invention uses two different metals to form a probing region and an electrical connection region of a contact pad. The probing region is used for providing a contacting surface for a test probe, whereas the electrical connection region is used for establishing an electrical connection in the later bumping or wire bonding process. By providing a contact pad having two different regions, the present invention is able to achieve probing process while prevent the surface of the contact pad from being damaged by the contact of test probes.

Abstract translation: 公开了一种用于制造接触垫的方法。 第一金属层设置在用作探测区域的基板上。 第二金属层之后设置在基板上用作电连接区域。 优选地，第一金属层和第二金属层由不同的材料构成并且电连接。 本发明使用两种不同的金属来形成接触垫的探测区域和电连接区域。 探测区域用于提供用于测试探针的接触表面，而电连接区域用于在稍后的凸起或引线接合过程中建立电连接。 通过提供具有两个不同区域的接触垫，本发明能够实现探测过程，同时防止接触垫的表面被测试探针的接触损坏。