Duty cycle generator and power converter
    1.
    发明授权
    Duty cycle generator and power converter 有权
    占空比发电机和电源转换器

    公开(公告)号:US08570016B1

    公开(公告)日:2013-10-29

    申请号:US13586849

    申请日:2012-08-15

    IPC分类号: H02M3/156 H02M3/157

    摘要: A duty cycle generator for generating a duty cycle signal to a power converter is disclosed. The duty cycle generator includes a first inverter, a second inverter, a signal protection unit including an input terminal coupled to the duty cycle signal for generating a break pulse to generate a protected duty cycle signal, a comparator for comparing a triangle-wave signal with a comparison signal to generate a comparison result, a NOR gate for generating a reset signal according to the comparison result and the protected duty cycle signal, an SR-latch for outputting a turn-on signal according to the clock signal and the reset signal, and an AND gate for generating the duty cycle signal according to the inverted clock signal and the turn-on signal.

    摘要翻译: 公开了一种用于向功率转换器产生占空比信号的占空比发生器。 占空比发生器包括第一反相器,第二反相器,信号保护单元,包括耦合到占空比信号的输入端,用于产生中断脉冲以产生受保护的占空比信号;比较器,用于将三角波信号与 用于产生比较结果的比较信号,用于根据比较结果和受保护的占空比信号产生复位信号的或非门,用于根据时钟信号和复位信号输出导通信号的SR锁存器, 以及与门,用于根据反相时钟信号和导通信号产生占空比信号。

    Control circuit and bulk DC/DC converter in constant on-time mode
    2.
    发明授权
    Control circuit and bulk DC/DC converter in constant on-time mode 有权
    控制电路和批量DC / DC转换器处于恒定导通时间模式

    公开(公告)号:US08416588B2

    公开(公告)日:2013-04-09

    申请号:US12970957

    申请日:2010-12-17

    申请人: Chih-Yuan Chen

    发明人: Chih-Yuan Chen

    IPC分类号: H02M3/335

    CPC分类号: H02M3/156 H02M2001/0025

    摘要: Constant on-time control circuit includes a comparing circuit including a comparator including a positive input end for receiving a control voltage; a negative input end for receiving a feedback voltage from the output voltage of the DC/DC converter; and an output end for outputting a comparing signal; and a voltage adjusting circuit coupled to the output end of the comparator for adjusting the control voltage; and a pulse generator coupled to the output end of the comparator for generating a pulse signal to control a switch set of the DC/DC converter according to the comparing signal.

    摘要翻译: 恒定导通时间控制电路包括:比较电路,包括:比较器,包括用于接收控制电压的正输入端; 负输入端,用于从DC / DC转换器的输出电压接收反馈电压; 以及输出端,用于输出比较信号; 以及电压调节电路,其耦合到所述比较器的输出端,用于调节所述控制电压; 以及脉冲发生器,其耦合到比较器的输出端,用于产生脉冲信号,以根据比较信号控制DC / DC转换器的开关组。

    Dynamic random access memory cell and array having vertical channel transistor
    3.
    发明授权
    Dynamic random access memory cell and array having vertical channel transistor 有权
    具有垂直沟道晶体管的动态随机存取存储单元和阵列

    公开(公告)号:US08324682B2

    公开(公告)日:2012-12-04

    申请号:US13030116

    申请日:2011-02-17

    IPC分类号: H01L29/772

    CPC分类号: H01L27/10826 H01L27/10879

    摘要: A dynamic random access memory cell having vertical channel transistor includes a semiconductor pillar, a drain layer, an assisted gate, a control gate, a source layer, and a capacitor. The vertical channel transistor has an active region formed by the semiconductor pillar. The drain layer is formed at the bottom of the semiconductor pillar. The assisted gate is formed beside the drain layer, and separated from the drain layer by a first gate dielectric layer. The control gate is formed beside the semiconductor pillar, and separated from the active region by a second gate dielectric layer. The source layer is formed at the top of the semiconductor pillar. The capacitor is formed to electrical connect to the source layer.

    摘要翻译: 具有垂直沟道晶体管的动态随机存取存储器单元包括半导体柱,漏极层,辅助栅极,控制栅极,源极层和电容器。 垂直沟道晶体管具有由半导体柱形成的有源区。 漏极层形成在半导体柱的底部。 辅助栅极形成在漏极层旁边,并且通过第一栅极介电层与漏极层分离。 控制栅极形成在半导体柱旁边,并通过第二栅极介电层与有源区分离。 源极层形成在半导体柱的顶部。 电容器形成为电连接到源层。

    Control circuit and bulk DC/DC converter in constant on-time mode
    4.
    发明申请
    Control circuit and bulk DC/DC converter in constant on-time mode 有权
    控制电路和批量DC / DC转换器处于恒定导通时间模式

    公开(公告)号:US20120126766A1

    公开(公告)日:2012-05-24

    申请号:US12970957

    申请日:2010-12-17

    申请人: Chih-Yuan Chen

    发明人: Chih-Yuan Chen

    IPC分类号: G05F1/618

    CPC分类号: H02M3/156 H02M2001/0025

    摘要: Constant on-time control circuit includes a comparing circuit including a comparator including a positive input end for receiving a control voltage; a negative input end for receiving a feedback voltage from the output voltage of the DC/DC converter; and an output end for outputting a comparing signal; and a voltage adjusting circuit coupled to the output end of the comparator for adjusting the control voltage; and a pulse generator coupled to the output end of the comparator for generating a pulse signal to control a switch set of the DC/DC converter according to the comparing signal.

    摘要翻译: 恒定导通时间控制电路包括:比较电路,包括:比较器,包括用于接收控制电压的正输入端; 负输入端,用于从DC / DC转换器的输出电压接收反馈电压; 以及输出端,用于输出比较信号; 以及电压调节电路,其耦合到所述比较器的输出端,用于调节所述控制电压; 以及脉冲发生器,其耦合到比较器的输出端,用于产生脉冲信号,以根据比较信号控制DC / DC转换器的开关组。

    Method and apparatus for deciding spherical aberration compensation value
    5.
    发明授权
    Method and apparatus for deciding spherical aberration compensation value 有权
    用于确定球面像差补偿值的方法和装置

    公开(公告)号:US08081544B2

    公开(公告)日:2011-12-20

    申请号:US12352927

    申请日:2009-01-13

    IPC分类号: G11B7/00

    摘要: A method and an apparatus for deciding a spherical aberration compensation (SAC) value for an optical storage medium are provided. The optical storage medium comprises at least one recording layer and a cover layer. The SAC value is suitable for a selected one of the at least one recording layer. First, a focus search on the optical storage medium is performed to derive a focus error (FE) signal in response to a testing SAC value. Then, a center level and a center basis corresponding to the testing SAC value according to the FE signal is determined. The SAC value according to the center level, the center basis, and the testing SAC value is also determined. When the center level and the center basis are equal, the SAC value is determined to be the testing SAC value.

    摘要翻译: 提供了一种用于决定光学存储介质的球面像差补偿(SAC)值的方法和装置。 光学存储介质包括至少一个记录层和覆盖层。 SAC值适合于至少一个记录层中的所选择的一个。 首先,执行光存储介质上的聚焦搜索以根据测试SAC值导出聚焦误差(FE)信号。 然后,确定与根据FE信号的测试SAC值对应的中心水平和中心基准。 根据中心水平,中心基准和测试SAC值的SAC值也被确定。 当中心水平和中心基数相等时,SAC值被确定为测试SAC值。

    Sigma-delta modulator architecture capable of automatically improving dynamic range method for the same
    6.
    发明授权
    Sigma-delta modulator architecture capable of automatically improving dynamic range method for the same 有权
    Sigma-delta调制器架构能够自动提高动态范围的方法

    公开(公告)号:US07800524B2

    公开(公告)日:2010-09-21

    申请号:US12431241

    申请日:2009-04-28

    IPC分类号: H03M3/00

    摘要: The present invention discloses a sigma-delta modulator architecture capable of automatically improving dynamic range and a method for the same. Based on the concept that different dynamic ranges of a sigma-delta modulator can be obtained via adjusting the signal power gain thereof, the present invention provides a novel algorithm to implement an automation program. The present invention finds out several sets of dynamic-range curves to improve the overall dynamic range. Via a high-level sigma-delta modulator architecture, the present invention can calculate the required feedforward coefficients. Further, the present invention install in the sigma-delta modulator architecture with four additional components, including a peak detection unit, a comparator unit, a digital coefficient control unit and a switch unit, to dynamically detect the output of the sigma-delta modulator and dynamically modify the feedforward coefficient of the sigma-delta modulator. Thus is extended the dynamic range of the sigma-delta modulator.

    摘要翻译: 本发明公开了一种能够自动改善动态范围的Σ-Δ调制器架构及其方法。 基于通过调整其信号功率增益可以获得Σ-Δ调制器的不同动态范围的概念,本发明提供了一种实现自动化程序的新颖算法。 本发明找出了几组动态范围曲线来改善整体动态范围。 通过高级Σ-Δ调制器架构,本发明可以计算所需的前馈系数。 此外,本发明安装在具有四个附加组件的Σ-Δ调制器架构中,其中包括峰值检测单元,比较器单元,数字系数控制单元和开关单元,以动态地检测Σ-Δ调制器的输出, 动态地修改Σ-Δ调制器的前馈系数。 因此扩展了Σ-Δ调制器的动态范围。

    High Frequency Modulation of a Light Beam in Optical Recording
    7.
    发明申请
    High Frequency Modulation of a Light Beam in Optical Recording 有权
    光记录中光束的高频调制

    公开(公告)号:US20100214899A1

    公开(公告)日:2010-08-26

    申请号:US12773569

    申请日:2010-05-04

    IPC分类号: G11B7/0045

    摘要: An optical storage system modulates a laser beam based on a high frequency modulation (HFM) signal and a pattern to be recorded on an optical storage medium. At least one of an amplitude and a frequency of the HFM signal is adjusted when using the light beam to record the pattern on the optical storage medium or read data from the medium.

    摘要翻译: 光存储系统基于要记录在光存储介质上的高频调制(HFM)信号和图案来调制激光束。 当使用光束将图案记录在光学存储介质上或从介质读取数据时,调整HFM信号的振幅和频率中的至少一个。

    Enhanced Wavelength-Converting Structure
    8.
    发明申请
    Enhanced Wavelength-Converting Structure 失效
    增强波长转换结构

    公开(公告)号:US20100033947A1

    公开(公告)日:2010-02-11

    申请号:US12186725

    申请日:2008-08-06

    IPC分类号: F21V9/16 G02F2/02

    摘要: An enhanced wavelength-converting structure is disclosed. The enhanced wavelength-converting structure includes a substrate, a wavelength-converting layer arranged next to the substrate, and a wavelength-selective reflecting layer arranged next to the wavelength-converting layer. The wavelength-converting layer converts the first light into the second light. A part of the second light radiating backward to the light source is further reflected toward the substrate by the wavelength-selective reflecting layer to form the enhanced second light by combining with another part of the second light radiating toward the substrate.

    摘要翻译: 公开了一种增强的波长转换结构。 增强的波长转换结构包括衬底,布置在衬底旁边的波长转换层和布置在波长转换层旁边的波长选择反射层。 波长转换层将第一光转换成第二光。 通过波长选择性反射层将朝向光源的后方的第二光的一部分进一步反射到基板,通过与朝向基板辐射的第二光的另一部分结合而形成增强的第二光。

    White Light Emitting Diode Module
    9.
    发明申请
    White Light Emitting Diode Module 审中-公开
    白光发光二极管模块

    公开(公告)号:US20090262526A1

    公开(公告)日:2009-10-22

    申请号:US12104708

    申请日:2008-04-17

    IPC分类号: F21V9/02 H01L27/28

    摘要: The white LED module includes a packaging housing having a containing chamber, an LED chipset disposed in the containing chamber, and a shared flat wavelength-converting structure disposed on the packaging housing. The LED chipset could illuminate an original light with at least two wavelengths. The original light may be diffused with the shared flat wavelength-converting structure and may be partially converted into a converted light with the shared flat wavelength-converting structure. The converted light and the original light are mixed to form a white light.

    摘要翻译: 白色LED模块包括具有容纳室的包装壳体,设置在容纳室中的LED芯片组,以及设置在包装壳体上的共享扁平波长转换结构。 LED芯片组可以照亮至少两个波长的原始光。 原始光可以用共享的平坦波长转换结构扩散,并且可以被共享的平坦波长转换结构部分地转换成转换的光。 将转换的光和原始光混合以形成白光。

    Method and Apparatus for Deciding Spherical Aberration Compensation Value
    10.
    发明申请
    Method and Apparatus for Deciding Spherical Aberration Compensation Value 有权
    用于确定球面像差补偿值的方法和装置

    公开(公告)号:US20090180362A1

    公开(公告)日:2009-07-16

    申请号:US12352927

    申请日:2009-01-13

    IPC分类号: G11B7/00

    摘要: A method and an apparatus for deciding a spherical aberration compensation (SAC) value for an optical storage medium are provided. The optical storage medium comprises at least one recording layer and a cover layer. The SAC value is suitable for a selected one of the at least one recording layer. First, a focus search on the optical storage medium is performed to derive a focus error (FE) signal in response to a testing SAC value. Then, a center level and a center basis corresponding to the testing SAC value according to the FE signal is determined. The SAC value according to the center level, the center basis, and the testing SAC value is also determined. When the center level and the center basis are equal, the SAC value is determined to be the testing SAC value.

    摘要翻译: 提供了一种用于决定光学存储介质的球面像差补偿(SAC)值的方法和装置。 光学存储介质包括至少一个记录层和覆盖层。 SAC值适合于至少一个记录层中的所选择的一个。 首先,执行光学存储介质上的聚焦搜索以根据测试SAC值导出聚焦误差(FE)信号。 然后,确定与根据FE信号的测试SAC值对应的中心水平和中心基准。 根据中心水平,中心基准和测试SAC值的SAC值也被确定。 当中心水平和中心基数相等时,SAC值被确定为测试SAC值。