利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

109 条记录 (耗时 0.032 秒)

    Method for reducing interfacial layer thickness for high-K and metal gate stack
    1.
    发明授权
    Method for reducing interfacial layer thickness for high-K and metal gate stack 有权
    降低高K和金属栅极叠层的界面层厚度的方法

    公开(公告)号：US08268683B2

    公开(公告)日：2012-09-18

    申请号：US12782859

    申请日：2010-05-19

    申请人： Liang-Gi Yao ,  Chun-Hu Cheng ,  Chen-Yi Lee ,  Jeff J. Xu ,  Clement Hsingjen Wann

    发明人： Liang-Gi Yao ,  Chun-Hu Cheng ,  Chen-Yi Lee ,  Jeff J. Xu ,  Clement Hsingjen Wann

    IPC分类号： H01L21/8249

    CPC分类号： H01L29/513 ,  H01L21/02172 ,  H01L21/022 ,  H01L21/28158 ,  H01L21/28211 ,  H01L21/283 ,  H01L29/42364 ,  H01L29/517 ,  H01L29/78

    摘要： A method for reducing interfacial layer (IL) thickness for high-k dielectrics and metal gate stack is provided. In one embodiment, the method includes forming an interfacial layer on a semiconductor substrate, etching back the interfacial layer, depositing a high-k dielectric material over the interfacial layer, and forming a metal gate over the high-k dielectric material. The IL can be chemical oxide, ozonated oxide, thermal oxide, or formed by ultraviolet ozone (UVO) oxidation process from chemical oxide, etc. The etching back of IL can be performed by a Diluted HF (DHF) process, a vapor HF process, or any other suitable process. The method can further include performing UV curing or low thermal budget annealing on the interfacial layer before depositing the high-k dielectric material.

    摘要翻译： 提供了一种用于降低高k电介质和金属栅极叠层的界面层（IL）厚度的方法。 在一个实施例中，该方法包括在半导体衬底上形成界面层，蚀刻回界面层，在界面层上沉积高k电介质材料，以及在高k电介质材料上形成金属栅极。 IL可以是化学氧化物，臭氧化氧化物，热氧化物，或者由化学氧化物等的紫外线臭氧（UVO）氧化过程形成.II的回蚀可以通过稀释HF（DHF）工艺，蒸气HF工艺 ，或任何其他合适的过程。 该方法还可以包括在沉积高k介电材料之前在界面层上进行UV固化或低热预算退火。

    Multi-layer scavenging metal gate stack for ultra-thin interfacial dielectric layer
    4.
    发明授权
    Multi-layer scavenging metal gate stack for ultra-thin interfacial dielectric layer 有权
    用于超薄界面介电层的多层清扫金属栅极叠层

    公开(公告)号：US08766379B2

    公开(公告)日：2014-07-01

    申请号：US13239804

    申请日：2011-09-22

    申请人： Kuan-Ting Liu ,  Liang-Gi Yao ,  Yasutoshi Okuno ,  Clement Hsingjen Wann

    发明人： Kuan-Ting Liu ,  Liang-Gi Yao ,  Yasutoshi Okuno ,  Clement Hsingjen Wann

    IPC分类号： H01L21/02

    CPC分类号： H01L21/823842 ,  H01L21/28008 ,  H01L21/28079 ,  H01L21/28088 ,  H01L27/092 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

    摘要： A multi-layer scavenging metal gate stack, and methods of manufacturing the same, are disclosed. In an example, a gate stack disposed over a semiconductor substrate includes an interfacial dielectric layer disposed over the semiconductor substrate, a high-k dielectric layer disposed over the interfacial dielectric layer, a first conductive layer disposed over the high-k dielectric layer, and a second conductive layer disposed over the first conductive layer. The first conductive layer includes a first metal layer disposed over the high-k dielectric layer, a second metal layer disposed over the first metal layer, and a third metal layer disposed over the second metal layer. The first metal layer includes a material that scavenges oxygen impurities from the interfacial dielectric layer, and the second metal layer includes a material that adsorbs oxygen impurities from the third metal layer and prevents oxygen impurities from diffusing into the first metal layer.

    摘要翻译： 公开了一种多层扫气金属栅叠层及其制造方法。 在一个示例中，设置在半导体衬底上的栅极堆叠包括设置在半导体衬底上的界面电介质层，设置在界面电介质层上的高k电介质层，设置在高k电介质层上的第一导电层，以及 设置在所述第一导电层上的第二导电层。 第一导电层包括设置在高k电介质层上的第一金属层，设置在第一金属层上的第二金属层和设置在第二金属层上的第三金属层。 第一金属层包括从界面电介质层清除氧杂质的材料，第二金属层包括从第三金属层吸附氧杂质并防止氧杂质扩散到第一金属层中的材料。

    MULTI-LAYER SCAVENGING METAL GATE STACK FOR ULTRA-THIN INTERFACIAL DIELCTRIC LAYER
    5.
    发明申请
    MULTI-LAYER SCAVENGING METAL GATE STACK FOR ULTRA-THIN INTERFACIAL DIELCTRIC LAYER 有权
    用于超薄界面层压层的多层金属栅极叠层

    公开(公告)号：US20130075833A1

    公开(公告)日：2013-03-28

    申请号：US13239804

    申请日：2011-09-22

    申请人： Kuan-Ting Liu ,  Liang-Gi Yao ,  Yasutoshi Okuno ,  Clement Hsingjen Wann

    发明人： Kuan-Ting Liu ,  Liang-Gi Yao ,  Yasutoshi Okuno ,  Clement Hsingjen Wann

    IPC分类号： H01L29/772

    CPC分类号： H01L21/823842 ,  H01L21/28008 ,  H01L21/28079 ,  H01L21/28088 ,  H01L27/092 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

    摘要： A multi-layer scavenging metal gate stack, and methods of manufacturing the same, are disclosed. In an example, a gate stack disposed over a semiconductor substrate includes an interfacial dielectric layer disposed over the semiconductor substrate, a high-k dielectric layer disposed over the interfacial dielectric layer, a first conductive layer disposed over the high-k dielectric layer, and a second conductive layer disposed over the first conductive layer. The first conductive layer includes a first metal layer disposed over the high-k dielectric layer, a second metal layer disposed over the first metal layer, and a third metal layer disposed over the second metal layer. The first metal layer includes a material that scavenges oxygen impurities from the interfacial dielectric layer, and the second metal layer includes a material that adsorbs oxygen impurities from the third metal layer and prevents oxygen impurities from diffusing into the first metal layer.

    摘要翻译： 公开了一种多层扫气金属栅叠层及其制造方法。 在一个示例中，设置在半导体衬底上的栅极堆叠包括设置在半导体衬底上的界面电介质层，设置在界面电介质层上的高k电介质层，设置在高k电介质层上的第一导电层，以及 设置在所述第一导电层上的第二导电层。 第一导电层包括设置在高k电介质层上的第一金属层，设置在第一金属层上的第二金属层和设置在第二金属层上的第三金属层。 第一金属层包括从界面电介质层清除氧杂质的材料，第二金属层包括从第三金属层吸附氧杂质并防止氧杂质扩散到第一金属层中的材料。