Wind turbine having flow-aligned blades
    1.
    发明授权
    Wind turbine having flow-aligned blades 有权
    风力涡轮机具有流动对准的叶片

    公开(公告)号:US09581132B2

    公开(公告)日:2017-02-28

    申请号:US14524185

    申请日:2014-10-27

    申请人: Earl McCune

    发明人: Earl McCune

    IPC分类号: F03D1/06 F03D7/02

    摘要: A wind turbine blade is configured such that the lift force from the blade airfoil is always normal, or nearly normal, to the shaft torque. This condition maximizes energy conversion. This objective may be achieved by a) having the airfoil chord always aligned to the actual wind direction (subject only to small angle of attack variations), and b) slowing the turbine rotation rate so that no blade twist is needed. As a result, blade tip speed due to shaft rotation is less than the wind speed, and preferably much less. This low tip speed eliminates any hazard to birds. The lift force from the blade airfoil directly drives the torque on the shaft, so the control problem simplifies to adjusting the blade angle of attack to keep the lift constant across varying wind speeds. For most airfoils, a slightly negative angle of attack results in zero lift, so this simple approach has a ready fail-safe condition. This fail-safe condition is operable up to very high wind speeds, eliminating any need to provide for turbine overspeed control. The same teachings are equally applicable to water turbines and other types of turbines.

    摘要翻译: 风力涡轮机叶片构造成使得来自叶片翼型件的提升力总是与轴扭矩正常或几乎正常。 这个条件使能量转换最大化。 该目的可以通过以下方式实现:a)使翼型弦总是与实际风向对齐(仅受到小的迎角变化),以及b)降低涡轮转速,从而不需要叶片扭转。 结果,由于轴旋转而导致的叶片尖端速度小于风速,优选地小得多。 这种低尖速度消除了对鸟类的任何危害。 来自叶片翼型件的提升力直接驱动轴上的扭矩,因此控制问题简化为调整叶片迎角以保持升降机在不同风速下恒定。 对于大多数翼型,略微负的迎角导致零升程,所以这种简单的方法有一个准备好的故障安全条件。 这种故障安全条件可运行到非常高的风速,无需提供涡轮超速控制。 同样的教导同样适用于水轮机和其他类型的涡轮机。

    Extremely high-speed switchmode DC-DC converters
    2.
    发明申请
    Extremely high-speed switchmode DC-DC converters 有权
    极高速开关模式DC-DC转换器

    公开(公告)号:US20060250118A1

    公开(公告)日:2006-11-09

    申请号:US11483942

    申请日:2006-07-08

    申请人: Earl McCune

    发明人: Earl McCune

    IPC分类号: G05F1/613

    摘要: Switchmode DC-DC power converters using one or more non-Silicon-based switching transistors and a Silicon-based (e.g. CMOS) controller are disclosed. The non-Silicon-based switching transistors may comprise, but are not necessarily limited to, III-V compound semiconductor devices such as gallium arsenide (GaAs) metal-semiconductor field effect transistors (MESFETs) or heterostructure FETs such as high electron mobility transistors (HEMTs). According to an embodiment of the invention, the low figure of merit (FoM), τFET, of the non-Silicon-based switching transistors allows the converters of the present invention to be employed in envelope tracking amplifier circuits of wireless devices designed for high-bandwidth technologies such as, for example, EDGE and UMTS, thereby improving the efficiency and battery saving capabilities of the wireless devices.

    摘要翻译: 公开了使用一个或多个非硅基开关晶体管和硅基(例如CMOS)控制器的开关模式DC-DC电力转换器。 非硅基开关晶体管可以包括但不一定限于III-V族化合物半导体器件,例如砷化镓(GaAs)金属 - 半导体场效应晶体管(MESFET)或诸如高电子迁移率晶体管的异质结构FET HEMT)。 根据本发明的一个实施例,非硅基开关晶体管的低品质因数(FoM),T FET FET允许本发明的转换器用于包络跟踪放大器 针对高带宽技术(例如EDGE和UMTS)设计的无线设备的电路,从而提高无线设备的效率和电池节省能力。

    High-efficiency amplifier output level and burst control

    公开(公告)号:US06864668B1

    公开(公告)日:2005-03-08

    申请号:US09247097

    申请日:1999-02-09

    IPC分类号: H03F1/02 G05F1/40 H03G3/20

    CPC分类号: H03F1/0227

    摘要: The present invention, generally speaking, provides for high-efficiency power control of a high-efficiency (e.g., hard-limiting or switch-mode) power amplifier. In one embodiment, the invention exploits the recognition that, for a constant-resistance circuit, power is equal to the square of the voltage across the circuit divided by the resistance of the circuit. In the case of certain switch mode amplifiers, such as Class E and Class F amplifiers, as well as saturated linear amplifiers, the amplifier may reasonably be regarded as having a constant resistance with varying power supply. In an exemplary embodiment, the supply voltage is controlled using a combination of two stages, a switch-mode converter stage that accomplishes gross power level control and a subsequent linear regulator stage that accomplishes more precise power envelope control, e.g., burst control. Control circuitry for the amplifier is simplified by combining control signals for power amplifier ramp-up transition, power level during a TDMA burst, and ramp-down transition, into a single control signal, and by eliminating feedback control (which also eliminates errors in the feedback control of output power due to the use of detecting diodes). Output noise from the variable output switch-mode voltage converter stage is filtered using the linear regulator stage that accomplishes burst control, further increasing circuit efficiency. Energy efficiency during ramp-up to the desired output power, during the burst at all output power levels, and during ramp-down from the transmitted power, is maximized. Reasonable expected efficiencies for the switch-mode converter stage and the linear regulator stage are 90% and 80%, respectively. A high-efficiency switch-mode amplifier may have an efficiency on the order of 80%, enabling an overall efficiency of greater than 50% to be achieved, comparing very favorably with current efficiencies of about 10%.

    Quadrature alignment in communications receivers
    4.
    发明申请
    Quadrature alignment in communications receivers 审中-公开
    通信接收机中的正交校准

    公开(公告)号:US20070036240A1

    公开(公告)日:2007-02-15

    申请号:US11503186

    申请日:2006-08-14

    申请人: Earl McCune

    发明人: Earl McCune

    IPC分类号: H04L27/00

    摘要: The present invention, generally speaking, takes advantage of the properties of quadrature signals to achieve precise quadrature alignment in a simple fashion. In particular, the expectation of the product of quadrature signals is zero. In accordance with the teachings of the invention, a phase error detection network therefore operates by multiplying the received quadrature signals and low-pass filtering the product to produce an error signal. When the signals are in precise quadrature relationship, the error signal will be zero. Real-time feedback control may be used to drive the error to zero. In accordance with another aspect of the invention, a variable phase shift network is achieved using a dual delay line. The difference in delay between the two delay lines is adjusted in response to the error signal to obtain precise quadrature alignment. The principles of the invention may be applied in connection with traditional mixer architectures or with switch-mode (e.g., “aliased undersampling”) architectures.

    摘要翻译: 一般而言,本发明利用正交信号的特性以简单的方式实现精确的正交校准。 特别地,正交信号的乘积的期望为零。 根据本发明的教导,因此相位误差检测网络通过将接收到的正交信号相乘并对乘积进行低通滤波来产生误差信号来进行操作。 当信号处于精确正交关系时,误差信号为零。 可以使用实时反馈控制将误差驱动到零。 根据本发明的另一方面,使用双延迟线实现可变相移网络。 响应于误差信号调整两个延迟线之间的延迟差以获得精确的正交校准。 本发明的原理可以结合传统的混频器架构或者具有开关模式(例如,“混叠欠采样”)架构来应用。

    PLL noise smoothing using dual-modulus interleaving

    公开(公告)号:US20060291604A1

    公开(公告)日:2006-12-28

    申请号:US11202387

    申请日:2005-08-10

    IPC分类号: H03D3/24

    CPC分类号: H03L7/193 H03K23/667

    摘要: The present invention, generally speaking, achieves noise spreading within a PLL using a dual-modulus prescaler by interleaving the division moduli. Within a given cycle, “ones” and “tens” are not all counted consecutively. Instead, ones and tens are interleaved. In one embodiment of the invention, the R count is doubled and the output of the R counter is toggled between high and low states. (The Q counter may remain unmodified.) In another embodiment of the invention, ones and tens are interleaved in accordance with a ratio q:r. By so interleaving the modulus, the effect is to spread the noise resulting from the output signal of the dual-modulus prescaler over a wider frequency range. The prescaler noise level is greatly reduced, particularly within the frequency band of the reference frequency.

    Direct phase and frequency demodulation

    公开(公告)号:US20050270090A1

    公开(公告)日:2005-12-08

    申请号:US11136607

    申请日:2005-05-23

    申请人: Earl McCune

    发明人: Earl McCune

    IPC分类号: H04L27/233 H03K9/00

    CPC分类号: H04L27/2332 H04L27/2337

    摘要: The present invention, generally speaking, provides a time shift angle demodulator that is of simple construction and has an extended linear range. Range extension is achieved by using the input signals directly, not simply post-processing the S-PFD outputs. In accordance with one embodiment of the invention, a method of measuring the phase or frequency of a periodic input signal uses a periodic reference signal and includes comparing the input signal to the reference signal to obtain a lead signal and a lag signal; changing the count of an up/down counter in dependence on the input signal, the reference signal, the lead signal and the lag signal; and using the lead signal, the lag signal and the count signal to produce a phase or frequency signal. In accordance with another embodiment of the invention, an apparatus for measuring the phase or frequency of a periodic input signal uses a periodic reference signal and includes a comparison circuit for comparing the input signal to the reference signal to obtain a lead signal and a lag signal; a logic circuit, including an up/down counter, responsive to the input signal, the reference signal, the lead signal and the lag signal to change the count of the up/down counter; and circuitry for using the lead signal, the lag signal and the count signal to produce a phase or frequency signal.

    Method of and apparatus for heating a reaction vessel with microwave
energy
    7.
    发明授权
    Method of and apparatus for heating a reaction vessel with microwave energy 失效
    用微波能量加热反应容器的方法和装置

    公开(公告)号:US5532462A

    公开(公告)日:1996-07-02

    申请号:US236759

    申请日:1994-04-29

    IPC分类号: H05B6/80 B01J19/12 H05B6/70

    摘要: A reaction vessel used in industrial applications is heated by a multiple mode microwave beam that is directed to an interior wall of the reaction vessel. The beam is in an inclined-angular fashion and the wall is arranged so the beam is absorbed and reflected from it many times to provide a helical-like reflection and absorption pattern within the vessel interior to uniformly heat the vessel wall and the material. A microwave isolator connected between a source of the microwave energy and the reaction vessel includes a quartz plate and a seal for compensating disparities in thermal expansion coefficients between the plate and a housing for the plate.

    摘要翻译: 在工业应用中使用的反应容器被引导到反应容器的内壁的多模微波束加热。 梁是倾斜角度的,并且壁被布置成使得梁被多次吸收和反射,以在容器内部提供螺旋状的反射和吸收图案,以均匀地加热容器壁和材料。 连接在微波能量源和反应容器之间的微波隔离器包括石英板和密封件,用于补偿板和板之间的热膨胀系数的差异。

    Binary controlled digital tapped delay line
    8.
    发明授权
    Binary controlled digital tapped delay line 失效
    二进制数字抽头延时线

    公开(公告)号:US5306971A

    公开(公告)日:1994-04-26

    申请号:US917386

    申请日:1992-07-23

    申请人: Earl McCune

    发明人: Earl McCune

    IPC分类号: H03K5/00 H03K5/13

    摘要: An electronic, binary-controlled digital tapped delay line is realized by a plurality of like stages connected in cascade. Each stage comprises a differential amplifier circuit responsive to a pair of input signals for producing a pair of output signals and including a differential transistor pair. A first loading circuit formed by a plurality of load devices interconnected to produce a cumulative loading effect is connected to an input of a first transistor of the differential transistor pair for delaying turn-on of the first transistor. Similarly, a second loading circuit formed by a plurality of load devices interconnected to produce a cumulative loading is connected to an input of a second transistor of the differential transistor pair for delaying turn-on of the second transistor, the first and second loading circuits each being connected to a first circuit node. A delay control circuit is responsive to a binary control signal and connected to the first circuit node for causing turn-on of the first and second transistors to be delayed by a set amount of time when the binary control signal is asserted.

    摘要翻译: 电子二进制控制数字抽头延迟线通过级联连接的多个相似级来实现。 每个级包括响应于一对输入信号的差分放大器电路,用于产生一对输出信号并且包括差分晶体管对。 由互连以产生累积负载效应的多个负载装置形成的第一负载电路连接到差分晶体管对的第一晶体管的输入,用于延迟第一晶体管的导通。 类似地,由互连以产生累积负载的多个负载装置形成的第二负载电路连接到差分晶体管对的第二晶体管的输入,用于延迟第二晶体管的导通,第一和第二负载电路各自 连接到第一电路节点。 延迟控制电路响应于二进制控制信号并连接到第一电路节点,用于当二进制控制信号被断言时使第一和第二晶体管的导通被延迟设定的时间量。

    Method of continuously calibrating the gain for a multi-path angle modulator
    9.
    发明申请
    Method of continuously calibrating the gain for a multi-path angle modulator 失效
    连续校准多路径角度调制器增益的方法

    公开(公告)号:US20070109066A1

    公开(公告)日:2007-05-17

    申请号:US11280665

    申请日:2005-11-15

    IPC分类号: H03C3/09

    摘要: A multiple path angle modulator includes a closed secondary loop added to a main control loop to automatically adjust a scaling factor related to high frequency gain. The main control loop is configured as a primary path to process the low frequency portion of the angle modulation signal, and the secondary loop is configured as an auxiliary path to process the high frequency portions of the angle modulation signal. The secondary loop senses calibration information and uses it to continuously calibrate the gain within the modulation loop in real time while the system performs its primary operation, thereby eliminating the need for a system shut down or calibration specific timing, such as a lapse time, to balance the modulation paths. Calibration is continuously performed as a background process. The angle modulator is applicable to all modulation type systems

    摘要翻译: 多路径角度调制器包括添加到主控制回路中的闭合次级回路,以自动调整与高频增益相关的缩放因子。 主控制回路被配置为处理角度调制信号的低频部分的主要路径,并且辅助回路被配置为辅助路径以处理角度调制信号的高频部分。 次级回路感测校准信息,并使用它在系统执行其主要操作时实时地连续地校准调制环路内的增益,从而消除对系统关闭或校准特定定时(例如经过时间)的需要, 平衡调制路径。 作为后台进程连续执行校准。 角度调制器适用于所有调制型系统

    High-efficiency modulating RF amplifier
    10.
    发明申请

    公开(公告)号:US20060293003A1

    公开(公告)日:2006-12-28

    申请号:US11514198

    申请日:2006-09-01

    申请人: Earl McCune

    发明人: Earl McCune

    IPC分类号: H04B1/04 H01Q11/12

    摘要: The present invention, generally speaking, provides for high-efficiency power control of a high-efficiency (e.g., hard-limiting or switch-mode) power amplifier in such a manner as to achieve a desired modulation. In one embodiment, the spread between a maximum frequency of the desired modulation and the operating frequency of a switch-mode DC-DC converter is reduced by following the switch-mode converter with an active linear regulator. The linear regulator is designed so as to control the operating voltage of the power amplifier with sufficient bandwidth to faithfully reproduce the desired amplitude modulation wave-form. The linear regulator is further designed to reject variations on its input voltage even while the output voltage is changed in response to an applied control signal. This rejection will occur even though the variations on the input voltage are of commensurate or even lower frequency than that of the controlled output variation. Amplitude modulation may be achieved by directly or effectively varying the operating voltage on the power amplifier while simultaneously achieving high efficiency in the conversion of primary DC power to the amplitude modulated output signal. High efficiency is enhanced by allowing the switch-mode DC-to-DC converter to also vary its output voltage such that the voltage drop across the linear regulator is kept at a low and relatively constant level. Time-division multiple access (TDMA) bursting capability may be combined with efficient amplitude modulation, with control of these functions being combined. In addition, the variation of average output power level in accordance with commands from a communications system may also be combined within the same structure.