Controller for a switched mode power converter, a switched mode power converter and method of controlling the same

    公开(公告)号:US20130188407A1

    公开(公告)日:2013-07-25

    申请号:US13713236

    申请日:2012-12-13

    IPC分类号: H02M7/04

    摘要: A method of controlling a switched mode converter is disclosed in which the switching frequency varies in proportion to the square of the sine of the phase of the input AC supply. Thus the switching frequency is a maximum, and the respective on period of the switch is a minimum, when the mains voltage is a maximum. Conversely, the switching frequency is reduced, and the respective on time of the switch is increased, when the mains voltage is reduced. Such a switching method provides for a high power factor. Implementation by means of a phase locked loop and a comparator may prevent the need for complex circuitry, and may provide for direct use of a digital controller or digital signal processing through a counter output in the phase locked loop.A controller configured to operate such a method, together with an AC/DC converter embodying such a controller are also disclosed.

    BACKLIGHT CONTROL FOR DISPLAY DEVICES
    2.
    发明申请
    BACKLIGHT CONTROL FOR DISPLAY DEVICES 审中-公开
    显示设备的背光控制

    公开(公告)号:US20110109537A1

    公开(公告)日:2011-05-12

    申请号:US12876269

    申请日:2010-09-07

    IPC分类号: G09G3/34 H05B41/282

    摘要: A display device backlight comprises at least one LED and a control circuit for controlling the brightness of the LED, wherein the control circuit comprises a drive transistor for driving a current through the LED and a pulse width modulation circuit for controlling the timing of operation of the drive transistor. A compensation circuit provides a first boost current to the gate of the drive transistor during a rising edge of the current profile and provides a second boost current to the gate of the drive transistor during a falling edge of the current profile. This arrangement improves the switching response of the drive transistor by providing boost currents to/from the gate of the drive transistor during the rising and falling edges of the current through the drive transistor (in response to steps in the PWM control signal).

    摘要翻译: 显示装置背光源包括至少一个LED和用于控制LED的亮度的控制电路,其中控制电路包括用于驱动通过LED的电流的驱动晶体管和用于控制LED的操作时序的脉宽调制电路 驱动晶体管。 补偿电路在电流分布的上升沿期间向驱动晶体管的栅极提供第一升压电流,并且在电流分布的下降沿期间向驱动晶体管的栅极提供第二升压电流。 这种布置通过在通过驱动晶体管的电流的上升沿和下降沿(响应于PWM控制信号中的步骤)向驱动晶体管的栅极提供升压电流来提高驱动晶体管的开关响应。

    CLOCK SIGNAL GENERATOR
    3.
    发明申请
    CLOCK SIGNAL GENERATOR 有权
    时钟信号发生器

    公开(公告)号:US20110298416A1

    公开(公告)日:2011-12-08

    申请号:US12960365

    申请日:2010-12-03

    CPC分类号: H03L7/197

    摘要: A clock signal generator comprising an input pin for receiving an oscillating signal and an output pin for providing a clock signal. The clock signal generator also comprises a frequency divider connected between the input pin and the output pin. The frequency divider having a plurality of frequency division factors associated therewith, wherein, in use, the frequency divider is configured to apply one of the plurality of frequency division factors as an in-use frequency division factor to the oscillating signal in order to generate the clock signal. The clock signal generator further comprising a controller configured to periodically replace the in-use frequency division factor with another of the plurality of frequency division factors.

    摘要翻译: 一种时钟信号发生器,包括用于接收振荡信号的输入引脚和用于提供时钟信号的输出引脚。 时钟信号发生器还包括连接在输入引脚和输出引脚之间的分频器。 所述分频器具有与其相关联的多个分频因子,其中在使用中,分频器被配置为将多个分频因子中的一个作为使用中的分频因子施加到振荡信号,以便产生 时钟信号。 所述时钟信号发生器还包括控制器,所述控制器被配置成周期性地用所述多个频率分频因子中的另一个替换所述使用中的分频因子。

    Converter Circuit with Forward and Backward Control
    4.
    发明申请
    Converter Circuit with Forward and Backward Control 有权
    具有向前和向后控制的转换器电路

    公开(公告)号:US20080298089A1

    公开(公告)日:2008-12-04

    申请号:US11573190

    申请日:2005-08-02

    IPC分类号: H02M3/335

    摘要: The present invention relates to a converter circuit and a conversion method for converting an input signal of a first value to an output signal of a second value based on a switched operating mode, wherein an output feedback loop (40) and an additional input forward control loop (60) are provided. The additional input forward control loop (60) serves to correctly control a switching parameter not only with respect to the output load but also over a wide input voltage range. This leads to an improved power efficiency and reliability of the converter circuit.

    摘要翻译: 本发明涉及一种转换器电路和一种转换方法,用于基于切换的操作模式将第一值的输入信号转换为第二值的输出信号,其中输出反馈回路(40)和附加输入正向控制 环(60)。 额外的输入正向控制回路(60)用于不仅相对于输出负载而且在宽的输入电压范围内正确地控制开关参数。 这导致转换器电路的功率效率和可靠性的提高。

    Method of energizing a polyphase motor having an increased energy efficiency
    5.
    发明授权
    Method of energizing a polyphase motor having an increased energy efficiency 失效
    对具有增加的能量效率的多相电动机通电的方法

    公开(公告)号:US06479955B2

    公开(公告)日:2002-11-12

    申请号:US09730427

    申请日:2000-12-05

    IPC分类号: H02K2900

    CPC分类号: H02P6/085

    摘要: The invention relates to a method of energizing a polyphase motor by means of a plurality of coils (E1, E2, E3), each coil intended to be excited by means of a control signal (I1, I2, I3). The method in accordance with the invention comprises the following steps: identifying the control signal having the largest absolute value, and connecting the corresponding coil to a reference-potential terminal (VCC or GND). The invention enables the losses caused by switching operations in the power stages energizing the coils to be reduced, and to increase the efficiency of the power supply device of the motor.

    摘要翻译: 本发明涉及一种通过多个线圈(E1,E2,E3)激励多相电动机的方法,每个线圈旨在通过控制信号(I1,I2,I3)激励。 根据本发明的方法包括以下步骤:识别具有最大绝对值的控制信号,并将相应的线圈连接到参考电位端子(VCC或GND)。本发明使得由电源中的开关操作引起的损耗 对要减少的线圈进行通电,并且提高电动机的电源装置的效率。

    Signal processing using timing comparison
    6.
    发明授权
    Signal processing using timing comparison 有权
    信号处理采用定时比较

    公开(公告)号:US08441323B2

    公开(公告)日:2013-05-14

    申请号:US13119289

    申请日:2009-09-11

    IPC分类号: H03L7/095

    CPC分类号: H03L7/1976

    摘要: A signal processing module with a timing comparator such as a time to digital converter is provided. The timing comparator comprises an error cancellation stage to remove a predicted effect of the imparted jitter from the timing comparator output signal. A jitter detector is used to detect the jitter from the comparator output signal, preferably residual jitter after the predicted effect of the jitter has been removed. Synchronous detection, such as correlation with the predicted jitter may be used to detect the jitter. The jitter detector adjusts a calibration factor of the timing comparator dependent on the detected jitter.

    摘要翻译: 提供了具有诸如时间到数字转换器的定时比较器的信号处理模块。 定时比较器包括误差消除级,以消除来自定时比较器输出信号的被施加抖动的预测效果。 使用抖动检测器来检测来自比较器输出信号的抖动,优选地,抖动预测的影响已经消除之后的残余抖动。 可以使用诸如与预测抖动的相关性的同步检测来检测抖动。 抖动检测器根据检测到的抖动来调整定时比较器的校准因子。

    Voltage converter for converting a voltage to multiple output voltages and method of operating said voltage converter
    7.
    发明授权
    Voltage converter for converting a voltage to multiple output voltages and method of operating said voltage converter 有权
    用于将电压转换成多个输出电压的电压转换器以及操作所述电压转换器的方法

    公开(公告)号:US07579713B2

    公开(公告)日:2009-08-25

    申请号:US11576813

    申请日:2005-10-03

    IPC分类号: H02J1/10

    摘要: The invention relates to an voltage converter for converting a voltage to multiple output voltages, comprising a first switching circuit (SO) connected to an inductive energy storage element (L) for allowing and interrupting a current flow through the inductive energy storage element (L); at least two second switching circuits (S1) for a controllable discharging of the energy stored in the inductive energy storage element (L), each second switching circuit (S1) being connected to the inductive energy storage element (L) in parallel connection to each other at its respective input and each second switching circuit (S 1) comprising a parasitic element; control voltage selection means for selectively supplying a control voltage to the parasitic element of the switching circuits (S1) such that a current flow trough the parasitic element of the respective switching circuit (1) is inhibited when the second switching circuit (S1) is turned off. A negative influence of parasitic elements (e.g. diodes) can be suppressed by a suitable selective control of the bulk voltage.

    摘要翻译: 本发明涉及一种用于将电压转换成多个输出电压的电压转换器,包括连接到感应能量存储元件(L)的第一开关电路(SO),用于允许和中断通过感应能量存储元件(L)的电流, ; 至少两个第二切换电路(S1),用于可控放电存储在感应能量存储元件(L)中的能量,每个第二开关电路(S1)与感应能量存储元件(L)并联连接到每个 另一个在其各自的输入端和每个第二开关电路(S1)包括寄生元件; 控制电压选择装置,用于选择性地向开关电路(S1)的寄生元件提供控制电压,使得当第二开关电路(S1)转向时,通过各开关电路(1)的寄生元件的电流流动被禁止 关闭 寄生元件(例如二极管)的负面影响可以通过对体电压的合适的选择性控制来抑制。

    Device for generating a clock signal
    8.
    发明授权
    Device for generating a clock signal 有权
    用于产生时钟信号的装置

    公开(公告)号:US07558530B2

    公开(公告)日:2009-07-07

    申请号:US11203592

    申请日:2005-08-12

    申请人: Emeric Uguen

    发明人: Emeric Uguen

    IPC分类号: H04B5/00 G06F1/04

    CPC分类号: G06K7/0008 G06F1/04

    摘要: A device for generating an output clock signal intended to time a digital processing circuit, said generating device receiving a first clock signal, characterized in that it comprises an oscillator generating a second clock signal constituting said output clock signal, said oscillator functioning in a forced mode under the control of the rising and falling edges of said first clock signal, said oscillator functioning in a free mode in the absence of rising or falling edges in said first clock signal, the natural frequency of said oscillator being lower than the frequency of said first clock signal.

    摘要翻译: 一种用于产生用于对数字处理电路进行时间的输出时钟信号的装置,所述产生装置接收第一时钟信号,其特征在于,其包括产生构成所述输出时钟信号的第二时钟信号的振荡器,所述振荡器以强制模式工作 在所述第一时钟信号的上升沿和下降沿的控制下,所述振荡器在所述第一时钟信号中没有上升沿或下降沿的情况下工作在自由模式,所述振荡器的固有频率低于所述第一时钟信号的频率 时钟信号。

    Control system for a voltage converter
    9.
    发明授权
    Control system for a voltage converter 有权
    电压转换器控制系统

    公开(公告)号:US07120038B2

    公开(公告)日:2006-10-10

    申请号:US10559911

    申请日:2004-06-03

    申请人: Emeric Uguen

    发明人: Emeric Uguen

    IPC分类号: H02M3/158

    CPC分类号: H02M3/158 H02M3/07

    摘要: The invention relates to a control system for a voltage converter, said control system comprising:—a set of switches (T1-T2-T3-T4) intended to be connected via output terminals (N1-N2-N3) to a first type of voltage converter or to a second type of voltage converter,—detection means (DET) to generate a detection signal (DS) indicating the type of converter connected,—a circuit (CIR) intended to generate, from said detection signal (DS), control signals (CS1-CS2-CS3-CS4) to control said switches (T1-T2-T3-T4).

    摘要翻译: 本发明涉及一种用于电压转换器的控制系统,所述控制系统包括: - 一组开关(T 1 -T 2 -T 3 -T 4),用于经由输出端子(N 1 -N 2 -N 3)到第一类型的电压转换器或第二类型的电压转换器, - 检测装置(DET)以产生指示所连接的转换器的类型的检测信号(DS), - 用于从 所述检测信号(DS),用于控制所述开关(T 1 -T 2 -T 3 -T 4)的控制信号(CS 1 -CS 2 -CS 3 -CS 4)。

    Voltage regulation system comprising operating condition detection means
    10.
    发明申请
    Voltage regulation system comprising operating condition detection means 有权
    电压调节系统,包括操作条件检测装置

    公开(公告)号:US20060192542A1

    公开(公告)日:2006-08-31

    申请号:US10545177

    申请日:2004-04-05

    申请人: Emeric Uguen

    发明人: Emeric Uguen

    IPC分类号: G05F3/04 G05F3/08

    CPC分类号: G05F1/565

    摘要: The invention relates to a system for generating an output voltage (Vout) from an input voltage (Vup), said system comprising:—regulation means (T1) for regulating said output voltage (Vout) to a target voltage level (Vcons), said regulation means (T1) comprising a control terminal intended to receive a regulation signal (SR) and an output terminal for delivering said output voltage (Vout),—first control means (COMP1) for delivering a first control signal (SC1) from a comparison between said regulation signal (SR) and a first reference signal (Vref1).

    摘要翻译: 本发明涉及一种用于从输入电压(Vup)产生输出电压(Vout)的系统,所述系统包括:用于将所述输出电压(Vout)调节到目标电压电平(Vcons)的调节装置(T 1) 所述调节装置(T 1)包括用于接收调节信号(SR)的控制端和用于传送所述输出电压(Vout)的输出端, - 用于传送第一控制信号(SC 1)的第一控制装置 )与所述调节信号(SR)和第一参考信号(Vref 1)之间的比较。