公开(公告)号：US20140374924A1

公开(公告)日：2014-12-25

申请号：US14473624

申请日：2014-08-29

Applicant: Eric Ting-Shan Pan

Inventor： Eric Ting-Shan Pan

IPC: H01L21/762 ,  H01L25/16 ,  H01L25/065 ,  H01L21/265 ,  H01L21/324

CPC classification number: H01L21/76254 ,  H01L21/02002 ,  H01L21/02639 ,  H01L21/265 ,  H01L21/324 ,  H01L25/0657 ,  H01L25/162 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods and structures for heterogeneous integration of diverse material systems and device technologies onto a single substrate incorporate layer transfer techniques into an epitaxy level packaging process. A planar substrate surface of multiple epitaxial areas of different materials can be heterogeneously integrated with a substrate material. Complex assembly and lattice engineering is significantly reduced. Microsystems of different circuits made from different materials can be built from a single wafer Fab line employing the claimed processes.

Abstract translation: 将不同材料系统和器件技术异构整合到单个衬底上的方法和结构将层转移技术引入外延级封装过程。 不同材料的多个外延区域的平面衬底表面可以与衬底材料非均匀地集成。 复杂的组装和晶格工程大大减少。 可以从采用所要求保护的方法的单个晶片Fab线构建由不同材料制成的不同电路的微系统。

公开(公告)号：US08822309B2

公开(公告)日：2014-09-02

申请号：US13724701

申请日：2012-12-21

Applicant: Eric Ting-Shan Pan

Inventor： Eric Ting-Shan Pan

IPC: H01L21/30

CPC classification number: H01L21/76254 ,  H01L21/02002 ,  H01L21/02639 ,  H01L21/265 ,  H01L21/324 ,  H01L25/0657 ,  H01L25/162 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods and structures for heterogeneous integration of diverse material systems and device technologies onto a single substrate incorporate layer transfer techniques into an epitaxy level packaging process. A planar substrate surface of multiple epitaxial areas of different materials can be heterogeneously integrated with a substrate material. Complex assembly and lattice engineering is significantly reduced. Microsystems of different circuits made from different materials can be built from a single wafer Fab line employing the claimed processes.

Abstract translation: 将不同材料系统和器件技术异构整合到单个衬底上的方法和结构将层转移技术引入外延级封装过程。 不同材料的多个外延区域的平面衬底表面可以与衬底材料非均匀地集成。 复杂的组装和晶格工程大大减少。 可以从采用所要求保护的方法的单个晶片Fab线构建由不同材料制成的不同电路的微系统。

公开(公告)号：US20130161834A1

公开(公告)日：2013-06-27

申请号：US13724701

申请日：2012-12-21

Applicant: Eric Ting-Shan Pan

Inventor： Eric Ting-Shan Pan

IPC: H01L21/762

CPC classification number: H01L21/76254 ,  H01L21/02002 ,  H01L21/02639 ,  H01L21/265 ,  H01L21/324 ,  H01L25/0657 ,  H01L25/162 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods and structures for heterogeneous integration of diverse material systems and device technologies onto a single substrate incorporate layer transfer techniques into an epitaxy level packaging process. A planar substrate surface of multiple epitaxial areas of different materials can be heterogeneously integrated with a substrate material. Complex assembly and lattice engineering is significantly reduced. Microsystems of different circuits made from different materials can be built from a single wafer Fab line employing the claimed processes.

Abstract translation: 将不同材料系统和器件技术异构整合到单个衬底上的方法和结构将层转移技术引入外延级封装过程。 不同材料的多个外延区域的平面衬底表面可以与衬底材料非均匀地集成。 复杂的组装和晶格工程大大减少。 可以从采用所要求保护的方法的单个晶片Fab线构建由不同材料制成的不同电路的微系统。

公开(公告)号：US07757198B1

公开(公告)日：2010-07-13

申请号：US11875748

申请日：2007-10-19

Applicant: Jun Zhao ,  Yanhua Yi ,  Eric Ting

Inventor： Jun Zhao ,  Yanhua Yi ,  Eric Ting

IPC: G06F17/50

CPC classification number: G06F17/5054 ,  G01R31/318583 ,  G06F2217/14

Abstract: Systems and methods provide techniques to support design specific testing for programmable logic devices in accordance with one or more embodiments. For example in one embodiment, a method of generating configuration data for a programmable logic device includes mapping a design for the programmable logic device, wherein the mapped design incorporates scan test logic; placing and routing the mapped design; and generating configuration data based on the mapped design, wherein the incorporated scan test logic is disabled and not selectable within the programmable logic device configured with the configuration data. The method may further include generating a second configuration data based on the mapped design, wherein the incorporated scan test logic is enabled and selectable within the programmable logic device configured with the second configuration data.

Abstract translation: 根据一个或多个实施例，系统和方法提供技术来支持对可编程逻辑器件的设计特定测试。 例如，在一个实施例中，生成可编程逻辑器件的配置数据的方法包括对可编程逻辑器件的设计进行映射，其中映射设计包括扫描测试逻辑; 放置和路由映射设计; 以及基于所述映射设计生成配置数据，其中所述并入的扫描测试逻辑被禁用，并且在配置有所述配置数据的可编程逻辑设备内不可选择。 该方法可以进一步包括基于映射设计生成第二配置数据，其中所合并的扫描测试逻辑在配置有第二配置数据的可编程逻辑设备内启用和选择。

公开(公告)号：US20100105194A1

公开(公告)日：2010-04-29

申请号：US12607762

申请日：2009-10-28

Applicant: Eric Ting-Shan Pan

Inventor： Eric Ting-Shan Pan

IPC: H01L21/208

CPC classification number: C30B35/00 ,  C30B11/002 ,  C30B11/14 ,  C30B19/06 ,  C30B19/12 ,  H01L21/02625 ,  H01L31/0725 ,  H01L31/0735 ,  H01L31/1844 ,  Y02E10/544 ,  Y02P70/521

Abstract: A method of growing an epitaxial film and transferring it to an assembly substrate is disclosed. The film growth and transfer are made using an epitaxy lateral overgrowth technique. The formed epitaxial film on an assembly substrate can be further processed to form devices such as solar cell, light emitting diode, and other devices and assembled into higher integration of desired applications.

Abstract translation: 公开了一种生长外延膜并将其转移到组件衬底的方法。 膜生长和转移使用外延侧向过度生长技术进行。 可以进一步处理组装衬底上形成的外延膜以形成诸如太阳能电池，发光二极管和其它器件的器件，并组装成所需应用的更高集成度。

公开(公告)号：US20100102419A1

公开(公告)日：2010-04-29

申请号：US12607726

申请日：2009-10-28

Applicant: Eric Ting-Shan Pan

Inventor： Eric Ting-Shan Pan

IPC: H01L29/06 ,  B32B3/24

CPC classification number: H01L31/1804 ,  C30B11/002 ,  C30B11/14 ,  C30B19/06 ,  C30B19/12 ,  C30B35/00 ,  H01L21/02625 ,  H01L31/04 ,  Y02E10/547 ,  Y02P70/521 ,  Y10T428/24273 ,  Y10T428/24331

Abstract: An epitaxy-level packaging grows an epitaxial film and transfers it to an assembly substrate. The film growth and transfer are made using an epitaxy lateral overgrowth technique. The formed epitaxial film on an assembly substrate can be further processed to form devices such as solar cell, light emitting diode, and other devices and assembled into higher integration of desired applications.

Abstract translation: 外延级包装生长外延膜并将其转移到组装衬底。 膜生长和转移使用外延侧向过度生长技术进行。 可以进一步处理组装衬底上形成的外延膜以形成诸如太阳能电池，发光二极管和其它器件的器件，并组装成所需应用的更高集成度。

公开(公告)号：US20090250097A1

公开(公告)日：2009-10-08

申请号：US12417982

申请日：2009-04-03

Applicant: Eric Ting-Shan Pan

Inventor： Eric Ting-Shan Pan

IPC: H01L31/058 ,  H01L31/052

CPC classification number: H01L31/052 ,  H01L31/0543 ,  H01L31/0547 ,  H01L35/30 ,  H02S10/10 ,  H02S40/44 ,  H05K1/0203 ,  H05K1/0274 ,  H05K1/0298 ,  H05K2201/09072 ,  H05K2201/10121 ,  Y02B10/14 ,  Y02B10/20 ,  Y02B10/70 ,  Y02E10/52 ,  Y02E10/60

Abstract: The invention addresses area utilization and capital efficiency of systems for converting solar energy into electricity. A solid-state solar conversion system includes photovoltaic cells which are arranged within a concentrated solar insolation flux path on different substrates/boards to collect different respective portions of the radiation spectrum.

Abstract translation: 本发明解决了将太阳能转化为电力的系统的面积利用率和资本效率。 固态太阳能转换系统包括光伏电池，其布置在不同基板/板上的集中太阳能日照通量路径内，以收集辐射光谱的不同部分。

公开(公告)号：US6130570A

公开(公告)日：2000-10-10

申请号：US932677

申请日：1997-09-18

Applicant: Eric Ting-Shan Pan ,  Roger Lee Foust

Inventor： Eric Ting-Shan Pan ,  Roger Lee Foust

IPC: H01L27/095 ,  H01L27/06 ,  H03K17/687 ,  H03K17/693

CPC classification number: H03K17/693

Abstract: A biasing system for an FET utilizes a source biasing capacitor which is charged to a positive DC ground voltage relative to RF ground. The gate of the FET is thus biased negative to the source without requiring a negative power supply.

Abstract translation: 用于FET的偏置系统利用源极偏置电容器，其相对于RF接地被充电到正的DC接地电压。 因此，FET的栅极负向源极而不需要负电源。

公开(公告)号：US08530342B2

公开(公告)日：2013-09-10

申请号：US13487561

申请日：2012-06-04

Applicant: Eric Ting-Shan Pan

Inventor： Eric Ting-Shan Pan

IPC: H01L21/00

CPC classification number: C30B35/00 ,  C30B11/002 ,  C30B11/14 ,  C30B19/06 ,  C30B19/12 ,  H01L21/02625 ,  H01L31/0725 ,  H01L31/0735 ,  H01L31/1844 ,  Y02E10/544 ,  Y02P70/521

Abstract: A method of growing an epitaxial film and transferring it to an assembly substrate is disclosed. The film growth and transfer are made using an epitaxy lateral overgrowth technique. The formed epitaxial film on an assembly substrate can be further processed to form devices such as solar cell, light emitting diode, and other devices and assembled into higher integration of desired applications.

Abstract translation: 公开了一种生长外延膜并将其转移到组件衬底的方法。 膜生长和转移使用外延侧向过度生长技术进行。 可以进一步处理组装衬底上形成的外延膜以形成诸如太阳能电池，发光二极管和其它器件的器件，并组装成所需应用的更高集成度。

公开(公告)号：US20130200429A1

公开(公告)日：2013-08-08

申请号：US13724155

申请日：2012-12-21

Applicant: Eric Ting-Shan Pan

Inventor： Eric Ting-Shan Pan

IPC: H01L21/78 ,  H01L23/498 ,  H01L21/768

CPC classification number: H01L21/78 ,  C30B19/12 ,  C30B23/02 ,  C30B25/18 ,  H01L21/2007 ,  H01L21/76805 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/32 ,  H01L24/83 ,  H01L2224/29187 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/8385 ,  H01L2224/83896 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/053 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method of growth and transfer of epitaxial structures from semiconductor crystalline substrate(s) to an assembly substrate. Using this method, the assembly substrate encloses one or more semiconductor materials and defines a wafer size that is equal to or larger than the semiconductor crystalline substrate for further wafer processing. The process also provides a unique platform for heterogeneous integration of diverse material systems and device technologies onto one single substrate.

Abstract translation: 外延结构从半导体晶体衬底生长和转移到组件衬底的方法。 使用该方法，组装衬底包围一个或多个半导体材料并且限定等于或大于半导体晶体衬底的晶片尺寸以用于进一步的晶片处理。 该过程还提供了一个独特的平台，用于将不同材料系统和设备技术的异构集成到单个基板上。