公开(公告)号：US5915187A

公开(公告)日：1999-06-22

申请号：US768482

申请日：1996-12-18

申请人： Frederikus R. J. Huisman ,  Wiebe B. De Boer ,  Oscar J. A. Bulik ,  Ronald Dekker

发明人： Frederikus R. J. Huisman ,  Wiebe B. De Boer ,  Oscar J. A. Bulik ,  Ronald Dekker

IPC分类号： H01L21/205 ,  H01L21/302 ,  H01L21/56 ,  H01L21/78 ,  H01L29/864 ,  H01L29/93 ,  H01L21/20

CPC分类号： H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/78 ,  H01L29/93

摘要： The invention relates to a method of manufacturing a semiconductor device with a pn junction, whereby an epitaxial layer (2) with a first zone (3) of a first conductivity type and with a second zone (4) of a second conductivity type opposed to the first is provided on a silicon substrate (1), a pn junction (5) being formed between the second and first zones (3, 4, respectively). According to the invention, the method is characterized in that the epitaxial layer (2) is provided by means of a CVD process at a temperature below 800.degree. C., the epitaxial layer (2) being provided in that first the first zone (3) and then the second zone (4) are epitaxially provided on the substrate (1), while no heat treatments at temperatures above 800.degree. C. take place after the epitaxial layer (2) has been provided. The measure according to the invention renders it possible to achieve properties of semiconductor devices manufactured in accordance with the invention, for example the capacitance-voltage (CV) relation of varicap diodes, within wide limits according to specifications. In addition, semiconductor devices manufactured by the method according to the invention require no post-diffusion or measurement steps in order to bring the properties of the semiconductor device up to specifications.

摘要翻译： 本发明涉及制造具有pn结的半导体器件的方法，由此具有第一导电类型的第一区（3）和与第二导电类型相反的第二导电类型的第二区（4）的外延层（2） 第一设置在硅衬底（1）上，pn结（5）分别形成在第二区和第一区之间（3,4）。 根据本发明，该方法的特征在于外延层（2）通过CVD工艺在低于800℃的温度下提供，外延层（2）设置在第一区域（3） ），然后第二区（4）外延地设置在基板（1）上，而在提供了外延层（2）之后，在高于800℃的温度下不进行热处理。 根据本发明的措施使得可以根据本发明制造的半导体器件的性质，例如变容二极管的电容 - 电压（CV）关系在根据规格的宽范围内。 此外，通过根据本发明的方法制造的半导体器件不需要后扩散或测量步骤，以使半导体器件的性能达到规格。

公开(公告)号：US5056894A

公开(公告)日：1991-10-15

申请号：US479330

申请日：1990-02-13

申请人： Karel E. Kuijk ,  Frederikus R. J. Huisman

发明人： Karel E. Kuijk ,  Frederikus R. J. Huisman

IPC分类号： G02F1/136 ,  G02F1/1362 ,  G02F1/1365 ,  G09F9/30 ,  G09G3/36 ,  H01L27/12 ,  H01L49/02 ,  H04N5/66

CPC分类号： G02F1/1365 ,  H01L27/12 ,  G02F1/13624

摘要： An a:Si diode (7) for use in LCDs is located between two metal contacts (10, 15) which extend throughout the diode surface. This reduces the detrimental effect due to the light sensitivity of (amorphous) silicon. A MIM element (8) parallel to the diode (7) is obtained by having the metal contacts project further and by providing a thin layer of insulating material (13, 19) between these contacts.

公开(公告)号：US5336905A

公开(公告)日：1994-08-09

申请号：US907423

申请日：1992-07-01

申请人： Antonie J. Bosman ,  Teunis J. Vink ,  Richard C. van Dijk ,  Frederikus R. J. Huisman

发明人： Antonie J. Bosman ,  Teunis J. Vink ,  Richard C. van Dijk ,  Frederikus R. J. Huisman

IPC分类号： G02F1/136 ,  G02F1/1365 ,  H01L27/08 ,  H01L27/12 ,  H01L29/47 ,  H01L29/872 ,  H01L29/48 ,  G02F1/1343

CPC分类号： H01L27/0814 ,  G02F1/1365 ,  H01L27/12

摘要： Semiconductor device and method of manufacturing same, display device and support plate for same provided with such a semiconductor device. A semiconductor device having an insulating substrate on which a Schottky diode is formed between a metal layer and a semiconductor layer of polycrystalline or amorphous silicon extending over the metal layer is used inter alia in matrix display devices, such as LCDs. The Schottky diode forms part of a switching element of such a device and must have a low reverse current up to a reverse voltage of, for example, approximately 10 V. The known semiconductor device having Schottky diodes, in which the semiconductor material extends over a lateral surface of the Schottky metal, is found not to comply with this requirement. To overcome this deficiency a low leakage current is realized over a wide reverse voltage range due to the presence of a dielectric on the lateral surface of the Schottky metal. The dielectric suppresses the leakage current issuing from the lateral surface. Preferably, the dielectric includes an oxide of the Schottky metal. This may be readily formed through local oxidation, for example, by means of an oxygen plasma.

摘要翻译： 半导体装置及其制造方法，提供有这种半导体装置的显示装置和支撑板。 具有绝缘衬底的半导体器件，其中在金属层和在金属层之上延伸的多晶或非晶硅的半导体层之间形成有肖特基二极管的绝缘衬底尤其用于诸如LCD的矩阵显示器件中。 肖特基二极管构成这种器件的开关元件的一部分，并且必须具有高达例如约10V的反向电压的低反向电流。具有肖特基二极管的已知半导体器件，其中半导体材料在 发现肖特基金属的侧表面不符合这一要求。 为了克服这种缺陷，由于在肖特基金属的侧表面上存在电介质，因此在宽的反向电压范围内实现了低的漏电流。 电介质抑制从侧面发出的漏电流。 优选地，电介质包括肖特基金属的氧化物。 这可以通过局部氧化容易地形成，例如通过氧等离子体形成。

公开(公告)号：US5301048A

公开(公告)日：1994-04-05

申请号：US967921

申请日：1992-10-28

申请人： Frederikus R. J. Huisman

发明人： Frederikus R. J. Huisman

IPC分类号： G02F1/03 ,  G02F1/136 ,  G02F1/1365 ,  G09G3/36 ,  H01L27/12 ,  H01L29/47 ,  H01L29/872 ,  H01L31/10 ,  G02F1/13

CPC分类号： G09G3/367 ,  G02F1/1365

摘要： By arranging a Schottky diode so that it is sensitive to grazing light only in the back-bias mode, a switching element is obtained which, when used in, for example an active matrix LCD display, has a current-voltage characteristic which is comparable to that of a zener diode and can be driven in a reset mode.

摘要翻译： 通过设置肖特基二极管，使得其仅在背偏压模式下对放牧灯敏感，获得了一种开关元件，当用于例如有源矩阵LCD显示器时，具有与...相当的电流 - 电压特性 可以在复位模式下驱动齐纳二极管。

公开(公告)号：US5008590A

公开(公告)日：1991-04-16

申请号：US412024

申请日：1989-09-25

申请人： Frederikus R. J. Huisman ,  Gerrit Oversluizen ,  Jan W. D. Martens

发明人： Frederikus R. J. Huisman ,  Gerrit Oversluizen ,  Jan W. D. Martens

IPC分类号： G02F1/136 ,  G02F1/1365 ,  H01L29/06 ,  H01L29/861 ,  H01L29/868 ,  H01L49/02

CPC分类号： G02F1/1365 ,  H01L24/24 ,  H01L29/0657 ,  H01L29/868 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/01072 ,  H01L2924/01079 ,  H01L2924/12043 ,  H01L2924/3025

摘要： For satisfactory operation of a display arrangement having an electro-optical display medium and picture elements arranged between row and column electrodes and connected in series with an anti-parallel arrangement of PIN diodes, the diodes should have a small reverse current notwithstanding any ambient radiation present. In a display arrangement according to the invention, a small photo-current in the reverse direction is obtained due to the fact that the i-region and the p- or n-type region do not adjoin each other directly in the proximity of the edge of the mesa-shaped PIN diode. The region within which the aforementionhed regions adjoin each other is preferably located at a distance from the edge of the mesa-shaped PIN diode amounting to at least once the penetration depth of the ambient radiation plus the diffusion length of charge carriers in the i-region. Due to such a construction of the PIN diode, the electrical field becomes substantially zero with reverse voltage in the proximity of the edge of the diode and hence ther sensitivity of a display arrangement according to the invention to ambient radiation, especially to the ambient radiation laterally incident on the diode, becomes considerably lower.

公开(公告)号：US5854117A

公开(公告)日：1998-12-29

申请号：US715059

申请日：1996-09-17

申请人： Frederikus R. J. Huisman ,  Oscar J. A. Buyk ,  Wolfgang Bindke

发明人： Frederikus R. J. Huisman ,  Oscar J. A. Buyk ,  Wolfgang Bindke

IPC分类号： H01L21/225 ,  H01L21/329 ,  H01L29/93 ,  H01L21/20 ,  H01L21/425

CPC分类号： H01L29/66174 ,  H01L29/93

摘要： The invention relates to a method of manufacturing a varicap diode whereby a silicon substrate with an epitaxial layer of a first conductivity type is provided with a first zone through the provision of dopant atoms of a first conductivity type in the epitaxial layer and is provided with a second zone adjoining a surface of the epitaxial layer through the provision of dopant atoms of a second conductivity type opposed to the first in the epitaxial layer, a pn junction being formed between the second zone and the first zone. According to the invention, the method is characterized in that the second zone is provided in that a layer of polycrystalline silicon provided with dopant atoms of the second conductivity type is provided on the surface, and in that the dopant atoms are diffused from this layer into the epitaxial layer, whereby a pn junction is formed at a distance of less than 0.3 .mu.m from the polycrystalline silicon. The measure according to the invention leads to the manufacture of a varicap diode with a pn junction which shows a wide variation in capacitance of the depleted region around the pn junction for a comparatively small variation in reverse voltage across the pn junction.

摘要翻译： 本发明涉及制造变容二极管的方法，其中具有第一导电类型的外延层的硅衬底通过在外延层中提供第一导电类型的掺杂剂原子而设置有第一区，并且设置有 第二区，通过提供与外延层中的第一导电类型相对的第二导电类型的掺杂剂原子邻接外延层的表面，在第二区和第一区之间形成pn结。 根据本发明，该方法的特征在于，第二区域的特征在于，在表面上提供了设置有第二导电类型的掺杂剂原子的多晶硅层，并且掺杂剂原子从该层扩散到 外延层，由此在与多晶硅相距0.3μm的距离处形成pn结。 根据本发明的措施导致制造具有pn结的变容二极管，其在pn结周围的反向电压的相对小的变化中显示出在pn结周围的耗尽区的电容的宽的变化。