公开(公告)号：US20140131307A1

公开(公告)日：2014-05-15

申请号：US13936936

申请日：2013-07-08

Applicant: General Dynamics Advanced Information Systems, Inc.

Inventor： Deepak Keshav Pai ,  Melvin Eric Graf

IPC: H05K3/02

CPC classification number: H01L21/4821 ,  B23K26/361 ,  B23K26/362 ,  H01L21/50 ,  H01L23/49541 ,  H01L23/49548 ,  H01L2924/0002 ,  H05K3/3426 ,  H05K2201/10848 ,  H01L2924/00

Abstract: An embodiment of the invention generally relates to a method of converting a commercial off-the-shelf electrical lead to a rugged off-the-shelf electrical lead by laser machining a portion of the electrical lead. The method includes ablating material from the electrical lead of the commercial off-the-shelf component to reduce the moment of inertia or increase the flexibility of the electrical lead.

Abstract translation: 本发明的一个实施方案一般涉及通过激光加工一部分电引线将商业现货电导线转换成坚固的现成的电引线的方法。 该方法包括从商业现成部件的电引线上烧掉材料以减少转动惯量或增加电引线的灵活性。

公开(公告)号：US09318350B2

公开(公告)日：2016-04-19

申请号：US13936936

申请日：2013-07-08

Applicant: General Dynamics Advanced Information Systems, Inc.

Inventor： Deepak Keshav Pai ,  Melvin Eric Graf

IPC: B23K26/362 ,  H01L21/50 ,  H01L21/60 ,  H01L21/48 ,  B23K26/36 ,  H01L23/495 ,  H05K3/34

CPC classification number: H01L21/4821 ,  B23K26/361 ,  B23K26/362 ,  H01L21/50 ,  H01L23/49541 ,  H01L23/49548 ,  H01L2924/0002 ,  H05K3/3426 ,  H05K2201/10848 ,  H01L2924/00

Abstract: An embodiment of the invention generally relates to a method of converting a commercial off-the-shelf electrical lead to a rugged off-the-shelf electrical lead by laser machining a portion of the electrical lead. The method includes ablating material from the electrical lead of the commercial off-the-shelf component to reduce the moment of inertia or increase the flexibility of the electrical lead.

Abstract translation: 本发明的一个实施方案一般涉及通过激光加工一部分电引线将商业现货电导线转换成坚固的现成的电引线的方法。 该方法包括从商业现成部件的电引线上烧掉材料以减少转动惯量或增加电引线的灵活性。

公开(公告)号：US20040246688A1

公开(公告)日：2004-12-09

申请号：US10828178

申请日：2004-04-21

Applicant: General Dynamics Advanced Information Systems, Inc.

Inventor： Deepak K. Pai ,  Ronald R. Denny

IPC: H05K001/14 ,  H05K003/00 ,  H05K007/08

CPC classification number: H05K3/462 ,  H01L2224/05548 ,  H05K3/28 ,  H05K3/3463 ,  H05K3/3484 ,  H05K3/4623 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/0949 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/043 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49213

Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two or more substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). Adhesive films may be positioned between the surfaces of the substrates having the conductive pads, where the adhesive films include apertures located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The two or more substrates then may be pressed together to mechanically bond the two or more substrates via the adhesive films. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the conductive pads through the aperture in the adhesive films.

Abstract translation: 本发明提供了用于层叠和互连多个基板以形成多层封装或其他电路部件的多种技术。 可以在两个或更多个基板中的至少一个的导电焊盘上形成焊料凸块。 焊料凸块优选地由焊膏应用于导电焊盘形成。 粘合剂膜可以位于具有导电焊盘的基板的表面之间，其中粘合剂膜包括基本上位于导电焊盘上方的孔，使得导电焊盘和/或焊料凸块通过孔彼此面对。 然后可以将两个或更多个基底压在一起以经由粘合剂膜机械地粘合两个或更多个基底。 可以在叠层期间或之后回流焊料凸块以产生焊接段，该焊料段通过粘合剂膜中的孔提供导电焊盘之间的电连接。

公开(公告)号：US20030174484A1

公开(公告)日：2003-09-18

申请号：US10387871

申请日：2003-03-14

Applicant: General Dynamics Advanced Information Systems, Inc

Inventor： Deepak K. Pai ,  Ronald R. Denny

IPC: H05K001/11 ,  H05K001/14

CPC classification number: H05K3/462 ,  H01L2224/05548 ,  H05K3/28 ,  H05K3/3463 ,  H05K3/3484 ,  H05K3/4623 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/0949 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/043 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49213

Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple high-layer-count (HLC) substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two HLC substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). An adhesive film may be positioned between the surfaces of the HLC substrates having the conductive pads, where the adhesive film includes an aperture located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The HLC substrates then may be pressed together to mechanically bond the two substrates via the adhesive. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the two conductive pads through the aperture in the adhesive film.

Abstract translation: 本发明提供了用于层叠和互连多个高层计数（HLC）衬底以形成多层封装或其它电路部件的多种技术。 可以在两个HLC衬底中的至少一个的导电焊盘上形成焊料凸块。 焊料凸块优选地由焊膏应用于导电焊盘形成。 粘合剂膜可以位于具有导电焊盘的HLC衬底的表面之间，其中粘合剂膜包括基本上位于导电焊盘上方的孔，使得导电焊盘和/或焊料凸块通过孔彼此面对。 然后可以将HLC基底压在一起以经由粘合剂机械地粘合两个基底。 在叠层期间或之后可以回流焊料凸点，以产生焊接段，该焊料段通过粘合膜中的孔提供两个导电焊盘之间的电连接。

公开(公告)号：US20040032028A1

公开(公告)日：2004-02-19

申请号：US10641037

申请日：2003-08-15

Applicant: General Dynamics Advanced Information Systems, Inc

Inventor： Deepak K. Pai ,  Ronald R. Denny

IPC: H01L023/48 ,  H01L023/52

CPC classification number: H05K3/462 ,  H01L2224/05548 ,  H05K3/28 ,  H05K3/3463 ,  H05K3/3484 ,  H05K3/4623 ,  H05K2201/0305 ,  H05K2201/0347 ,  H05K2201/0949 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/043 ,  H05K2203/063 ,  H05K2203/0733 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49213

Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple high-layer-count (HLC) substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two HLC substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). An adhesive film may be positioned between the surfaces of the HLC substrates having the conductive pads, where the adhesive film includes an aperture located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The HLC substrates then may be pressed together to mechanically bond the two substrates via the adhesive. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the two conductive pads through the aperture in the adhesive film.

Abstract translation: 本发明提供了用于层叠和互连多个高层计数（HLC）衬底以形成多层封装或其它电路部件的多种技术。 可以在两个HLC衬底中的至少一个的导电焊盘上形成焊料凸块。 焊料凸块优选地由焊膏应用于导电焊盘形成。 粘合剂膜可以位于具有导电焊盘的HLC衬底的表面之间，其中粘合剂膜包括基本上位于导电焊盘上方的孔，使得导电焊盘和/或焊料凸块通过孔彼此面对。 然后可以将HLC基底压在一起以经由粘合剂机械地粘合两个基底。 在叠层期间或之后可以回流焊料凸点，以产生焊接段，该焊料段通过粘合膜中的孔提供两个导电焊盘之间的电连接。