公开(公告)号：US5378906A

公开(公告)日：1995-01-03

申请号：US26387

申请日：1993-03-04

申请人： Hee G. Lee

发明人： Hee G. Lee

IPC分类号： G11C11/401 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  H01L29/68 ,  H01L29/78 ,  H01L29/92

CPC分类号： H01L27/10808 ,  Y10S257/905 ,  Y10S257/907 ,  Y10S257/908

摘要： A dynamic random access memory having an improved layout capable of having a large storage capacity with a small memory cell area as well as preventing the occurrence of short-circuiting by an increase in the process margin, and a method of arranging memory cells of the same. Each active region includes a first diffusion region, a second diffusion region in common with an adjacent memory cell and a channel forming region located between the first and second diffusion regions. First diffusion regions of adjacent active regions are located at positions symmetrical with respect to the common second diffusion region, at a predetermined angle. Each of uniformly spaced bit lines has a protrusion having a predetermined width and length and extending from its one edge in a direction that the word lines extend. At the protrusion, one second diffusion region is disposed. Uniformly spaced word lines cross bit lines. Each capacitor is positioned between two adjacent bit lines and between two adjacent word lines. Each first contact hole is located on the center of each capacitor. Each bit line has a bent portion for preventing a short-circuiting caused by a contact with a protrusion of adjacent bit line. Each word line has a bent portion for preventing a short-circuiting caused by a contact with each corresponding first contact hole.

摘要翻译： 一种具有改进布局的动态随机存取存储器，其能够具有小存储单元区域的大存储容量，并且通过增加处理余量来防止发生短路;以及一种布置其存储单元的方法 。 每个有源区包括第一扩散区，与相邻存储单元共同的第二扩散区和位于第一和第二扩散区之间的沟道形成区。 相邻有源区的第一扩散区位于相对于公共第二扩散区对称的位置处，以预定的角度。 均匀分隔的位线中的每一个具有预定宽度和长度的突起，并且从其一个边缘沿着字线延伸的方向延伸。 在突起处设置一个第二扩散区域。 均匀分隔的字线交叉位线。 每个电容器位于两个相邻位线之间和两个相邻字线之间。 每个第一接触孔位于每个电容器的中心。 每个位线具有用于防止由与相邻位线的突起的接触引起的短路的弯曲部分。 每个字线具有用于防止由与每个对应的第一接触孔的接触引起的短路的弯曲部分。

公开(公告)号：US5457064A

公开(公告)日：1995-10-10

申请号：US366936

申请日：1994-12-30

申请人： Hee G. Lee

发明人： Hee G. Lee

IPC分类号： G11C11/401 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

CPC分类号： H01L27/10808 ,  Y10S257/905 ,  Y10S257/907 ,  Y10S257/908

摘要： A dynamic random access memory having an improved layout capable of having a large storage capacity with a small memory cell area as well as preventing the occurrence of short-circuiting by an increase in the process margin, and a method of arranging memory cells of the same. Each active region includes a first diffusion region, a second diffusion region in common with an adjacent memory cell and a channel forming region located between the first and second diffusion regions. First diffusion regions of adjacent active regions are located at positions symmetrical with respect to the common second diffusion region, at a predetermined angle. Each of uniformly spaced bit lines has a protrusion having a predetermined width and length and extending from its one edge in a direction that the word lines extend. At the protrusion, one second diffusion region is disposed. Uniformly spaced word lines cross bit lines. Each capacitor is positioned between two adjacent bit lines and between two adjacent word lines. Each first contact hole is located on the center of each capacitor. Each bit line has a bent portion for preventing a short-circuiting caused by a contact with a protrusion of adjacent bit line. Each word line has a bent portion for preventing a short-circuiting caused by a contact with each corresponding first contact hole.

摘要翻译： 一种具有改进布局的动态随机存取存储器，其能够具有小存储单元区域的大存储容量，并且通过增加处理余量来防止发生短路;以及一种布置其存储单元的方法 。 每个有源区包括第一扩散区，与相邻存储单元共同的第二扩散区和位于第一和第二扩散区之间的沟道形成区。 相邻有源区的第一扩散区位于相对于公共第二扩散区对称的位置处，以预定的角度。 均匀分隔的位线中的每一个具有预定宽度和长度的突起，并且从其一个边缘沿着字线延伸的方向延伸。 在突起处设置一个第二扩散区域。 均匀分隔的字线交叉位线。 每个电容器位于两个相邻位线之间和两个相邻字线之间。 每个第一接触孔位于每个电容器的中心。 每个位线具有用于防止由与相邻位线的突起的接触引起的短路的弯曲部分。 每个字线具有用于防止由与每个对应的第一接触孔的接触引起的短路的弯曲部分。

公开(公告)号：US5358906A

公开(公告)日：1994-10-25

申请号：US141455

申请日：1993-10-22

申请人： Hee G. Lee

发明人： Hee G. Lee

IPC分类号： H01L23/28 ,  H01L23/495 ,  H01L23/50 ,  H01L21/60

CPC分类号： H01L23/4951 ,  H01L23/49524 ,  H01L23/49548 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/181

摘要： A lead on chip package comprising a semiconductor chip having a plurality of bonding pads and a plurality of minute protrusions formed at both side portions of the upper surface thereof, an insulating film made of a fluoroethylene film having knurled surfaces, and a plurality of inner leads each directly connected to each corresponding bonding pad of the semiconductor chip and provided with knurled surfaces. The formation of minute protrusions is accomplished by using a radio frequency (RF)-sputtering process at a low temperature. The formation of the knurled surfaces at the inner leads can be accomplished by passing the inner leads between rollers each having a knurled outer surface or by coating a nodule or dendrite layer over the surfaces of inner leads by an electro-plating using a high current density. Using the fluoroethylene film, the insulating film can reduce in thickness. By virtue of the knurled surfaces formed at the inner leads and the insulating film, the adhesion can be improved. It is also possible to prevent an occurrence of parasitic capacitance. As a result, there is provided an effect of assisting packages to be laminate.

摘要翻译： 一种芯片封装，包括具有多个接合焊盘的半导体芯片和形成在其上表面的两侧部分的多个微小突起，由具有滚花表面的氟乙烯膜制成的绝缘膜，以及多个内引线 每个直接连接到半导体芯片的每个对应的焊盘并且具有滚花表面。 通过在低温下使用射频（RF）溅射工艺来实现微小突起的形成。 在内引线处形成滚花表面可以通过使内引线在每个具有滚花外表面的辊之间通过使用高电流密度的电镀在内引线的表面上涂覆结核或枝晶层来实现 。 使用氟乙烯膜，绝缘膜的厚度可以减小。 通过形成在内引线和绝缘膜上的滚花表面，可以提高粘合性。 也可以防止寄生电容的发生。 结果，提供了帮助包装件被层压的效果。

公开(公告)号：US5336630A

公开(公告)日：1994-08-09

申请号：US975884

申请日：1992-11-13

申请人： Kwang H. Yun ,  Hee G. Lee ,  Seong J. Jang ,  Young K. Jun

发明人： Kwang H. Yun ,  Hee G. Lee ,  Seong J. Jang ,  Young K. Jun

IPC分类号： G03F7/20 ,  H01L21/027 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108 ,  H01L21/70

CPC分类号： H01L27/10844 ,  G03F7/70425 ,  H01L27/10817 ,  Y10S438/943

摘要： A method of making a semiconductor memory device wherein a storage node having a plurality of pillars, capable of increasing the storage node surface area and thus the cell capacitance. The storage node is formed by depositing a storage node polysilicon film to have a thickness of 5,000 .ANG. to 6,000 .ANG. over a semiconductor substrate, forming a photoresist pattern over the polysilicon film in a direct electron beam writing manner, and etching the polysilicon film up to a depth of 1,000 .ANG. from the upper surfaces of a gate and a bit line by using the photoresist pattern. The formed storage node has a plurality of uniformly spaced pillars. Alternatively, the storage node is formed by forming a smoothing insulating film over the semiconductor substrate depositing a storage node polysilicon film over the smoothing insulating film, primarily photo exposing the semiconductor substrate using a glass mask having phase shifters, secondarily photo exposing the semiconductor substrate under the condition of rotating 90.degree. the semiconductor substrate, to form a check-board photoresist pattern, and patterning the polysilicon film using the photoresist pattern as a mask. The formed storage node has a plurality of pillars arranged independently or intersectionally.

摘要翻译： 一种制造半导体存储器件的方法，其中具有多个柱的存储节点，其能够增加存储节点表面积，从而增加单元电容。 存储节点通过在半导体衬底上沉积厚度为5000至6000的存储节点多晶硅膜形成，以直接电子束写入方式在多晶硅膜上形成光致抗蚀剂图案，并将多晶硅膜蚀刻至 通过使用光致抗蚀剂图案，从栅极和位线的上表面的深度为1000安培。 形成的存储节点具有多个均匀间隔的柱。 或者，存储节点通过在半导体衬底上形成平滑绝缘膜形成，在平滑绝缘膜上沉积存储节点多晶硅膜，主要是使用具有移相器的玻璃掩模对半导体衬底进行曝光，其次将半导体衬底照射到 旋转90°半导体衬底的条件，以形成校准板光致抗蚀剂图案，并使用光致抗蚀剂图案作为掩模对多晶硅膜进行构图。 形成的存储节点具有独立或相互排列的多个支柱。