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公开(公告)号:US08753552B2
公开(公告)日:2014-06-17
申请号:US13154868
申请日:2011-06-07
申请人: Hsu-Tien Hu , Jiun-Hsu Hsiao
发明人: Hsu-Tien Hu , Jiun-Hsu Hsiao
IPC分类号: C01B31/04
CPC分类号: F28F21/02 , F21K9/232 , F21V3/00 , F21V29/85 , F21Y2115/10 , F28D2021/0029 , F28F13/003 , H01L23/373 , H01L23/3733 , H01L2924/0002 , Y10T428/13 , Y10T428/24496 , Y10T428/249967 , H01L2924/00
摘要: A heat sink using porous graphite having graphite particle-stacked porous graphite is provided. The heat sink may provide good heat conductivity and improve strength of carbon foam. Also, a manufacturing method of porous graphite is provided.
摘要翻译: 提供了使用具有石墨颗粒堆积的多孔石墨的多孔石墨的散热器。 散热器可以提供良好的导热性并提高碳泡沫的强度。 另外,提供了多孔石墨的制造方法。
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公开(公告)号:US20120211212A1
公开(公告)日:2012-08-23
申请号:US13154868
申请日:2011-06-07
申请人: Hsu-Tien HU , Jiun-Hsu Hsiao
发明人: Hsu-Tien HU , Jiun-Hsu Hsiao
CPC分类号: F28F21/02 , F21K9/232 , F21V3/00 , F21V29/85 , F21Y2115/10 , F28D2021/0029 , F28F13/003 , H01L23/373 , H01L23/3733 , H01L2924/0002 , Y10T428/13 , Y10T428/24496 , Y10T428/249967 , H01L2924/00
摘要: A heat sink using porous graphite having graphite particle-stacked porous graphite is provided. The heat sink may provide good heat conductivity and improve strength of carbon foam. Also, a manufacturing method of porous graphite is provided.
摘要翻译: 提供了使用具有石墨颗粒堆积的多孔石墨的多孔石墨的散热器。 散热器可以提供良好的导热性并提高碳泡沫的强度。 另外,提供了多孔石墨的制造方法。
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3.
公开(公告)号:US06440836B1
公开(公告)日:2002-08-27
申请号:US09268785
申请日:1999-03-16
申请人: Szu-Wei Lu , Ling-Chen Kung , Ruoh-Huey Uang , Hsu-Tien Hu
发明人: Szu-Wei Lu , Ling-Chen Kung , Ruoh-Huey Uang , Hsu-Tien Hu
IPC分类号: H01L2144
CPC分类号: H01L24/11 , H01L24/13 , H01L2224/03912 , H01L2224/0401 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05669 , H01L2224/1147 , H01L2224/13111 , H01L2924/00013 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2224/13099 , H01L2924/00014
摘要: The present invention discloses a dual-photoresist method for forming fine-pitched solder bumps on flip chips by utilizing two separate layers of photoresist, i.e., a first thin photoresist layer for patterning the BLM layers on top of the aluminum bonding pads and a second thick photoresist layer for patterning the via openings on top of the BLM layers to supply the necessary thickness required for the solder bumps. The first, thin photoresist layer permits an accurate imaging process to be conducted without focusing problems which are normally associated with thick photoresist layers. As an optional step, the present invention may further utilize a thin layer of non-leachable metal such as Cu or Ni for coating on top of the BLM layer and thus further improving the electrical characteristics of the solder bumps subsequently formed thereon. A majority of the BLM layer is removed with the first, thin photoresist layer and thus, in the final BLM removal process, only a very thin adhesion sublayer of the BLM layer needs to be removed and as a result, ensures a clean removal process without damaging the solder bumps already formed with a fine-pitch.
摘要翻译: 本发明公开了一种双光致抗蚀剂方法,用于通过利用两个单独的光致抗蚀剂层(即,用于在铝接合焊盘的顶部上构图BLM层的第一薄光致抗蚀剂层)和倒装芯片上的第二厚度 光刻胶层,用于图案化BLM层顶部的通孔,以提供焊料凸块所需的必要厚度。 第一个薄的光致抗蚀剂层允许进行精确的成像处理,而不需要通常与厚的光致抗蚀剂层相关的聚焦问题。 作为可选步骤,本发明可以进一步利用薄层的不可浸出金属如Cu或Ni涂覆在BLM层的顶部上,从而进一步改善随后在其上形成的焊料凸块的电特性。 BLM层的大部分用第一个薄的光致抗蚀剂层去除,因此在最终的BLM去除过程中,仅需要除去BLM层的非常薄的粘合子层,结果确保清洁的去除过程而不需要 损坏已经形成有微细间距的焊料凸块。
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4.
公开(公告)号:US06179200B2
公开(公告)日:2001-01-30
申请号:US09243031
申请日:1999-02-03
申请人: Ling-Chen Kung , Hsu-Tien Hu , Ruoh-Huey Uang , Szu-Wei Lu , Chun-Yi Kuo
发明人: Ling-Chen Kung , Hsu-Tien Hu , Ruoh-Huey Uang , Szu-Wei Lu , Chun-Yi Kuo
IPC分类号: B23K3512
CPC分类号: B23K3/06 , B23K2101/40 , H01L24/11 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05572 , H01L2224/1147 , H01L2224/13099 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01042 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/30107 , H05K3/3457 , H05K2203/043 , H05K2203/159
摘要: A method for forming solder balls that have improved height on an electronic substrate such as a silicon wafer and devices formed are disclosed. In the method, after solder bumps are deposited by a conventional method such as evaporation, electroplating, electroless plating or solder paste screen printing, the solder bumps are reflown on the substrate in an upside down position such that the gravity of the solder material pulls down the solder ball and thereby increasing its height after the reflow process is completed. It has been found that a minimum of 5%, and preferably about 10% height increase has been achieved. Another benefit achieved by the present invention novel method which is associated with the increase in the solder ball height is a corresponding increase in the pitch distance between the solder balls by at least 5%.
摘要翻译: 公开了一种用于形成在诸如硅晶片的电子衬底和形成的器件上具有改进的高度的焊球的方法。 在该方法中,在通过诸如蒸发,电镀,无电镀或焊膏丝网印刷的常规方法沉积焊锡凸块之后,焊料凸块在上下颠倒的位置在衬底上被反冲,使得焊料材料的重力下拉 焊球,从而在回流处理完成之后增加其高度。 已经发现,已经实现了至少5%,优选地大约10%的高度增加。 通过与焊球高度增加相关的本发明新颖方法实现的另一个优点是焊球之间的间距距离相应增加至少5%。
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5.
公开(公告)号:US06358836B1
公开(公告)日:2002-03-19
申请号:US09595823
申请日:2000-06-16
申请人: Szu-Wei Lu , Kuo-Chuan Chen , Jyh-Rong Lin , Ruoh-Huey Wang , Hsu-Tien Hu , Hsin-Chien Huang
发明人: Szu-Wei Lu , Kuo-Chuan Chen , Jyh-Rong Lin , Ruoh-Huey Wang , Hsu-Tien Hu , Hsin-Chien Huang
IPC分类号: H01L214763
CPC分类号: H01L24/12 , H01L23/3114 , H01L24/11 , H01L2224/0231 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05644 , H01L2224/05647 , H01L2224/1147 , H01L2224/13099 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/30105 , H01L2924/00014
摘要: A method for forming a wafer level package by incorporating an insulating pad of an elastic material under a dummy plug is described. In the method, a multiplicity of pads or islands formed of an elastic material is first formed on a pre-processed semiconductor substrate before a multiplicity of dummy via plugs are formed on top. The dummy via plugs are used as a support structure for building I/O redistribution lines (i.e. metal traces) thereon such that I/O bond pads may be built for supporting solder bumps or solder balls. The multiplicity of insulating pads is used for stress relief during a bonding process with the solder ball built on top without the conventional defect of cracking due to high elasticity of the material when a large area insulating layer is deposited on top. Numerous processing advantages are provided by the present invention method which includes the elimination of direct contact between an elastomeric material layer and a polyimide passivation layer such that potential cracking of the polyamide layer or breaking of I/O redistribution lines can be avoided.
摘要翻译: 描述了通过在虚拟插头下方并入弹性材料的绝缘垫来形成晶片级封装的方法。 在该方法中,在多个虚拟通孔插头形成在顶部之前,首先在预处理的半导体衬底上形成由弹性材料形成的多个焊盘或岛。 虚拟通孔插头用作用于在其上构建I / O再分配线(即,金属迹线)的支撑结构,使得可以构建I / O接合焊盘用于支撑焊料凸块或焊球。 绝缘垫的多重性用于在焊接过程中的应力消除,其中,当在顶部沉积大面积的绝缘层时,由于材料的高弹性而不存在常规的破裂缺陷。 通过本发明的方法提供了许多加工优点,其包括消除弹性体材料层和聚酰亚胺钝化层之间的直接接触,从而可以避免聚酰胺层的电位开裂或I / O再分布线断裂。
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