公开(公告)号：US20060231951A1

公开(公告)日：2006-10-19

申请号：US11446341

申请日：2006-06-02

申请人： Jong-Rong Jan ,  Tsai-Hua Lu ,  Sao-Ling Chiu ,  Ling-Chen Kung

发明人： Jong-Rong Jan ,  Tsai-Hua Lu ,  Sao-Ling Chiu ,  Ling-Chen Kung

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/013

摘要： Bumping a substrate having a metal layer thereon may include forming a barrier layer on the substrate including the metal layer and forming a conductive bump on the barrier layer. Moreover, the barrier layer may be between the conductive bump and the substrate, and the conductive bump may be laterally offset from the metal layer. After forming the conductive bump, the barrier layer may be removed from the metal layer thereby exposing the metal layer while maintaining a portion of the barrier layer between the conductive bump and the substrate. Related structures are also discussed.

公开(公告)号：US06440836B1

公开(公告)日：2002-08-27

申请号：US09268785

申请日：1999-03-16

申请人： Szu-Wei Lu ,  Ling-Chen Kung ,  Ruoh-Huey Uang ,  Hsu-Tien Hu

发明人： Szu-Wei Lu ,  Ling-Chen Kung ,  Ruoh-Huey Uang ,  Hsu-Tien Hu

IPC分类号： H01L2144

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05171 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/1147 ,  H01L2224/13111 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00014

摘要： The present invention discloses a dual-photoresist method for forming fine-pitched solder bumps on flip chips by utilizing two separate layers of photoresist, i.e., a first thin photoresist layer for patterning the BLM layers on top of the aluminum bonding pads and a second thick photoresist layer for patterning the via openings on top of the BLM layers to supply the necessary thickness required for the solder bumps. The first, thin photoresist layer permits an accurate imaging process to be conducted without focusing problems which are normally associated with thick photoresist layers. As an optional step, the present invention may further utilize a thin layer of non-leachable metal such as Cu or Ni for coating on top of the BLM layer and thus further improving the electrical characteristics of the solder bumps subsequently formed thereon. A majority of the BLM layer is removed with the first, thin photoresist layer and thus, in the final BLM removal process, only a very thin adhesion sublayer of the BLM layer needs to be removed and as a result, ensures a clean removal process without damaging the solder bumps already formed with a fine-pitch.

摘要翻译： 本发明公开了一种双光致抗蚀剂方法，用于通过利用两个单独的光致抗蚀剂层（即，用于在铝接合焊盘的顶部上构图BLM层的第一薄光致抗蚀剂层）和倒装芯片上的第二厚度 光刻胶层，用于图案化BLM层顶部的通孔，以提供焊料凸块所需的必要厚度。 第一个薄的光致抗蚀剂层允许进行精确的成像处理，而不需要通常与厚的光致抗蚀剂层相关的聚焦问题。 作为可选步骤，本发明可以进一步利用薄层的不可浸出金属如Cu或Ni涂覆在BLM层的顶部上，从而进一步改善随后在其上形成的焊料凸块的电特性。 BLM层的大部分用第一个薄的光致抗蚀剂层去除，因此在最终的BLM去除过程中，仅需要除去BLM层的非常薄的粘合子层，结果确保清洁的去除过程而不需要 损坏已经形成有微细间距的焊料凸块。

公开(公告)号：US06277669B1

公开(公告)日：2001-08-21

申请号：US09396060

申请日：1999-09-15

申请人： Ling-Chen Kung ,  Jyh-Rong Lin ,  Kuo-Chuan Chen

发明人： Ling-Chen Kung ,  Jyh-Rong Lin ,  Kuo-Chuan Chen

IPC分类号： H01L2144

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/013

摘要： A method for fabricating a wafer level package and packages formed are disclosed. In the method, an elastomeric material layer is first deposited on top of a passivation layer by a printing, coating or laminating method to form a plurality of isolated islands. The islands may have a thickness of less than 100 &mgr;m. Metal traces for I/O redistribution are then formed to connect the isolated islands with bond pads provided on the surface of the wafer such that one bond pad is connected electrically to one isolated island. On top of the metal trace is then deposited an organic material for insulation with the metal trace on top of the isolated islands exposed. After an UBM layer is formed on top of the metal traces that are exposed on the isolated islands, solder balls of suitable size may be planted by a plating technique, a printing technique or a pick and place technique to complete the wafer level package.

摘要翻译： 公开了一种用于制造晶片级封装和封装形成的方法。 在该方法中，弹性体材料层首先通过印刷，涂覆或层压方法沉积在钝化层的顶部上以形成多个隔离的岛。 这些岛可以具有小于100μm的厚度。 然后形成用于I / O重新分布的金属迹线，以将隔离的岛与提供在晶片表面上的接合焊盘连接，使得一个接合焊盘电连接到一个孤立的岛。 然后在金属痕迹的顶部沉积有机材料，用于绝缘的金属痕迹暴露在孤立岛顶上。 在暴露在孤立岛上的金属迹线的顶部形成UBM层之后，可以通过电镀技术，印刷技术或拾取和放置技术种植合适尺寸的焊球来完成晶片级封装。

公开(公告)号：US06197613B1

公开(公告)日：2001-03-06

申请号：US09274611

申请日：1999-03-23

申请人： Ling-Chen Kung ,  Tsung-Yao Chu

发明人： Ling-Chen Kung ,  Tsung-Yao Chu

IPC分类号： H01L2144

CPC分类号： H01L24/12 ,  H01L23/3107 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14

摘要： The present invention discloses a method for forming a wafer level package by first providing a silicon wafer that has a multiplicity of IC dies formed on a top surface, each of the IC dies has at least one peripheral I/O pad formed in an insulating layer, then forming at least one via plug of a conductive metal with a top surface exposed on the at least one peripheral I/O pad, then coating a layer of an insulating material that has sufficient elasticity on the surface of the wafer prior to the deposition and forming of a metal trace on the elastic material layer, at least one area array I/O pad is then formed at an opposite end of the metal trace with a solder bump formed on the I/O pad before they are reflowed into a solder ball. The elastic material layer deposited under the metal traces acts as a stress-buffing layer such that an IC circuit of high reliability can be produced on a wafer level for the low cost fabrication of IC assembly.

摘要翻译： 本发明公开了一种用于形成晶片级封装的方法，首先提供在顶表面上形成多个IC管芯的硅晶片，每个IC管芯具有形成在绝缘层中的至少一个外围I / O焊盘 然后形成具有暴露在所述至少一个外围I / O焊盘上的顶表面的导电金属的至少一个通孔，然后在沉积之前在晶片的表面上涂覆具有足够弹性的绝缘材料层 以及在弹性材料层上形成金属迹线，然后在金属迹线的相对端形成至少一个区域阵列I / O焊盘，其上形成有在I / O焊盘上形成的焊料凸点，然后它们被回流到焊料中 球。 沉积在金属迹线下的弹性材料层用作应力抛光层，使得可以在晶片级上生产具有高可靠性的IC电路，用于IC组件的低成本制造。

公开(公告)号：US07081404B2

公开(公告)日：2006-07-25

申请号：US10780529

申请日：2004-02-17

申请人： Jong-Rong Jan ,  Tsai-Hua Lu ,  Sao-Ling Chiu ,  Ling-Chen Kung

发明人： Jong-Rong Jan ,  Tsai-Hua Lu ,  Sao-Ling Chiu ,  Ling-Chen Kung

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/013

摘要： Bumping a substrate having a metal layer thereon may include forming a barrier layer on the substrate including the metal layer and forming a conductive bump on the barrier layer. Moreover, the barrier layer may be between the conductive bump and the substrate, and the conductive bump may be laterally offset from the metal layer. After forming the conductive bump, the barrier layer may be removed from the metal layer thereby exposing the metal layer while maintaining a portion of the barrier layer between the conductive bump and the substrate. Related structures are also discussed.

摘要翻译： 在其上冲击具有金属层的衬底可以包括在包括金属层的衬底上形成阻挡层，并在阻挡层上形成导电凸块。 此外，阻挡层可以在导电凸块和基板之间，并且导电凸块可以横向偏离金属层。 在形成导电凸块之后，可以从金属层移除阻挡层，从而暴露金属层，同时保持阻挡层的一部分在导电凸块和基板之间。 还讨论了相关结构。

公开(公告)号：US06539624B1

公开(公告)日：2003-04-01

申请号：US09277797

申请日：1999-03-27

申请人： Ling-Chen Kung ,  Kuo-Chuan Chen ,  Ruoh-Huey Uang ,  Szu-Wei Lu

发明人： Ling-Chen Kung ,  Kuo-Chuan Chen ,  Ruoh-Huey Uang ,  Szu-Wei Lu

IPC分类号： H01K900

CPC分类号： H01L24/12 ,  H01L23/3114 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/1147 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49208 ,  Y10T29/49213 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/013

摘要： A method for forming a wafer level package that is equipped with solder balls on a top surface and encapsulated by a stress buffer layer of an elastomeric material is disclosed. The method can be carried by first forming a plurality of solder balls on bond pads provided on a top surface of a wafer and then forming an elastomeric material layer, or any other flexible, compliant material layer to encapsulate the solder balls. The tip portions of the solder balls is then substantially exposed by an etching process of either dry etching or wet etching such that the solder balls can be connected electrically to a circuit board. The present invention further provides a wafer level package that is formed with solder balls on a top surface encapsulated in an elastomeric material layer. The elastomeric material layer serves both as a stress buffer and a thermal expansion buffer such that the integrity and reliability of IC devices severed from the wafer can be maintained.

摘要翻译： 公开了一种用于形成在顶表面上装有焊球并由弹性材料的应力缓冲层封装的晶片级封装的方法。 该方法可以通过首先在设置在晶片的顶表面上的接合焊盘上形成多个焊球，然后形成弹性体材料层或任何其它柔性柔顺材料层以包封焊球。 然后通过干蚀刻或湿蚀刻的蚀刻工艺基本上暴露焊球的尖端部分，使得焊球可以电连接到电路板。 本发明还提供一种晶片级封装，其在封装在弹性体材料层中的顶表面上形成有焊球。 弹性体材料层既用作应力缓冲器又用作热膨胀缓冲器，从而可以保持从晶片切断的IC器件的完整性和可靠性。

公开(公告)号：US07579694B2

公开(公告)日：2009-08-25

申请号：US11446341

申请日：2006-06-02

申请人： Jong-Rong Jan ,  Tsai-Hua Lu ,  Sao-Ling Chiu ,  Ling-Chen Kung

发明人： Jong-Rong Jan ,  Tsai-Hua Lu ,  Sao-Ling Chiu ,  Ling-Chen Kung

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/013

摘要： Bumping a substrate having a metal layer thereon may include forming a barrier layer on the substrate including the metal layer and forming a conductive bump on the barrier layer. Moreover, the barrier layer may be between the conductive bump and the substrate, and the conductive bump may be laterally offset from the metal layer. After forming the conductive bump, the barrier layer may be removed from the metal layer thereby exposing the metal layer while maintaining a portion of the barrier layer between the conductive bump and the substrate. Related structures are also discussed.

摘要翻译： 在其上冲击具有金属层的衬底可以包括在包括金属层的衬底上形成阻挡层，并在阻挡层上形成导电凸块。 此外，阻挡层可以在导电凸块和基板之间，并且导电凸块可以横向偏离金属层。 在形成导电凸块之后，可以从金属层移除阻挡层，从而暴露金属层，同时保持阻挡层的一部分在导电凸块和基板之间。 还讨论了相关结构。

公开(公告)号：US06268114B1

公开(公告)日：2001-07-31

申请号：US09156353

申请日：1998-09-18

申请人： Ying-Nan Wen ,  Ling-Chen Kung ,  Szu-Wei Lu ,  Ruoh-Huey Uang

发明人： Ying-Nan Wen ,  Ling-Chen Kung ,  Szu-Wei Lu ,  Ruoh-Huey Uang

IPC分类号： G03C500

CPC分类号： H01L24/03 ,  H01L24/02 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0401 ,  H01L2224/1147 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014

摘要： A method for forming solder balls that have larger spacings between them and electronic devices containing such solder balls are disclosed. In the method, an additional layer of a leachable metal such as gold or silver is used between an under bump metallurgy layer and a solder bump subsequently formed. This allows the formation of the under bump metallurgy layer prior to the deposition of the solder material into a window formed in a photoresist layer. The present invention allows the underfill of a solder window, instead of an overfill which is normally required in a conventional method.

摘要翻译： 公开了一种用于形成它们之间具有较大间距的焊球和包含这种焊球的电子器件的方法。 在该方法中，在下凸块冶金层和随后形成的焊料凸块之间使用附加的可浸出金属如金或银的层。 这允许在将焊料材料沉积到形成在光致抗蚀剂层中的窗口之前形成凸块下金属层。 本发明允许焊接窗口的底部填充物，而不是常规方法通常需要的过度填充。

公开(公告)号：US06179200B2

公开(公告)日：2001-01-30

申请号：US09243031

申请日：1999-02-03

申请人： Ling-Chen Kung ,  Hsu-Tien Hu ,  Ruoh-Huey Uang ,  Szu-Wei Lu ,  Chun-Yi Kuo

发明人： Ling-Chen Kung ,  Hsu-Tien Hu ,  Ruoh-Huey Uang ,  Szu-Wei Lu ,  Chun-Yi Kuo

IPC分类号： B23K3512

CPC分类号： B23K3/06 ,  B23K2101/40 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/30107 ,  H05K3/3457 ,  H05K2203/043 ,  H05K2203/159

摘要： A method for forming solder balls that have improved height on an electronic substrate such as a silicon wafer and devices formed are disclosed. In the method, after solder bumps are deposited by a conventional method such as evaporation, electroplating, electroless plating or solder paste screen printing, the solder bumps are reflown on the substrate in an upside down position such that the gravity of the solder material pulls down the solder ball and thereby increasing its height after the reflow process is completed. It has been found that a minimum of 5%, and preferably about 10% height increase has been achieved. Another benefit achieved by the present invention novel method which is associated with the increase in the solder ball height is a corresponding increase in the pitch distance between the solder balls by at least 5%.

摘要翻译： 公开了一种用于形成在诸如硅晶片的电子衬底和形成的器件上具有改进的高度的焊球的方法。 在该方法中，在通过诸如蒸发，电镀，无电镀或焊膏丝网印刷的常规方法沉积焊锡凸块之后，焊料凸块在上下颠倒的位置在衬底上被反冲，使得焊料材料的重力下拉 焊球，从而在回流处理完成之后增加其高度。 已经发现，已经实现了至少5％，优选地大约10％的高度增加。 通过与焊球高度增加相关的本发明新颖方法实现的另一个优点是焊球之间的间距距离相应增加至少5％。