Methods for improving the quality of epitaxially-grown semiconductor materials
    1.
    发明授权
    Methods for improving the quality of epitaxially-grown semiconductor materials 有权
    提高外延生长半导体材料质量的方法

    公开(公告)号:US08236593B2

    公开(公告)日:2012-08-07

    申请号:US12600120

    申请日:2008-05-14

    IPC分类号: H01L21/00

    摘要: The invention provides methods which can be applied during the epitaxial growth of two or more layers of semiconductor materials so that the qualities of successive layer are successively improved. In preferred embodiments, surface defects present in one epitaxial layer are capped with a masking material. A following layer is then grown so it extends laterally above the caps according to the known phenomena of epitaxial lateral overgrowth. The methods of the invention can be repeated by capping surface defects in the following layer and then epitaxially growing a second following layer according to ELO. The invention also includes semiconductor structures fabricated by these methods.

    摘要翻译: 本发明提供了可以在两层或更多层半导体材料的外延生长期间应用的方法,使得连续层的质量连续改善。 在优选实施例中,存在于一个外延层中的表面缺陷用掩模材料封盖。 然后根据已知的外延横向过度生长现象生长随后的层,使得其沿着帽盖横向延伸。 本发明的方法可以通过覆盖下一层中的表面缺陷,然后根据ELO外延生长第二个后续层来重复。 本发明还包括通过这些方法制造的半导体结构。

    METHODS FOR IMPROVING THE QUALITY OF EPITAXIALLY-GROWN SEMICONDUCTOR MATERIALS
    2.
    发明申请
    METHODS FOR IMPROVING THE QUALITY OF EPITAXIALLY-GROWN SEMICONDUCTOR MATERIALS 有权
    改善外延生长半导体材料质量的方法

    公开(公告)号:US20100133548A1

    公开(公告)日:2010-06-03

    申请号:US12600120

    申请日:2008-05-14

    IPC分类号: H01L29/20 H01L21/322

    摘要: The invention provides methods which can be applied during the epitaxial growth of two or more layers of semiconductor materials so that the qualities of successive layer are successively improved. In preferred embodiments, surface defects present in one epitaxial layer are capped with a masking material. A following layer is then grown so it extends laterally above the caps according to the known phenomena of epitaxial lateral overgrowth. The methods of the invention can be repeated by capping surface defects in the following layer and then epitaxially growing a second following layer according to ELO. The invention also includes semiconductor structures fabricated by these methods.

    摘要翻译: 本发明提供了可以在两层或更多层半导体材料的外延生长期间应用的方法,使得连续层的质量连续改善。 在优选实施例中,存在于一个外延层中的表面缺陷用掩模材料封盖。 然后根据已知的外延横向过度生长现象生长随后的层,使得其沿着帽盖横向延伸。 本发明的方法可以通过覆盖下一层中的表面缺陷,然后根据ELO外延生长第二个后续层来重复。 本发明还包括通过这些方法制造的半导体结构。

    STORAGE DEVICE AND AN OPERATING METHOD OF THE STORAGE DEVICE
    3.
    发明申请
    STORAGE DEVICE AND AN OPERATING METHOD OF THE STORAGE DEVICE 审中-公开
    存储设备和存储设备的操作方法

    公开(公告)号:US20150278087A1

    公开(公告)日:2015-10-01

    申请号:US14541335

    申请日:2014-11-14

    申请人: ILSU HAN HeeChang Cho

    发明人: ILSU HAN HeeChang Cho

    IPC分类号: G06F12/02

    摘要: An operation method of a storage device includes receiving a request; performing an operation corresponding to the received request; generating response data corresponding to the performed operation wherein the response data includes information on the performed operation; and outputting the response data. Status information is added to and output with the response data, wherein the status information includes information on a status of the storage device.

    摘要翻译: 一种存储装置的操作方法,包括:接收请求; 执行与接收到的请求相对应的操作; 生成与执行的操作相对应的响应数据,其中所述响应数据包括关于所执行的操作的信息; 并输出响应数据。 状态信息被添加到响应数据并与响应数据一起输出,其中状态信息包括关于存储设备的状态的信息。

    Epitaxial methods and templates grown by the methods
    4.
    发明授权
    Epitaxial methods and templates grown by the methods 有权
    通过方法生长的外延方法和模板

    公开(公告)号:US08574968B2

    公开(公告)日:2013-11-05

    申请号:US12180418

    申请日:2008-07-25

    IPC分类号: H01L21/82

    摘要: This invention provides methods for fabricating substantially continuous layers of a group III nitride semiconductor material having low defect densities and optionally having a selected crystal polarity. The methods include epitaxial growth nucleating and/or seeding on the upper portions of a plurality of pillars/islands of a group III nitride material that are irregularly arranged on a template structure. The upper portions of the islands have low defect densities and optionally have a selected crystal polarity. The invention also includes template structures having a substantially continuous layer of a masking material through which emerge upper portions of the pillars/islands. The invention also includes such template structures. The invention can be applied to a wide range of semiconductor materials, both elemental semiconductors, e.g., combinations of Si (silicon) with strained Si (sSi) and/or Ge (germanium), and compound semiconductors, e.g., group II-VI and group III-V compound semiconductor materials.

    摘要翻译: 本发明提供了用于制造具有低缺陷密度且任选地具有所选晶体极性的III族氮化物半导体材料的基本上连续的层的方法。 所述方法包括在不规则地布置在模板结构上的III族氮化物材料的多个柱/岛的上部上的外延生长成核和/或接种。 岛的上部具有低缺陷密度,并且可选地具有选定的晶体极性。 本发明还包括具有基本连续的掩模材料层的模板结构,通过该掩模材料出现柱/岛的上部。 本发明还包括这样的模板结构。 本发明可以应用于宽范围的半导体材料,包括元素半导体,例如Si(硅)与应变Si(sSi)和/或Ge(锗)的组合,以及化合物半导体,例如II-VI族和 III-V族化合物半导体材料。

    Methods for improving the quality of structures comprising semiconductor materials

    公开(公告)号:US08329565B2

    公开(公告)日:2012-12-11

    申请号:US13106647

    申请日:2011-05-12

    IPC分类号: H01L21/20

    摘要: Methods which can be applied during the epitaxial growth of semiconductor structures and layers of III-nitride materials so that the qualities of successive layers are successively improved. An intermediate epitaxial layer is grown on an initial surface so that growth pits form at surface dislocations present in the initial surface. A following layer is then grown on the intermediate layer according to the known phenomena of epitaxial lateral overgrowth so it extends laterally and encloses at least the agglomerations of intersecting growth pits. Preferably, prior to growing the following layer, a discontinuous film of a dielectric material is deposited so that the dielectric material deposits discontinuously so as to reduce the number of dislocations in the laterally growing material. The methods of the invention can be performed multiple times to the same structure. Also, semiconductor structures fabricated by these methods.

    METHODS FOR IMPROVING THE QUALITY OF STRUCTURES COMPRISING SEMICONDUCTOR MATERIALS
    6.
    发明申请
    METHODS FOR IMPROVING THE QUALITY OF STRUCTURES COMPRISING SEMICONDUCTOR MATERIALS 有权
    用于改善包含半导体材料的结构质量的方法

    公开(公告)号:US20110212603A1

    公开(公告)日:2011-09-01

    申请号:US13106647

    申请日:2011-05-12

    IPC分类号: H01L21/20

    摘要: Methods which can be applied during the epitaxial growth of semiconductor structures and layers of III-nitride materials so that the qualities of successive layers are successively improved. An intermediate epitaxial layer is grown on an initial surface so that growth pits form at surface dislocations present in the initial surface. A following layer is then grown on the intermediate layer according to the known phenomena of epitaxial lateral overgrowth so it extends laterally and encloses at least the agglomerations of intersecting growth pits. Preferably, prior to growing the following layer, a discontinuous film of a dielectric material is deposited so that the dielectric material deposits discontinuously so as to reduce the number of dislocations in the laterally growing material. The methods of the invention can be performed multiple times to the same structure. Also, semiconductor structures fabricated by these methods.

    摘要翻译: 可以在半导体结构和III族氮化物材料层的外延生长期间应用的方法,使得连续层的质量连续改善。 在初始表面上生长中间外延层,使得在初始表面中存在的表面位错处形成生长坑。 然后根据已知的外延横向过度生长现象在中间层上生长随后的层,因此其横向延伸并且至少包围相交的生长凹坑的聚集体。 优选地,在生长下一层之前,沉积介电材料的不连续膜,使得电介质材料不连续地沉积,以减少侧向生长材料中位错的数量。 本发明的方法可以多次进行到相同的结构。 此外,通过这些方法制造的半导体结构。

    Template layers for heteroepitaxial deposition of III-nitride semiconductor materials using HVPE processes
    7.
    发明授权
    Template layers for heteroepitaxial deposition of III-nitride semiconductor materials using HVPE processes 有权
    使用HVPE工艺的III族氮化物半导体材料的异质外延沉积的模板层

    公开(公告)号:US09076666B2

    公开(公告)日:2015-07-07

    申请号:US13989004

    申请日:2011-11-23

    摘要: Methods of depositing III-nitride semiconductor materials on substrates include depositing a layer of III-nitride semi-conductor material on a surface of a substrate in a nucleation HVPE process stage to form a nucleation layer having a microstructure comprising at least some amorphous III-nitride semiconductor material. The nucleation layer may be annealed to form crystalline islands of epitaxial nucleation material on the surface of the substrate. The islands of epitaxial nucleation material may be grown and coalesced in a coalescence HVPE process stage to form a nucleation template layer of the epitaxial nucleation material. The nucleation template layer may at least substantially cover the surface of the substrate. Additional III-nitride semiconductor material may be deposited over the nucleation template layer of the epitaxial nucleation material in an additional HVPE process stage. Final and intermediate structures comprising III-nitride semiconductor material are formed by such methods.

    摘要翻译: 在衬底上沉积III族氮化物半导体材料的方法包括在成核HVPE工艺阶段中在衬底的表面上沉积III族氮化物半导体材料层,以形成具有包含至少一些非晶III族氮化物 半导体材料。 成核层可以退火以在衬底的表面上形成外延成核材料的晶体岛。 外延成核材料岛可以在聚结HVPE工艺阶段中生长和聚结,以形成外延成核材料的成核模板层。 成核模板层可以至少基本上覆盖基材的表面。 另外的III族氮化物半导体材料可以在另外的HVPE工艺阶段中沉积在外延成核材料的成核模板层上。 通过这种方法形成包含III族氮化物半导体材料的最终和中间结构。

    TEMPLATE LAYERS FOR HETEROEPITAXIAL DEPOSITION OF III NITRIDE SEMICONDUCTOR MATERIALS USING HVPE PROCESSES
    8.
    发明申请
    TEMPLATE LAYERS FOR HETEROEPITAXIAL DEPOSITION OF III NITRIDE SEMICONDUCTOR MATERIALS USING HVPE PROCESSES 有权
    使用HVPE工艺的III型氮化物半导体材料的异相沉积的模板层

    公开(公告)号:US20140217553A1

    公开(公告)日:2014-08-07

    申请号:US13989004

    申请日:2011-11-23

    IPC分类号: H01L21/02 H01L29/06

    摘要: Methods of depositing III-nitride semiconductor materials on substrates include depositing a layer of III-nitride semiconductor material on a surface of a substrate in a nucleation HVPE process stage to form a nucleation layer having a microstructure comprising at least some amorphous III-nitride semiconductor material. The nucleation layer may be annealed to form crystalline islands of epitaxial nucleation material on the surface of the substrate. The islands of epitaxial nucleation material may be grown and coalesced in a coalescence HVPE process stage to form a nucleation template layer of the epitaxial nucleation material. The nucleation template layer may at least substantially cover the surface of the substrate. Additional III-nitride semiconductor material may be deposited over the nucleation template layer of the epitaxial nucleation material in an additional HVPE process stage. Final and intermediate structures comprising III-nitride semiconductor material are formed by such methods.

    摘要翻译: 在衬底上沉积III族氮化物半导体材料的方法包括在成核HVPE工艺阶段中在衬底的表面上沉积III族氮化物半导体材料层,以形成具有包含至少一些非晶III族氮化物半导体材料的微结构的成核层 。 成核层可以退火以在衬底的表面上形成外延成核材料的晶体岛。 外延成核材料岛可以在聚结HVPE工艺阶段中生长和聚结,以形成外延成核材料的成核模板层。 成核模板层可以至少基本上覆盖基材的表面。 另外的III族氮化物半导体材料可以在另外的HVPE工艺阶段中沉积在外延成核材料的成核模板层上。 通过这种方法形成包含III族氮化物半导体材料的最终和中间结构。

    EPITAXIAL METHODS AND TEMPLATES GROWN BY THE METHODS
    9.
    发明申请
    EPITAXIAL METHODS AND TEMPLATES GROWN BY THE METHODS 有权
    方法生成的外来方法和模板

    公开(公告)号:US20090098343A1

    公开(公告)日:2009-04-16

    申请号:US12180418

    申请日:2008-07-25

    IPC分类号: H01L21/20 B32B3/10

    摘要: This invention provides methods for fabricating substantially continuous layers of a group III nitride semiconductor material having low defect densities and optionally having a selected crystal polarity. The methods include epitaxial growth nucleating and/or seeding on the upper portions of a plurality of pillars/islands of a group III nitride material that are irregularly arranged on a template structure. The upper portions of the islands have low defect densities and optionally have a selected crystal polarity. The invention also includes template structures having a substantially continuous layer of a masking material through which emerge upper portions of the pillars/islands. The invention also includes such template structures. The invention can be applied to a wide range of semiconductor materials, both elemental semiconductors, e.g., combinations of Si (silicon) with strained Si (sSi) and/or Ge (germanium), and compound semiconductors, e.g., group II-VI and group III-V compound semiconductor materials.

    摘要翻译: 本发明提供了用于制造具有低缺陷密度且任选地具有所选晶体极性的III族氮化物半导体材料的基本上连续的层的方法。 所述方法包括在不规则地布置在模板结构上的III族氮化物材料的多个柱/岛的上部上的外延生长成核和/或接种。 岛的上部具有低缺陷密度,并且可选地具有选定的晶体极性。 本发明还包括具有基本连续的掩模材料层的模板结构,通过该掩模材料出现柱/岛的上部。 本发明还包括这样的模板结构。 本发明可以应用于宽范围的半导体材料,包括元素半导体,例如Si(硅)与应变Si(sSi)和/或Ge(锗)的组合,以及化合物半导体,例如II-VI族和 III-V族化合物半导体材料。