公开(公告)号：US20100117122A1

公开(公告)日：2010-05-13

申请号：US12269073

申请日：2008-11-12

Applicant: John J. Benoit ,  David S. Collins ,  Natalie B. Feilchenfeld ,  Michael L. Gautsch ,  Xuefeng Liu ,  Robert M. Rassel ,  Stephen A. St Onge ,  James A. Slinkman

Inventor： John J. Benoit ,  David S. Collins ,  Natalie B. Feilchenfeld ,  Michael L. Gautsch ,  Xuefeng Liu ,  Robert M. Rassel ,  Stephen A. St Onge ,  James A. Slinkman

IPC: H01L27/092 ,  H01L27/085

CPC classification number: H01L21/761 ,  H01L21/823481 ,  H01L21/823493 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0921 ,  H01L27/0928

Abstract: A structure for a semiconductor device includes an isolated MOSFET (e.g., NFET) having triple-well technology adjacent to an isolated PFET which itself is adjacent to an isolated NFET. The structure includes a substrate in which is formed a deep n-band region underneath any n-wells, p-wells and p-band regions within the substrate. One p-band region is formed above the deep n-band region and underneath the isolated p-well for the isolated MOSFET, while another p-band region is formed above the deep n-band region and underneath all of the p-wells and n-wells, including those that are part of the isolated PFET and NFET devices within the substrate. The n-wells for the isolated MOSFET are connected to the deep n-band region. The resulting structure provides for improved device isolation and reduction of noise propagating from the substrate to the FETs while maintaining the standard CMOS spacing layout spacing rules and electrical biasing characteristics both external and internal to the triple-well isolation regions.

Abstract translation: 用于半导体器件的结构包括具有三阱技术的隔离MOSFET（例如，NFET），其邻近隔离PFET，其本身与隔离的NFET相邻。 该结构包括其中在衬底内的任何n阱，p阱和p带区之下形成深n波段区的衬底。 一个p带区域形成在深n波段区域之上，隔离的MOSFET的隔离p阱下面，而另一个p波段区域形成在深n波段区域上方，并在所有p阱区域下方， n阱，包括作为衬底内的隔离PFET和NFET器件的一部分的n阱。 隔离MOSFET的n阱连接到深n波段区域。 所得到的结构提供改进的器件隔离和降低从衬底传播到FET的噪声，同时保持三阱隔离区域的外部和内部的标准CMOS间隔布局间隔规则和电偏置特性。

公开(公告)号：US08482101B2

公开(公告)日：2013-07-09

申请号：US12488899

申请日：2009-06-22

Applicant: John J. Benoit ,  Mattias E. Dahlstrom ,  Mark D. Dupuis ,  Peter B. Gray ,  Anthony K. Stamper

Inventor： John J. Benoit ,  Mattias E. Dahlstrom ,  Mark D. Dupuis ,  Peter B. Gray ,  Anthony K. Stamper

IPC: H01L29/66

CPC classification number: H01L29/732 ,  H01L29/0821 ,  H01L29/0826 ,  H01L29/167 ,  H01L29/207 ,  H01L29/227 ,  H01L29/34 ,  H01L29/66272

Abstract: A bipolar transistor structure and a method for fabricating the bipolar transistor structure include: (1) a collector structure located at least in-part within a semiconductor substrate; (2) a base structure contacting the collector structure; and (3) an emitter structure contacting the base structure. The interface of the emitter structure and the base structure includes an oxygen impurity and at least one impurity selected from the group consisting of a fluorine impurity and a carbon impurity, to enhance performance of a bipolar transistor within the bipolar transistor structure. The impurities may be introduced into the interface by plasma etch treatment, or alternatively a thermal treatment followed by an anhydrous ammonia and hydrogen fluoride treatment, of a base material from which is comprised the base structure.

Abstract translation: 双极晶体管结构和制造双极晶体管结构的方法包括：（1）至少部分地位于半导体衬底内的集电极结构; （2）与收集器结构接触的基部结构; 和（3）与基底结构接触的发射体结构。 发射极结构和基极结构的界面包括氧杂质和选自氟杂质和碳杂质的至少一种杂质，以增强双极晶体管结构内的双极晶体管的性能。 杂质可以通过等离子体蚀刻处理或者替代地进行无水氨和氟化氢处理的热处理而引入到界面中，其中基体材料由基底结构组成。

公开(公告)号：US07868423B2

公开(公告)日：2011-01-11

申请号：US12269073

申请日：2008-11-12

Applicant: John J. Benoit ,  David S. Collins ,  Natalie B. Feilchenfeld ,  Michael L. Gautsch ,  Xuefeng Liu ,  Robert M. Rassel ,  Stephen A. St. Onge ,  James A. Slinkman

Inventor： John J. Benoit ,  David S. Collins ,  Natalie B. Feilchenfeld ,  Michael L. Gautsch ,  Xuefeng Liu ,  Robert M. Rassel ,  Stephen A. St. Onge ,  James A. Slinkman

IPC: H01L21/02

CPC classification number: H01L21/761 ,  H01L21/823481 ,  H01L21/823493 ,  H01L21/823878 ,  H01L21/823892 ,  H01L27/0921 ,  H01L27/0928

Abstract: A structure for a semiconductor device includes an isolated MOSFET (e.g., NFET) having triple-well technology adjacent to an isolated PFET which itself is adjacent to an isolated NFET. The structure includes a substrate in which is formed a deep n-band region underneath any n-wells, p-wells and p-band regions within the substrate. One p-band region is formed above the deep n-band region and underneath the isolated p-well for the isolated MOSFET, while another p-band region is formed above the deep n-band region and underneath all of the p-wells and n-wells, including those that are part of the isolated PFET and NFET devices within the substrate. The n-wells for the isolated MOSFET are connected to the deep n-band region. The resulting structure provides for improved device isolation and reduction of noise propagating from the substrate to the FETs while maintaining the standard CMOS spacing layout spacing rules and electrical biasing characteristics both external and internal to the triple-well isolation regions.

Abstract translation: 用于半导体器件的结构包括具有三阱技术的隔离MOSFET（例如，NFET），其邻近隔离PFET，其本身与隔离的NFET相邻。 该结构包括其中在衬底内的任何n阱，p阱和p带区之下形成深n波段区的衬底。 一个p带区域形成在深n波段区域之上，隔离的MOSFET的隔离p阱下面，而另一个p波段区域形成在深n波段区域之上，并且在所有p-阱区下面， n阱，包括作为衬底内的隔离PFET和NFET器件的一部分的n阱。 隔离MOSFET的n阱连接到深n波段区域。 所得到的结构提供改进的器件隔离和降低从衬底传播到FET的噪声，同时保持三阱隔离区域的外部和内部的标准CMOS间隔布局间隔规则和电偏置特性。

公开(公告)号：US20100320571A1

公开(公告)日：2010-12-23

申请号：US12488899

申请日：2009-06-22

Applicant: John J. Benoit ,  Mattias E. Dahlstrom ,  Mark D. Dupuis ,  Peter B. Gray ,  Anthony K. Stamper

Inventor： John J. Benoit ,  Mattias E. Dahlstrom ,  Mark D. Dupuis ,  Peter B. Gray ,  Anthony K. Stamper

IPC: H01L29/73 ,  H01L21/331

CPC classification number: H01L29/732 ,  H01L29/0821 ,  H01L29/0826 ,  H01L29/167 ,  H01L29/207 ,  H01L29/227 ,  H01L29/34 ,  H01L29/66272

Abstract: A bipolar transistor structure and a method for fabricating the bipolar transistor structure include: (1) a collector structure located at least in-part within a semiconductor substrate; (2) a base structure contacting the collector structure; and (3) an emitter structure contacting the base structure. The interface of the emitter structure and the base structure includes an oxygen impurity and at least one impurity selected from the group consisting of a fluorine impurity and a carbon impurity, to enhance performance of a bipolar transistor within the bipolar transistor structure. The impurities may be introduced into the interface by plasma etch treatment, or alternatively a thermal treatment followed by an anhydrous ammonia and hydrogen fluoride treatment, of a base material from which is comprised the base structure.

Abstract translation: 双极晶体管结构和制造双极晶体管结构的方法包括：（1）至少部分地位于半导体衬底内的集电极结构; （2）与收集器结构接触的基部结构; 和（3）与基底结构接触的发射体结构。 发射极结构和基极结构的界面包括氧杂质和选自氟杂质和碳杂质的至少一种杂质，以增强双极晶体管结构内的双极晶体管的性能。 杂质可以通过等离子体蚀刻处理或者替代地进行无水氨和氟化氢处理的热处理而引入到界面中，其中基体材料由基底结构组成。

公开(公告)号：US4998093A

公开(公告)日：1991-03-05

申请号：US285767

申请日：1988-12-16

Applicant: John J. Benoit

Inventor： John J. Benoit

IPC: G08B13/183 ,  G08G1/04

CPC classification number: G08G1/04 ,  G08B13/183

Abstract: An extremely reliable, easily portable perimeter alarm system. It is comprised of a light beam controlled radio transmitter and personal warning devices capable of individually warning preoccupied highway workers of the imminent danger present when an errant vehicle violates the established perimeter of a work site. This warning will allow the workers to take evasive action and potentially avoid injury and/or death. It is also the object of this invention to allow for an extremely reliable, easily portable perimeter penetration alarm system that can be utilized in other appropriate settings by security guards, military personnel, etc., and which would provide for confidential notification to such personnel that a temporarily established portable perimeter line had been violated.

Abstract translation: 一个非常可靠，便于携带的周边报警系统。 它包括一个光束控制的无线电发射机和个人警告装置，能够单独地警告高速公路工作人员出现即将发生的危险，当违规车辆违反工地的既定周边时。 这个警告将允许工人采取回避行动，并可能避免伤害和/或死亡。 本发明的另一个目的是允许一种非常可靠，便于携带的周边穿透报警系统，其可由安全卫士，军事人员等在其他适当的设置中使用，并且将提供对这些人员的机密通知， 一个临时建立的便携式外围线已被侵犯。