公开(公告)号：US20190131480A1

公开(公告)日：2019-05-02

申请号：US16233705

申请日：2018-12-27

申请人： NARSINGH B. SINGH ,  JOHN V. VELIADIS ,  BETTINA NECHAY ,  ANDRE BERGHMANS ,  DAVID J. KNUTESON ,  DAVID KAHLER ,  BRIAN WAGNER ,  MARC SHERWIN

发明人： NARSINGH B. SINGH ,  JOHN V. VELIADIS ,  BETTINA NECHAY ,  ANDRE BERGHMANS ,  DAVID J. KNUTESON ,  DAVID KAHLER ,  BRIAN WAGNER ,  MARC SHERWIN

IPC分类号： H01L31/107 ,  H01L27/144 ,  H01L31/0352 ,  H01L31/18 ,  H01L31/0232 ,  H01L31/0336

摘要： An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.

公开(公告)号：US09960159B2

公开(公告)日：2018-05-01

申请号：US15015564

申请日：2016-02-04

申请人： John V. Veliadis

发明人： John V. Veliadis

IPC分类号： H01L27/088 ,  G06F9/44 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/66 ,  H01L29/808

CPC分类号： H01L27/088 ,  G06F8/33 ,  G06F8/72 ,  G06F8/75 ,  H01L21/8232 ,  H01L21/823418 ,  H01L21/823487 ,  H01L27/098 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/66045 ,  H01L29/66068 ,  H01L29/66909 ,  H01L29/66924 ,  H01L29/8083

摘要： A monolithic bi-directional device provides bi-directional power flow and bi-directional blocking of high-voltages. The device includes a first transistor having a first drain formed over a first channel layer that overlays a substrate, and a second transistor that includes a second drain formed over a second channel layer that overlays the substrate. The substrate forms a common source for both the first transistor and the second transistor.

公开(公告)号：US20170194527A1

公开(公告)日：2017-07-06

申请号：US15356152

申请日：2016-11-18

申请人： NARSINGH B. SINGH ,  JOHN V. VELIADIS ,  BETTINA NECHAY ,  ANDRE BERGHMANS ,  DAVID J. KNUTESON ,  DAVID KAHLER ,  BRIAN WAGNER ,  MARC SHERWIN

发明人： NARSINGH B. SINGH ,  JOHN V. VELIADIS ,  BETTINA NECHAY ,  ANDRE BERGHMANS ,  DAVID J. KNUTESON ,  DAVID KAHLER ,  BRIAN WAGNER ,  MARC SHERWIN

IPC分类号： H01L31/107 ,  H01L31/18 ,  H01L31/0336 ,  H01L27/144 ,  H01L31/0232

CPC分类号： H01L31/1075 ,  H01L27/1443 ,  H01L27/1446 ,  H01L31/02327 ,  H01L31/0336 ,  H01L31/035227 ,  H01L31/18

摘要： An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.

公开(公告)号：US09293465B1

公开(公告)日：2016-03-22

申请号：US14483851

申请日：2014-09-11

申请人： John V. Veliadis

发明人： John V. Veliadis

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L27/098 ,  H01L21/8232 ,  H01L29/808 ,  H01L29/06

CPC分类号： H01L27/088 ,  G06F8/33 ,  G06F8/72 ,  G06F8/75 ,  H01L21/8232 ,  H01L21/823418 ,  H01L21/823487 ,  H01L27/098 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/66045 ,  H01L29/66068 ,  H01L29/66909 ,  H01L29/66924 ,  H01L29/8083

摘要： A monolithic bi-directional device provides bi-directional power flow and bi-directional blocking of high-voltages. The device includes a first transistor having a first drain formed over a first channel layer that overlays a substrate, and a second transistor that includes a second drain formed over a second channel layer that overlays the substrate. The substrate forms a common source for both the first transistor and the second transistor.

摘要翻译： 单片双向器件提供双向功率流和双向阻断高电压。 该器件包括第一晶体管，其具有形成在覆盖衬底的第一沟道层上的第一漏极，以及第二晶体管，其包括形成在覆盖衬底的第二沟道层上的第二漏极。 衬底形成用于第一晶体管和第二晶体管的公共源极。

公开(公告)号：US20160079244A1

公开(公告)日：2016-03-17

申请号：US14483851

申请日：2014-09-11

申请人： JOHN V. VELIADIS

发明人： JOHN V. VELIADIS

IPC分类号： H01L27/098 ,  H01L29/808 ,  H01L29/06 ,  H01L21/8232

CPC分类号： H01L27/088 ,  G06F8/33 ,  G06F8/72 ,  G06F8/75 ,  H01L21/8232 ,  H01L21/823418 ,  H01L21/823487 ,  H01L27/098 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/66045 ,  H01L29/66068 ,  H01L29/66909 ,  H01L29/66924 ,  H01L29/8083

摘要： A monolithic bi-directional device provides bi-directional power flow and bi-directional blocking of high-voltages. The device includes a first transistor having a first drain formed over a first channel layer that overlays a substrate, and a second transistor that includes a second drain formed over a second channel layer that overlays the substrate. The substrate forms a common source for both the first transistor and the second transistor.

公开(公告)号：US20120104416A1

公开(公告)日：2012-05-03

申请号：US13344234

申请日：2012-01-05

申请人： John V. VELIADIS

发明人： John V. VELIADIS

IPC分类号： H01L29/161

CPC分类号： H01L29/66068 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/2203 ,  H01L29/6631 ,  H01L29/732

摘要： Semiconductor devices with multiple floating guard ring edge termination structures and methods of fabricating same are disclosed. A method for fabricating guard rings in a semiconductor device that includes forming a mesa structure on a semiconductor layer stack, the semiconductor stack including two or more layers of semiconductor materials including a first layer and a second layer, said second layer being on top of said first layer, forming trenches for guard rings in the first layer outside a periphery of said mesa, and forming guard rings in the trenches. The top surfaces of said guard rings have a lower elevation than a top surface of said first layer.

摘要翻译： 公开了具有多个浮动保护环边缘终端结构的半导体器件及其制造方法。 一种在半导体器件中制造保护环的方法，包括在半导体层堆叠上形成台面结构，所述半导体堆叠包括两层或更多层包括第一层和第二层的半导体材料，所述第二层位于所述 第一层，在所述台面的外围的第一层中形成保护环的沟槽，并在沟槽中形成保护环。 所述保护环的顶表面具有比所述第一层的顶表面更低的高度。

公开(公告)号：US08105911B2

公开(公告)日：2012-01-31

申请号：US12828646

申请日：2010-07-01

申请人： John V. Veliadis

发明人： John V. Veliadis

IPC分类号： H01L21/331

CPC分类号： H01L29/66068 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/2203 ,  H01L29/6631 ,  H01L29/732

摘要： Semiconductor devices with multiple floating guard ring edge termination structures and methods of fabricating same are disclosed. A method for fabricating guard rings in a semiconductor device that includes forming a mesa structure on a semiconductor layer stack, the semiconductor stack including two or more layers of semiconductor materials including a first layer and a second layer, said second layer being on top of said first layer, forming trenches for guard rings in the first layer outside a periphery of said mesa, and forming guard rings in the trenches. The top surfaces of said guard rings have a lower elevation than a top surface of said first layer.

摘要翻译： 公开了具有多个浮动保护环边缘终端结构的半导体器件及其制造方法。 一种在半导体器件中制造保护环的方法，包括在半导体层堆叠上形成台面结构，所述半导体堆叠包括两层或更多层包括第一层和第二层的半导体材料，所述第二层位于所述 第一层，在所述台面的外围的第一层中形成保护环的沟槽，并在沟槽中形成保护环。 所述保护环的顶表面具有比所述第一层的顶表面更低的高度。

公开(公告)号：US10211359B2

公开(公告)日：2019-02-19

申请号：US15356152

申请日：2016-11-18

申请人： Narsingh B. Singh ,  John V. Veliadis ,  Bettina Nechay ,  Andre Berghmans ,  David J. Knuteson ,  David Kahler ,  Brian Wagner ,  Marc Sherwin

发明人： Narsingh B. Singh ,  John V. Veliadis ,  Bettina Nechay ,  Andre Berghmans ,  David J. Knuteson ,  David Kahler ,  Brian Wagner ,  Marc Sherwin

IPC分类号： H01L31/107 ,  H01L31/0336 ,  H01L31/0232 ,  H01L27/144 ,  H01L31/18 ,  H01L31/0352

摘要： An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.

公开(公告)号：US20150236186A1

公开(公告)日：2015-08-20

申请号：US14185567

申请日：2014-02-20

申请人： NARSINGH B. SINGH ,  John V. Veliadis ,  Bettina Nechay ,  Andre Berghmans ,  David J. Knuteson ,  David Kahler ,  Brian Wagner ,  Marc Sherwin

发明人： NARSINGH B. SINGH ,  John V. Veliadis ,  Bettina Nechay ,  Andre Berghmans ,  David J. Knuteson ,  David Kahler ,  Brian Wagner ,  Marc Sherwin

IPC分类号： H01L31/107 ,  H01L31/18 ,  H01L27/144 ,  H01L31/0336 ,  H01L31/0232

CPC分类号： H01L31/1075 ,  H01L27/1443 ,  H01L27/1446 ,  H01L31/02327 ,  H01L31/0336 ,  H01L31/035227 ,  H01L31/18

摘要： An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.

摘要翻译： 集成电路包括包括外延层的衬底材料，其中衬底材料和外延层形成具有第一导电类型的外延层的第一半导体材料。 包括不同于第一半导体材料的第一导电类型掺杂的具有第二导电类型的第二半导体材料的至少一个纳米线与第一半导体材料形成结交​​叉区域。 纳米线和第一半导体材料在结交叉区域形成雪崩光电二极管（APD），以实现单光子检测。 在替代配置中，APD形成为p-i-n交叉区域，其中n表示n型材料，i表示本征层，p表示p型材料。

公开(公告)号：US08664048B2

公开(公告)日：2014-03-04

申请号：US12980005

申请日：2010-12-28

申请人： John V. Veliadis

发明人： John V. Veliadis

IPC分类号： H01L21/332 ,  H01L21/8238

CPC分类号： H01L29/8083 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/66909

摘要： A semiconductor device with minimized current flow differences and method of fabricating same are disclosed. The method includes forming a semiconductor stack including a plurality of layers that include a first layer having a first conductivity type and a second layer having a first conductivity type, in which the second layer is on top of the first layer, forming a plurality of mesas in the semiconductor layer stack, and forming a plurality of gates in the semiconductor layer stack having a second conductivity type and situated partially at a periphery of the mesas, in which the plurality of gates are formed to minimize current flow differences between a current flowing from the first layer to the plurality of mesas at a first applied gate bias and a current flowing from the first layer to the plurality of mesas at a second applied gate bias when voltage is applied to the semiconductor device.