公开(公告)号：US07344954B2

公开(公告)日：2008-03-18

申请号：US11306560

申请日：2006-01-03

申请人： Ta-Chuan Yeh ,  Ni-Min Chung ,  Kao-Su Huang ,  Yung-Chang Lin ,  Ruey-Chyr Lee ,  Chien-Kuo Wang

发明人： Ta-Chuan Yeh ,  Ni-Min Chung ,  Kao-Su Huang ,  Yung-Chang Lin ,  Ruey-Chyr Lee ,  Chien-Kuo Wang

IPC分类号： H01L21/20

CPC分类号： H01L27/1087 ,  H01L21/76205

摘要： A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens the deep trench opening. Then, a conductive layer is filled in the deep trench opening.

摘要翻译： 提供了具有氧化物层，第一氮化硅 - 硅，STI和第二氮化硅 - 硅的衬底。 蚀刻第二氮化硅 - 硅层上的图案多晶硅层以形成深沟槽开口。 蚀刻图案多晶硅层也加深了深沟槽开口。 然后，在深沟槽开口中填充导电层。

公开(公告)号：US20080038931A1

公开(公告)日：2008-02-14

申请号：US11871166

申请日：2007-10-12

申请人： Ta-Chuan Yeh ,  Ni-Min Chung ,  Kao-Su Huang ,  Yung-Chang Lin ,  Ruey-Chyr Lee ,  Chien-Kuo Wang

发明人： Ta-Chuan Yeh ,  Ni-Min Chung ,  Kao-Su Huang ,  Yung-Chang Lin ,  Ruey-Chyr Lee ,  Chien-Kuo Wang

IPC分类号： H01L21/306

CPC分类号： H01L27/1087 ,  H01L21/76205

摘要： A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens the deep trench opening. Then, a conductive layer is filled in the deep trench opening.

摘要翻译： 提供了具有氧化物层，第一氮化硅 - 硅，STI和第二氮化硅 - 硅的衬底。 蚀刻第二氮化硅 - 硅层上的图案多晶硅层以形成深沟槽开口。 蚀刻图案多晶硅层也加深了深沟槽开口。 然后，在深沟槽开口中填充导电层。

公开(公告)号：US20070155089A1

公开(公告)日：2007-07-05

申请号：US11306560

申请日：2006-01-03

申请人： Ta-Chuan Yeh ,  Ni-Min Chung ,  Kao-Su Huang ,  Yung-Chang Lin ,  Ruey-Chyr Lee ,  Chien-Kuo Wang

发明人： Ta-Chuan Yeh ,  Ni-Min Chung ,  Kao-Su Huang ,  Yung-Chang Lin ,  Ruey-Chyr Lee ,  Chien-Kuo Wang

IPC分类号： H01L21/8242

CPC分类号： H01L27/1087 ,  H01L21/76205

摘要： A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens the deep trench opening. Then, a conductive layer is filled in the deep trench opening.

摘要翻译： 提供了具有氧化物层，第一氮化硅 - 硅，STI和第二氮化硅 - 硅的衬底。 蚀刻第二氮化硅 - 硅层上的图案多晶硅层以形成深沟槽开口。 蚀刻图案多晶硅层也加深了深沟槽开口。 然后，在深沟槽开口中填充导电层。

公开(公告)号：US06548318B2

公开(公告)日：2003-04-15

申请号：US09999634

申请日：2001-10-24

申请人： Wei-Shiau Chen ,  Kao-Su Huang

发明人： Wei-Shiau Chen ,  Kao-Su Huang

IPC分类号： H01L21311

CPC分类号： G02F1/133345 ,  G02F1/133553 ,  G02F1/13394 ,  G02F1/13454 ,  Y10S438/954 ,  Y10S438/958

摘要： A fabrication method for a multi-layered thin film protective layer which is applicable on a substrate comprising a peripheral circuit area and a pixel cell area is described. Metal layers and pixel cells are formed on the peripheral circuit area and the pixel cell area, respectively, wherein an insulation material is formed in the interspace between the metal layers and between the pixel cells to provide a sufficient separation. Thereafter, a first oxide layer, a silicon nitride layer and a second oxide layer are sequentially formed on the pixel cells and the metal layers. The second oxide layer is then patterned to define a pre-determined position of a pad spacer in the pixel cell area and the peripheral circuit area. The silicon nitride layer and the first oxide layer are further defined to form a first protective layer in the peripheral circuit area and to from a pad spacer in the pixel cell area exposing the pixel cells. A second protective layer is then formed on the exposed pixel cells.

公开(公告)号：US06429921B1

公开(公告)日：2002-08-06

申请号：US09480062

申请日：2000-01-10

申请人： Wei-Shiau Chen ,  Kao-Su Huang

发明人： Wei-Shiau Chen ,  Kao-Su Huang

IPC分类号： G02F11339

CPC分类号： G02F1/133345 ,  G02F1/133553 ,  G02F1/13394 ,  G02F1/13454 ,  Y10S438/954 ,  Y10S438/958

摘要： A multi-layered thin film protective layer structure, which is applicable for a liquid crystal display with a substrate comprising a peripheral circuit area and a pixel cell area, is described. The pixel cell area and the peripheral circuit area comprise a plurality of pixel cells and metal layers, respectively. The multi-layered thin film protective layer also includes a protective layer in the peripheral circuit area to cover the metal layers and a plurality of pad spacers in the pixel cell area and the peripheral circuit area. The pad spacers are higher than the first protective layer. The structure also comprises a second protective layer in the pixel cell area to cover the pixel cells, wherein the second protective layer has a higher reflectivity to allow the transmission of light to reach the pixel cells and a reflection of light.

摘要翻译： 描述了可应用于具有包括外围电路区域和像素单元区域的基板的液晶显示器的多层薄膜保护层结构。 像素单元区域和外围电路区域分别包括多个像素单元和金属层。 多层薄膜保护层还包括在外围电路区域中覆盖金属层的保护层和像素单元区域和外围电路区域中的多个衬垫间隔物。 衬垫间隔物高于第一保护层。 该结构还包括像素单元区域中的第二保护层以覆盖像素单元，其中第二保护层具有更高的反射率以允许光的透射以到达像素单元和反射光。

公开(公告)号：US20070049036A1

公开(公告)日：2007-03-01

申请号：US11161960

申请日：2005-08-24

申请人： Kao-Su Huang

发明人： Kao-Su Huang

IPC分类号： H01L21/311

CPC分类号： H01L21/31138 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/32137 ,  H01L21/32139

摘要： The present invention provides an etching process for decreasing mask defect. The process comprises providing a substrate, and sequentually forming a thin film layer, a mask, and a photoresist on the surface of the substrate. Then the photoresist is trimmed by a bromide compound, and a first etching process is performed to transfer patterns from the photoresist to the mask. A strip process is performed to strip photoresist by mixing gases that include fluorine. Finally, a second etching process is performed to transfer the pattern from patterned mask to the thin film layer.

摘要翻译： 本发明提供了一种减少掩模缺陷的蚀刻工艺。 该方法包括提供衬底，并且在衬底的表面上随后形成薄膜层，掩模和光致抗蚀剂。 然后通过溴化合物修饰光致抗蚀剂，并且执行第一蚀刻工艺以将图案从光致抗蚀剂转印到掩模。 进行剥离处理以通过混合包括氟的气体来剥离光致抗蚀剂。 最后，执行第二蚀刻工艺以将图案从图案化掩模转移到薄膜层。

公开(公告)号：US20060144815A1

公开(公告)日：2006-07-06

申请号：US11031824

申请日：2005-01-06

申请人： Kao-Su Huang

发明人： Kao-Su Huang

IPC分类号： C23F1/00 ,  H01L21/302 ,  B44C1/22 ,  C03C25/68

CPC分类号： H01L21/0273 ,  G03F7/405 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/32139

摘要： A treatment method for a surface of a photoresist layer is provided. After forming a patterned photoresist layer over a wafer, a surface treatment step is performed to the photoresist layer by using at least one reaction gas comprising hydrogen bromide or hydrogen iodide to form a hardened layer over the surface of the photoresist layer. Wherein, the surface treatment step and the etching step are in-situ performed.

摘要翻译： 提供了光致抗蚀剂层表面的处理方法。 在晶片上形成图案化的光致抗蚀剂层之后，通过使用包含溴化氢或碘化氢的至少一种反应气体在光致抗蚀剂层的表面上形成硬化层，对光致抗蚀剂层进行表面处理步骤。 其中，表面处理步骤和蚀刻步骤被原位执行。

公开(公告)号：US07309641B2

公开(公告)日：2007-12-18

申请号：US10997507

申请日：2004-11-24

申请人： Kao-Su Huang

发明人： Kao-Su Huang

IPC分类号： H01L21/76 ,  H01L21/3065

CPC分类号： H01L21/76232

摘要： A method for rounding the bottom corners of a trench is described. In the method, an etching process is performed using a fluorocarbon compound with at least two carbon atoms, He and O2 as an etching gas to round the bottom corners of the trench.

摘要翻译： 描述了用于使沟槽的底角倒圆的方法。 在该方法中，使用具有至少两个碳原子的碳氟化合物He和O 2 2作为蚀刻气体进行蚀刻处理，以使沟槽的底角圆弧。

公开(公告)号：US07214626B2

公开(公告)日：2007-05-08

申请号：US11161960

申请日：2005-08-24

申请人： Kao-Su Huang

发明人： Kao-Su Huang

IPC分类号： H01L21/461

CPC分类号： H01L21/31138 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/32137 ,  H01L21/32139

摘要： The present invention provides an etching process for decreasing mask defect. The process comprises providing a substrate, and sequentially forming a thin film layer, a mask, and a photoresist on the surface of the substrate. Then the photoresist is trimmed by a bromide compound, and a first etching process is performed to transfer patterns from the photoresist to the mask. A strip process is performed to strip photoresist by mixing gases that include fluorine. Finally, a second etching process is performed to transfer the pattern from patterned mask to the thin film layer.

摘要翻译： 本发明提供了一种减少掩模缺陷的蚀刻工艺。 该方法包括提供衬底，并且在衬底的表面上依次形成薄膜层，掩模和光致抗蚀剂。 然后通过溴化物修饰光致抗蚀剂，并执行第一蚀刻工艺以将图案从光致抗蚀剂转移到掩模。 进行剥离处理以通过混合包括氟的气体来剥离光致抗蚀剂。 最后，执行第二蚀刻工艺以将图案从图案化掩模转移到薄膜层。

公开(公告)号：US20050054129A1

公开(公告)日：2005-03-10

申请号：US10794528

申请日：2004-03-05

申请人： Wei-Shiau Chen ,  Kao-Su Huang

发明人： Wei-Shiau Chen ,  Kao-Su Huang

IPC分类号： G02F1/1333 ,  G02F1/1335 ,  G02F1/1339 ,  G02F1/1362 ,  H01L21/00 ,  G02F1/1343

CPC分类号： G02F1/13394 ,  G02F1/133345 ,  G02F1/133553 ,  G02F1/13454

摘要： A fabrication method for a multi-layered thin film protective layer, which is applicable on a substrate having a peripheral circuit area and a pixel cell area, is described. Metal layers and pixel cells are formed on the peripheral circuit area and the pixel cell area, respectively. A first oxide layer, a silicon nitride layer and a second oxide layer are sequentially formed on the pixel cells and the metal layers. The second oxide layer is then patterned to define a pre-determined position of a pad spacer in the pixel cell area and the peripheral circuit area. The silicon nitride layer and the first oxide layer are further defined to form a first protective layer in the peripheral circuit area and to from a pad spacer in the pixel cell area exposing the pixel cells. A second protective layer is then formed on the exposed pixel cells.

摘要翻译： 对可应用于具有外围电路区域和像素单元面积的基板的多层薄膜保护层的制造方法进行说明。 金属层和像素单元分别形成在外围电路区域和像素单元区域上。 第一氧化物层，氮化硅层和第二氧化物层依次形成在像素单元和金属层上。 然后将第二氧化物层图案化以限定像素单元区域和外围电路区域中的衬垫间隔物的预定位置。 进一步限定氮化硅层和第一氧化物层，以在外围电路区域中形成第一保护层，并且从暴露像素单元的像素单元区域中的衬垫间隔件形成第一保护层。 然后在曝光的像素单元上形成第二保护层。