公开(公告)号：US06678313B1

公开(公告)日：2004-01-13

申请号：US09472003

申请日：1999-12-27

申请人： Ichiro Imaizumi ,  Kouya Hoshina ,  Kenjiro Yasunari

发明人： Ichiro Imaizumi ,  Kouya Hoshina ,  Kenjiro Yasunari

IPC分类号： H04B169

CPC分类号： H04B1/709

摘要： There is disclosed a correlation circuit for spread spectrum communication which reduces the number of constituting elements to attain low power consumption and which can obtain correlation in a short time, to solve a problem that a conventional sliding correlator requires much time to obtain the correlation and that a matched filter increases the power consumption. In the spread spectrum communication correlation circuit, an A/D converter converts a received spread spectrum signal to a digital signal. Under control of a controller, one symbol of signals are written to an S/H circuit with a 16 MHz. clock, shifted for each sample and read to a high-speed correlator from the S/H circuit with a high-speed clock of 1.6 GHz a plurality of times, and the high-speed correlator performs a product sum operation with a spread code with the 1.6 GHz clock. At the same time the reading is performed, the next symbol of signals are written to the S/H circuit.

摘要翻译： 公开了一种用于扩频通信的相关电路，其减少了达到低功耗的组成元件的数量，并且可以在短时间内获得相关性，以解决常规滑动相关器需要大量时间来获得相关性的问题， 匹配的滤波器增加功耗。 在扩频通信相关电路中，A / D转换器将接收的扩频信号转换为数字信号。 在控制器的控制下，信号的一个符号被写入到具有16MHz的S / H电路。 时钟，对于每个采样移位，并从具有1.6GHz的高速时钟的S / H电路读取高速相关器多次，并且高速相关器用扩展码执行乘积和运算， 1.6 GHz时钟。 同时执行读取，信号的下一个符号被写入S / H电路。

公开(公告)号：US4317274A

公开(公告)日：1982-03-02

申请号：US98259

申请日：1979-11-28

申请人： Kenjiro Yasunari

发明人： Kenjiro Yasunari

IPC分类号： H01L29/78 ,  H01L21/033 ,  H01L21/28 ,  H01L21/60 ,  H01L21/762 ,  H01L21/768 ,  H01L23/057 ,  H01L23/532 ,  H01L21/26

CPC分类号： H01L21/76897 ,  H01L21/033 ,  H01L21/28 ,  H01L21/76216 ,  H01L23/057 ,  H01L23/53271 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16152 ,  H01L2924/19041

摘要： This invention relates to a method of producing a semiconductor device, and more particularly to a method of leading out an electrode for a semiconductor substrate. A conductor layer of polycrystalline silicon or the like is formed on the surface of the semiconductor substrate on which the substrate electrode is to be formed, a desired semiconductor region having a conductivity type opposite to that of the substrate is selectively formed under this state, and the semiconductor substrate electrode is formed on the substrate surface after removing the conductor layer.

摘要翻译： 本发明涉及一种制造半导体器件的方法，更具体地说，涉及一种引出用于半导体衬底的电极的方法。 在要形成衬底电极的半导体衬底的表面上形成多晶硅等的导体层，在该状态下选择性地形成具有与衬底电极相反的导电类型的期望的半导体区域，以及 在去除导体层之后，在衬底表面上形成半导体衬底电极。

公开(公告)号：US06647056B1

公开(公告)日：2003-11-11

申请号：US09512063

申请日：2000-02-24

申请人： Ichiro Imaizumi ,  Kouya Hoshina ,  Kenjiro Yasunari

发明人： Ichiro Imaizumi ,  Kouya Hoshina ,  Kenjiro Yasunari

IPC分类号： H04B169

CPC分类号： H04B1/7093 ,  H04B1/7095 ,  H04B2201/70707

摘要： In a conventional correlation circuit for spread spectrum communication, when a sliding correlator is used, much time is required. When a matched filter is used, a problem is that a circuit scale and power consumption are increased. In the present invention, however, there is provided a correlation circuit for spread spectrum communication which minimizes the number of constituting elements, and can reduce the power consumption. In the correlation circuit for spread spectrum communication of the present invention, a spread spectrum received signal is A/D converted and accumulated in a data memory unit by a symbol unit, data rate is converted, and a high-rate MF performs a product sum operation processing at a high rate so that a correlation output is obtained.

摘要翻译： 在用于扩展频谱通信的常规相关电路中，当使用滑动相关器时，需要很多时间。 当使用匹配滤波器时，问题是电路规模和功耗增加。 然而，在本发明中，提供了一种用于扩频通信的相关电路，其使得构成元件的数量最小化，并且可以降低功耗。 在本发明的扩频通信用相关电路中，扩频接收信号通过符号单位对数据存储单元进行A / D转换和累积，数据速率被转换，高速率MF执行乘积和 以高速率进行运算处理，从而获得相关输出。

公开(公告)号：US4967387A

公开(公告)日：1990-10-30

申请号：US199605

申请日：1988-05-27

申请人： Nobuo Shibasaki ,  Toshio Tanaka ,  Yoshiharu Nagayama ,  Kenjiro Yasunari

发明人： Nobuo Shibasaki ,  Toshio Tanaka ,  Yoshiharu Nagayama ,  Kenjiro Yasunari

IPC分类号： G06F11/267 ,  G06F15/78 ,  G11C29/12 ,  G11C29/48

CPC分类号： G06F11/2236 ,  G06F15/7842 ,  G11C29/12 ,  G11C29/48

摘要： A microprocessor having a plurality of memories comprises an address selection means which supplies selectively, to the memories, the address signal generated by the address generation means provided in the microprocessor and the test address signal supplied from the external circuit. Thereby, the address of memories can be accessed directly from the external circuit for the test of memories. Moreover, the microprocessor is provided with the test bus through which the signal transmitted between the function blocks in the microprocessor is input or output from or to the external circuit. Accordingly, the function block can be tested easily.

摘要翻译： 具有多个存储器的微处理器包括：地址选择装置，用于向存储器选择性地提供由微处理器中提供的地址产生装置产生的地址信号和从外部电路提供的测试地址信号。 因此，可以从外部电路直接访问存储器的地址以进行存储器的测试。 此外，微处理器设置有测试总线，通过该测试总线在微处理器中的功能块之间传输的信号通过其输入或输出到外部电路。 因此，可以容易地测试功能块。

公开(公告)号：US3946425A

公开(公告)日：1976-03-23

申请号：US469745

申请日：1974-05-14

申请人： Senji Shoji ,  Kenjiro Yasunari ,  Yasunobu Kosa

发明人： Senji Shoji ,  Kenjiro Yasunari ,  Yasunobu Kosa

IPC分类号： H01L21/00 ,  H01L21/74 ,  H01L21/761 ,  H01L27/06 ,  H01L27/04 ,  H01L29/167

CPC分类号： H01L27/0664 ,  H01L21/00 ,  H01L21/74 ,  H01L21/761 ,  H01L27/0652

摘要： In a semiconductor integrated circuit device in which a plurality of regions each having a semiconductor element such as a PN junction diode and a transistor are isolated electrically from one another by PN junctions formed between the respective regions and a semiconductor isolation region, gold is introduced into the regions having the semiconductor elements and the isolation region while at least one diffused region heavily doped, for example, with phosphorus is formed in the isolation region adjacent to the region having the PN junction diode or the transistor thereby to prevent the breakdown voltage of the backwardly biased PN junction in the diode or the transistor from decreasing. Further by surrounding all the transistors, at least in one of which gold is diffused, formed in one integrated circuit with heavily doped N.sup.+-type regions an integrated circuit with transistors having a small variation in current amplification factor is obtained.

摘要翻译： 在半导体集成电路器件中，其中每个具有诸如PN结二极管和晶体管的半导体元件的多个区域通过在各个区域和半导体隔离区域之间形成的PN结彼此电隔离，将金引入 在与具有PN结二极管或晶体管的区域相邻的隔离区域中形成具有半导体元件和隔离区域的区域，而在具有例如磷的重掺杂的至少一个扩散区域上形成具有半导体元件和隔离区域的区域，从而防止了 二极管或晶体管中向后偏置的PN结减小。 此外，通过围绕所有晶体管，至少其中一个金扩散，形成在具有重掺杂N +型区域的一个集成电路中，获得具有电流放大因子变化小的晶体管的集成电路。