公开(公告)号：US20120299187A1

公开(公告)日：2012-11-29

申请号：US13166562

申请日：2011-06-22

申请人： Kent Charles OERTLE ,  Wei Xia ,  Edward Law

发明人： Kent Charles OERTLE ,  Wei Xia ,  Edward Law

IPC分类号： H01L23/485 ,  H01L21/50

CPC分类号： H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/036 ,  H01L2224/03831 ,  H01L2224/03903 ,  H01L2224/0391 ,  H01L2224/03916 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05118 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05567 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/00012 ,  H01L2924/206 ,  H01L2224/05552

摘要： Embodiments of an aluminum pad thinning in bond pad for fine pitch ultra-thick aluminum pad structures are provided herein. Embodiments include a conductive structure formed on a substrate. A first passivation layer is formed over the substrate and the conductive structure, the first passivation layer having an opening formed over the conductive structure. An ultra-thick conductive structure having a thinned trench region formed over the opening of the first passivation layer. The ultra-thick conductive structure is in contact with the conductive structure. A second passivation layer formed over the first passivation region and the ultra-thick conductive structure. The second passivation layer having an opening formed over the thinned trench region of the ultra-thick conductive structure.

摘要翻译： 本文提供了用于细间距超厚铝垫结构的接合垫中的铝垫减薄的实施例。 实施例包括形成在基板上的导电结构。 第一钝化层形成在衬底和导电结构之上，第一钝化层具有形成在导电结构上的开口。 一种超厚导电结构，其具有形成在第一钝化层的开口上的减薄沟槽区。 超厚导电结构与导电结构接触。 形成在第一钝化区域和超厚导电结构上的第二钝化层。 第二钝化层具有形成在超厚导电结构的减薄的沟槽区域上的开口。

公开(公告)号：US09386332B2

公开(公告)日：2016-07-05

申请号：US13310844

申请日：2011-12-05

申请人： Jack Jianxiu Hao ,  Zhiying Jin ,  Martin A. Busse ,  Wei Xia ,  John F. Gallagher

发明人： Jack Jianxiu Hao ,  Zhiying Jin ,  Martin A. Busse ,  Wei Xia ,  John F. Gallagher

IPC分类号： H04N7/173 ,  H04N21/239 ,  H04N21/2665 ,  H04N21/278 ,  H04N21/472 ,  G06F17/30 ,  H04N5/445

CPC分类号： H04N21/2393 ,  G06F17/30784 ,  H04N21/2665 ,  H04N21/278 ,  H04N21/47202

摘要： One or more network devices receive, from a third-party system, catalog metadata for physical media assets available to order and combine the catalog metadata with catalog entries for digital content to form a unified catalog file. The one or more devices receive, from a user device, a request to view a directory of available video content and send, to the user device, the unified catalog file for presentation to a user. The one or more devices receive, from the user device, a selection of an item in the unified catalog file. The one or more devices provide, to the user device, video content corresponding to the selection when the selection corresponds to one of the catalog entries for digital content and provide, to the third-party system and via a billing gateway, user payment information when the selection corresponds to the catalog metadata for one of the physical media assets.

摘要翻译： 一个或多个网络设备从第三方系统接收可用于订购的物理媒体资产的目录元数据，并将目录元数据与数字内容的目录条目组合以形成统一的目录文件。 一个或多个设备从用户设备接收查看可用视频内容的目录的请求，并向用户设备发送用于呈现给用户的统一目录文件。 一个或多个设备从用户设备接收统一目录文件中的项目的选择。 当选择对应于数字内容的目录条目之一时，一个或多个设备向用户设备提供与选择相对应的视频内容，并且通过计费网关向第三方系统和经由计费网关提供用户支付信息， 选择对应于物理媒体资产之一的目录元数据。

公开(公告)号：US09343471B2

公开(公告)日：2016-05-17

申请号：US13425575

申请日：2012-03-21

申请人： Wei Xia

发明人： Wei Xia

IPC分类号： H01L29/788 ,  H01L21/336 ,  H01L27/115 ,  H01L21/28 ,  H01L29/423

CPC分类号： H01L27/11543 ,  H01L21/28273 ,  H01L29/42324 ,  H01L29/7883

摘要： An embedded flash memory cell and a corresponding method for fabricating the embedded flash memory cell are disclosed. In some embodiments, the flash memory cell comprises a floating gate that has been formed using a metal gate and local interconnect metal. For some embodiments, the embedded flash memory can be fabricated with little-to-no additional processes than what one would normally employ in fabricating a metal-oxide semiconductor field-effect transistor (MOSFET).

摘要翻译： 公开了一种用于制造嵌入式闪存单元的嵌入式闪存单元和相应的方法。 在一些实施例中，快闪存储器单元包括已经使用金属栅极和局部互连金属形成的浮动栅极。 对于一些实施例，嵌入式闪存可以与制造金属氧化物半导体场效应晶体管（MOSFET）时通常采用的附加工艺相比制造的少。

公开(公告)号：US09185226B2

公开(公告)日：2015-11-10

申请号：US12540859

申请日：2009-08-13

申请人： Zhiying Jin ,  Wei Xia ,  Gerald Honma ,  Jo Ann Kagawa ,  Jianxiu Hao

发明人： Zhiying Jin ,  Wei Xia ,  Gerald Honma ,  Jo Ann Kagawa ,  Jianxiu Hao

IPC分类号： G06F7/00 ,  H04M3/533 ,  H04M3/36

CPC分类号： H04M3/533 ,  H04M3/36 ,  H04M2201/38 ,  H04M2203/253

摘要： A device receives, from a voicemail server, log information associated with voicemail transactions performed by the voicemail server, and determines data elements, of the log information, to be aggregated. The device also aggregates the determined data elements of the log information, determines a time period to provide the aggregated log information to a database for storage, and provides the aggregated log information to the database at the determined time period.

摘要翻译： 设备从语音邮件服务器接收与由语音邮件服务器执行的语音邮件事务相关联的信息，并且确定要聚合的日志信息的数据元素。 设备还聚合确定的日志信息的数据元素，确定将聚合日志信息提供给数据库进行存储的时间段，并在确定的时间段内将聚合的日志信息提供给数据库。

公开(公告)号：US09041153B2

公开(公告)日：2015-05-26

申请号：US13248823

申请日：2011-09-29

申请人： Xiangdong Chen ,  Henry Kuo-Shun Chen ,  Wei Xia ,  Bruce Chih-Chieh Shen

发明人： Xiangdong Chen ,  Henry Kuo-Shun Chen ,  Wei Xia ,  Bruce Chih-Chieh Shen

IPC分类号： H01L29/92 ,  H01L23/522 ,  H01L49/02

CPC分类号： H01L23/5223 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one exemplary embodiment, a method for fabricating a metal-insulator-metal (MIM) capacitor in a semiconductor die comprises forming a bottom capacitor electrode over a device layer situated below a first metallization layer of the semiconductor die, and forming a top capacitor electrode over an interlayer barrier dielectric formed over the bottom capacitor electrode. The top capacitor electrode is formed from a local interconnect metal for connecting devices formed in the device layer. In one embodiment, the bottom capacitor electrode is formed from a gate metal. The method may further comprise forming a metal plate in the first metallization layer and over the top capacitor electrode, and connecting the metal plate to the bottom capacitor electrode to provide increased capacitance density.

摘要翻译： 根据一个示例性实施例，在半导体管芯中制造金属 - 绝缘体 - 金属（MIM）电容器的方法包括在位于半导体管芯的第一金属化层下方的器件层上形成底部电容器电极，并形成顶部电容器 形成在底部电容器电极上的层间势垒电介质上的电极。 顶部电容器电极由局部互连金属形成，用于连接器件层中形成的器件。 在一个实施例中，底部电容器电极由栅极金属形成。 该方法还可以包括在第一金属化层中和顶部电容器电极上形成金属板，并将金属板连接到底部电容器电极以提供增加的电容密度。

公开(公告)号：US08847224B2

公开(公告)日：2014-09-30

申请号：US13246710

申请日：2011-09-27

申请人： Wei Xia ,  Xiangdong Chen

发明人： Wei Xia ,  Xiangdong Chen

IPC分类号： H01L29/10 ,  H01L29/732 ,  H01L29/66

CPC分类号： H01L29/66272 ,  H01L29/1004 ,  H01L29/732

摘要： According to one exemplary embodiment, a fin-based bipolar junction transistor (BJT) includes a wide collector situated in a semiconductor substrate. A fin base is disposed over the wide collector. Further, a fin emitter and an epi emitter are disposed over the fin base. A narrow base-emitter junction of the fin-based BJT is formed by the fin base and the fin emitter and the epi emitter provides increased current conduction and reduced resistance for the fin-based BJT. The epi emitter can be epitaxially formed on the fin emitter and can comprise polysilicon. Furthermore, the fin base and the fin emitter can each comprise single crystal silicon.

摘要翻译： 根据一个示例性实施例，鳍式双极结型晶体管（BJT）包括位于半导体衬底中的宽集电极。 翅片底座设置在宽收集器上。 此外，翅片发射极和外延发射极设置在翅片基底之上。 翅片基BJT的窄基极 - 发射极结由翅片基极和鳍发射极形成，并且epi发射极为鳍状BJT提供增加的电流传导和降低的电阻。 外延发射体可以外延形成在鳍发射极上并且可以包括多晶硅。 此外，散热片基板和散热片发射极可以各自包括单晶硅。

公开(公告)号：US08570811B2

公开(公告)日：2013-10-29

申请号：US13219414

申请日：2011-08-26

申请人： Wei Xia ,  Xiangdong Chen

发明人： Wei Xia ,  Xiangdong Chen

IPC分类号： G11C11/34

CPC分类号： H01L29/7855 ,  G11C11/34 ,  G11C17/12 ,  H01L23/5252 ,  H01L27/11206 ,  H01L29/785 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one embodiment, a one-time programmable (OTP) device comprises a memory FinFET in parallel with a sensing FinFET. The memory FinFET and the sensing FinFET share a common source region, a common drain region, and a common channel region. The memory FinFET is programmed by having a ruptured gate dielectric, resulting in the sensing FinFET having an altered threshold voltage and an altered drain current. A method for utilizing such an OTP device comprises applying a programming voltage for rupturing the gate dielectric of the memory FinFET thereby achieving a programmed state of the memory FinFET, and detecting by the sensing FinFET the altered threshold voltage and the altered drain current due to the programmed state of the memory FinFET.

摘要翻译： 根据一个实施例，一次性可编程（OTP）器件包括与感测FinFET并联的存储器FinFET。 存储器FinFET和感测FinFET共享共源极区，公共漏极区和公共沟道区。 存储器FinFET通过具有破裂的栅极电介质来编程，导致感测FinFET具有改变的阈值电压和改变的漏极电流。 一种利用这种OTP器件的方法包括施加用于破坏存储器FinFET的栅极电介质的编程电压，从而实现存储器FinFET的编程状态，并且通过感测FinFET检测改变的阈值电压和改变的漏极电流，由于 存储器FinFET的编程状态。

公开(公告)号：US08502320B2

公开(公告)日：2013-08-06

申请号：US13250563

申请日：2011-09-30

申请人： Wei Xia ,  Xiangdong Chen

发明人： Wei Xia ,  Xiangdong Chen

IPC分类号： H01L21/70

CPC分类号： H01L21/823814 ,  H01L21/823807 ,  H01L24/13 ,  H01L24/14 ,  H01L27/0629 ,  H01L2224/13147 ,  H01L2224/14104 ,  H01L2924/12035 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/00

摘要： A vertically stacked, planar junction Zener diode is concurrently formed with epitaxially grown FET raised S/D terminals. The structure and process of the Zener diode are compatible with Gate-Last high-k FET structures and processes. Lateral separation of diode and transistor structures is provided by modified STI masking. No additional photolithography steps are required. In some embodiments, the non-junction face of the uppermost diode terminal is silicided with nickel to additionally perform as a copper diffusion barrier.

公开(公告)号：US08497564B2

公开(公告)日：2013-07-30

申请号：US12583016

申请日：2009-08-13

申请人： Xiangdong Chen ,  Wei Xia

发明人： Xiangdong Chen ,  Wei Xia

IPC分类号： H01L29/92 ,  H01L21/02

CPC分类号： H01L28/40 ,  H01L28/90 ,  H01L29/94 ,  H01L29/945

摘要： According to an exemplary embodiment, a method for fabricating a decoupling composite capacitor in a wafer that includes a dielectric region overlying a substrate includes forming a through-wafer via in the dielectric region and the substrate. The through-wafer via includes a through-wafer via insulator covering a sidewall and a bottom of a through-wafer via opening and a through-wafer via conductor covering the through-wafer via insulator. The method further includes thinning the substrate, forming a substrate backside insulator, forming an opening in the substrate backside insulator to expose the through-wafer via conductor, and forming a backside conductor on the through-wafer via conductor, such that the substrate backside conductor extends over the substrate backside insulator, thereby forming the decoupling composite capacitor. The substrate forms a first decoupling composite capacitor electrode and the through-wafer via conductor and substrate backside conductor form a second decoupling composite capacitor electrode.

摘要翻译： 根据示例性实施例，在晶片中制造去耦复合电容器的方法包括覆盖在衬底上的电介质区域包括在电介质区域和衬底中形成贯通晶片通孔。 贯通晶片通孔包括覆盖贯通晶片通孔开口的侧壁和底部的贯通晶片通孔绝缘体，以及通过绝缘体覆盖贯通晶片的贯通晶片通孔导体。 该方法还包括使衬底变薄，形成衬底背面绝缘体，在衬底背面绝缘体中形成开口以通过导体暴露通过晶片，以及通过导体在透晶片上形成背面导体，使得衬底背侧导体 延伸到衬底背面绝缘体上，从而形成去耦复合电容器。 衬底形成第一去耦合复合电容器电极，并且通过晶片通孔导体和衬底背侧导体形成第二去耦复合电容器电极。

公开(公告)号：US20130157843A1

公开(公告)日：2013-06-20

申请号：US13704173

申请日：2011-06-16

申请人： Martin Muhler ,  Wolfgang Schuhmann ,  Wei Xia ,  Michael Bron ,  Justus Masa

发明人： Martin Muhler ,  Wolfgang Schuhmann ,  Wei Xia ,  Michael Bron ,  Justus Masa

IPC分类号： H01M4/90

CPC分类号： H01M4/9008 ,  B01J31/06 ,  B01J2231/62 ,  B82Y30/00 ,  C01B32/00 ,  C01P2002/72 ,  C01P2002/85 ,  C01P2004/64 ,  C01P2006/12 ,  C09C1/56 ,  H01M4/9083 ,  H01M8/083 ,  H01M2004/8689

摘要： This invention relates to a simple method for the synthesis of a highly active metal-free catalyst for oxygen reduction reactions in alkaline media, a catalyst obtainable by said method, an electrode comprising said catalyst and the use of the catalyst and electrode for oxygen reduction reactions in alkaline media.

摘要翻译： 本发明涉及一种用于合成碱性介质中用于氧还原反应的高活性金属催化剂的简单方法，可通过所述方法获得的催化剂，包含所述催化剂的电极以及使用催化剂和电极进行氧还原反应 在碱性介质中。