公开(公告)号：US08581261B2

公开(公告)日：2013-11-12

申请号：US13276830

申请日：2011-10-19

申请人： Masahito Kanamura ,  Kozo Makiyama

发明人： Masahito Kanamura ,  Kozo Makiyama

IPC分类号： H01L29/778

CPC分类号： H01L21/263 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/3228 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7787

摘要： Two layers of protection films are formed such that a sheet resistance at a portion directly below the protection film is higher than that at a portion directly below the protection film. The protection films are formed, for example, of SiN film, as insulating films. The protection film is formed to be higher, for instance, in hydrogen concentration than the protection film so that the protection film is higher in refractive index the protection film. The protection film is formed to cover a gate electrode and extend to the vicinity of the gate electrode on an electron supplying layer. The protection film is formed on the entire surface to cover the protection film. According to this configuration, the gate leakage is significantly reduced by a relatively simple configuration to realize a highly-reliable compound semiconductor device achieving high voltage operation, high withstand voltage, and high output.

公开(公告)号：US20130083568A1

公开(公告)日：2013-04-04

申请号：US13555420

申请日：2012-07-23

申请人： Kozo MAKIYAMA ,  Naoya Okamoto ,  Toshihiro Ohki ,  Yuichi Minoura ,  Shirou Ozaki ,  Toyoo Miyajima

发明人： Kozo MAKIYAMA ,  Naoya Okamoto ,  Toshihiro Ohki ,  Yuichi Minoura ,  Shirou Ozaki ,  Toyoo Miyajima

IPC分类号： H01L29/78 ,  H02M5/458 ,  H01L21/336

CPC分类号： H01L29/408 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7786 ,  H01L29/7787 ,  H02M7/537

摘要： An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.

摘要翻译： HEMT在SiC衬底上包括化合物半导体层，具有开口并覆盖化合物半导体层的氮化硅（SiN）保护膜和形成在化合物半导体层上的栅电极以堵塞开口。 在保护膜中，从开口侧面突出的突出部形成在下层部6a。

公开(公告)号：US20120146728A1

公开(公告)日：2012-06-14

申请号：US13278392

申请日：2011-10-21

申请人： Kozo MAKIYAMA ,  Toshihide Kikkawa

发明人： Kozo MAKIYAMA ,  Toshihide Kikkawa

IPC分类号： H03F3/16 ,  H01L21/336 ,  H01L29/778

CPC分类号： H01L21/28264 ,  H01L29/2003 ,  H01L29/4236 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66462 ,  H01L29/7787

摘要： A compound semiconductor device is provided with a compound semiconductor layer and a gate electrode formed on the compound semiconductor layer via a gate insulating film, in which the gate insulating film is one in which SixNy is contained as an insulating material, SixNy is 0.638≦x/y≦0.863, and a hydrogen-terminated group concentration is set to a value within a range of not less than 2×1022/cm3 nor more than 5×1022/cm3.

摘要翻译： 化合物半导体器件具有通过栅极绝缘膜形成在化合物半导体层上的化合物半导体层和栅电极，其中栅极绝缘膜是其中包含SixNy作为绝缘材料的绝缘膜，SixNy为0.638＆lt; x / y＆nlE; 0.863，氢端基组浓度设定为2×1022 / cm 3以上5×1022 / cm3以下的值。

公开(公告)号：US08183558B2

公开(公告)日：2012-05-22

申请号：US13023146

申请日：2011-02-08

申请人： Kozo Makiyama ,  Tsuyoshi Takahashi

发明人： Kozo Makiyama ,  Tsuyoshi Takahashi

IPC分类号： H01L29/06

CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/66431

摘要： A compound semiconductor device includes a compound semiconductor substrate; epitaxially grown layers formed over the compound semiconductor substrate and including a channel layer and a resistance lowering cap layer above the channel layer; source and drain electrodes in ohmic contact with the channel layer; recess formed by removing the cap layer between the source and drain electrodes; a first insulating film formed on an upper surface of the cap layer and having side edges at positions retracted from edges, or at same positions as the edges of the cap layer in a direction of departing from the recess; a second insulating film having gate electrode opening and formed covering a semiconductor surface in the recess and the first insulating film; and a gate electrode formed on the recess via the gate electrode opening.

摘要翻译： 化合物半导体器件包括化合物半导体衬底; 在化合物半导体衬底上形成的外延生长层，并且在沟道层上方包括沟道层和电阻降低覆盖层; 源极和漏极与沟道层欧姆接触; 通过去除源极和漏极之间的覆盖层形成的凹陷; 第一绝缘膜，其形成在所述盖层的上表面上，并且在从所述盖层的边缘离开所述凹部的边缘处或与所述盖层的边缘相同的位置处具有侧边缘; 第二绝缘膜，具有栅极电极开口并形成为覆盖所述凹部中的半导体表面和所述第一绝缘膜; 以及通过栅电极开口形成在凹部上的栅电极。

公开(公告)号：US08163653B2

公开(公告)日：2012-04-24

申请号：US13099510

申请日：2011-05-03

申请人： Kozo Makiyama

发明人： Kozo Makiyama

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/3185 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

摘要： A semiconductor device includes a substrate, a compound semiconductor layer formed over the substrate, and a protective insulating film composed of silicon nitride, which is formed over a surface of the compound semiconductor layer and whose film density in an intermediate portion is lower than that in a lower portion.

摘要翻译： 半导体器件包括衬底，形成在衬底上的化合物半导体层和由氮化硅组成的保护绝缘膜，其形成在化合物半导体层的表面上，其中间部分的膜密度低于 下部。

公开(公告)号：US07948062B2

公开(公告)日：2011-05-24

申请号：US12339695

申请日：2008-12-19

申请人： Kozo Makiyama ,  Toshihiro Ohki ,  Masahito Kanamura ,  Toshihide Kikkawa

发明人： Kozo Makiyama ,  Toshihiro Ohki ,  Masahito Kanamura ,  Toshihide Kikkawa

IPC分类号： H01L21/00 ,  H01L23/58

CPC分类号： H01L29/66462 ,  H01L21/28264 ,  H01L21/3185 ,  H01L29/2003 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7787

摘要： A semiconductor device including a compound semiconductor laminated structure having a plurality of compound semiconductor layers formed over a semiconductor substrate, a first insulation film covering at least a part of a surface of the compound semiconductor laminated structure, and a second insulation film formed on the first insulation film, wherein the second insulation film includes more hydrogen than the first insulation film.

摘要翻译： 一种半导体器件，包括具有形成在半导体衬底上的多个化合物半导体层的化合物半导体层叠结构，覆盖化合物半导体层叠结构的表面的至少一部分的第一绝缘膜和形成在第一衬底上的第二绝缘膜 绝缘膜，其中所述第二绝缘膜包括比所述第一绝缘膜更多的氢。

公开(公告)号：US20100187576A1

公开(公告)日：2010-07-29

申请号：US12659970

申请日：2010-03-26

申请人： Kozo Makiyama ,  Ken Sawada

发明人： Kozo Makiyama ,  Ken Sawada

IPC分类号： H01L29/808

CPC分类号： G03F7/40 ,  H01L21/0273 ,  H01L21/28114 ,  H01L21/76802 ,  H01L2924/0002 ,  H01L2924/00

摘要： A surface component film (2) is etched using a resist (3) as a mask, and the surface component film (2) is patterned according to the shape of an aperture (3a). This results in a step portion (4) having the same shape as the aperture (3a), with the sidewall (4a) of the step portion (4) exposed through the aperture (3a). The aperture (3a) is spin-coated with a shrink agent, reacted at a first temperature, and developed to shrink the aperture (3a). To control the shrinkage with high accuracy, in the first round of reaction, the aperture is shrunk by, for example, about half of the desired shrinkage. The aperture (3a) is further spin-coated with a shrink agent, reacted at a second temperature, and developed to shrink the aperture (3a). In this embodiment, the second-round shrink process will result in the desired aperture length. The second temperature is adjusted based on the shrinkage in the first round. With respect to a resist using short-wavelength light (short-wavelength resist) or a resist using electron beam (electron beam resist), a minute aperture can be obtained with stable shrink effect and accurate control of the length thereof.

公开(公告)号：US20090166815A1

公开(公告)日：2009-07-02

申请号：US12339695

申请日：2008-12-19

申请人： Kozo Makiyama ,  Toshihiro Ohki ,  Masahito Kanamura ,  Toshihide Kikkawa

发明人： Kozo Makiyama ,  Toshihiro Ohki ,  Masahito Kanamura ,  Toshihide Kikkawa

IPC分类号： H01L29/06 ,  H01L21/18

CPC分类号： H01L29/66462 ,  H01L21/28264 ,  H01L21/3185 ,  H01L29/2003 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7787

摘要： A semiconductor device including a compound semiconductor laminated structure having a plurality of compound semiconductor layers formed over a semiconductor substrate, a first insulation film covering at least a part of a surface of the compound semiconductor laminated structure, and a second insulation film formed on the first insulation film, wherein the second insulation film includes more hydrogen than the first insulation film.

摘要翻译： 一种半导体器件，包括具有形成在半导体衬底上的多个化合物半导体层的化合物半导体层叠结构，覆盖化合物半导体层叠结构的表面的至少一部分的第一绝缘膜和形成在第一衬底上的第二绝缘膜 绝缘膜，其中所述第二绝缘膜包括比所述第一绝缘膜更多的氢。

公开(公告)号：US20090085063A1

公开(公告)日：2009-04-02

申请号：US12190216

申请日：2008-08-12

申请人： Kozo MAKIYAMA ,  Tsuyoshi TAKAHASHI

发明人： Kozo MAKIYAMA ,  Tsuyoshi TAKAHASHI

IPC分类号： H01L29/267 ,  H01L21/336

CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/66431

摘要： A method for manufacturing a compound semiconductor device forms an EB resist layer on first SiN film, performs EB exposure at high dose for recess forming opening and at low dose for eaves removing opening, develops the high dose EB resist pattern to etch the first SiN film, selectively etches the cap layer to form a recess wider than the opening of the first SiN film leaving eaves of SiN, develops the low dose EB resist pattern to form the eaves removing opening, etches the first SiN film to extinguish the eaves, forms second SiN film on the exposed surface, forms a resist pattern having a gate electrode opening on the second SiN film to etch the second SiN film, forms a metal layer to form a gate electrode by lift-off. The SiN film in eaves shape will not be left.

摘要翻译： 一种化合物半导体器件的制造方法在第一SiN膜上形成EB抗蚀剂层，以高剂量进行用于凹部形成开口的EB曝光，并以低剂量进行檐部剥离开口的EB曝光，形成高剂量EB抗蚀剂图案以蚀刻第一SiN膜 选择性地蚀刻覆盖层以形成比离开SiN的檐的第一SiN膜的开口更宽的凹陷，形成低剂量EB抗蚀剂图案以形成檐口去除开口，蚀刻第一SiN膜以扑灭檐口，形成第二个 在曝光表面上形成SiN膜，形成在第二SiN膜上具有栅电极开口以蚀刻第二SiN膜的抗蚀剂图案，通过剥离形成金属层以形成栅电极。 檐形状的SiN膜不会留下。

公开(公告)号：US20050255696A1

公开(公告)日：2005-11-17

申请号：US11185807

申请日：2005-07-21

申请人： Kozo Makiyama ,  Ken Sawada

发明人： Kozo Makiyama ,  Ken Sawada

IPC分类号： G03F7/40 ,  H01L21/027 ,  H01L21/28 ,  H01L21/768 ,  H01L21/00 ,  H01L21/469 ,  H01L21/4763

CPC分类号： G03F7/40 ,  H01L21/0273 ,  H01L21/28114 ,  H01L21/76802 ,  H01L2924/0002 ,  H01L2924/00

摘要： A surface component film (2) is etched using a resist (3) as a mask, and the surface component film (2) is patterned according to the shape of an aperture (3a). This results in a step portion (4) having the same shape as the aperture (3a), with the sidewall (4a) of the step portion (4) exposed through the aperture (3a). The aperture (3a) is spin-coated with a shrink agent, reacted at a first temperature, and developed to shrink the aperture (3a). To control the shrinkage with high accuracy, in the first round of reaction, the aperture is shrunk by, for example, about half of the desired shrinkage. The aperture (3a) is further spin-coated with a shrink agent, reacted at a second temperature, and developed to shrink the aperture (3a). In this embodiment, the second-round shrink process will result in the desired aperture length. The second temperature is adjusted based on the shrinkage in the first round. With respect to a resist using short-wavelength light (short-wavelength resist) or a resist using electron beam (electron beam resist), a minute aperture can be obtained with stable shrink effect and accurate control of the length thereof.

摘要翻译： 使用抗蚀剂（3）作为掩模蚀刻表面成分膜（2），根据孔（3a）的形状对表面成分膜（2）进行图案化。 这导致步骤部分（4）具有与孔（3a）相同的形状，台阶部分（4）的侧壁（4a）通过孔（3a）暴露。 将孔（3a）旋转涂覆有收缩剂，在第一温度下反应并显影以收缩孔（3a）。 为了高精度地控制收缩，在第一轮反应中，孔径例如缩小了所需收缩的大约一半。 将孔（3a）进一步用收缩剂进行旋涂，在第二温度下反应并显影以收缩孔（3a）。 在该实施例中，第二次收缩过程将导致期望的孔径长度。 第二个温度根据第一轮的收缩率进行调整。 对于使用短波长光（短波长抗蚀剂）的抗蚀剂或使用电子束（电子束抗蚀剂）的抗蚀剂，可以获得具有稳定的收缩效果和其长度的精确控制的微小孔径。