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1.发明授权Integrated structure for reduced leakage and improved fill-factor in CMOS pixel 有权集成结构，可减少泄漏，改善CMOS像素的填充因子公开(公告)号：US06392263B1
公开(公告)日：2002-05-21
申请号：US09855251
申请日：2001-05-15
IPC分类号： H01L2972
CPC分类号： H01L27/14643 , H01L27/14609 , H01L27/1463
摘要： A densely integrated pixel, fabricated by CMOS technology, comprises a photodiode formed by a n-well, with cathode, surrounded by a p-well; a reset MOS transistor formed such that its polysilicon gate is positioned, for diode control, across the junction formed by p-well and n-well regions, and its source is merged with the photodiode cathode; and a sensing MOS transistor formed such that its source is combined with the drain of the reset transistor and its gate is electrically connected to the source of the reset transistor. In the pixel of the invention, the photodiode leakage current is greatly reduced, because no n+/p-well junction is connected to the photodiode, and the fill factor is improved, because the pixel size is much reduced.
摘要翻译： 由CMOS技术制造的密集集成的像素包括由n阱形成的光电二极管，阴极由p阱包围; 复位MOS晶体管形成为使得其多晶硅栅极被定位用于二极管控制，跨越由p阱和n阱区域形成的结，并且其源极与光电二极管阴极合并; 以及形成为使得其源极与复位晶体管的漏极组合的感测MOS晶体管，并且其栅极电连接到复位晶体管的源极。在本发明的像素中，光电二极管的漏电流大大降低，因为没有 n + / p-阱结连接到光电二极管，并且填充因子得到改善，因为像素尺寸大大降低。
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2.发明授权Programmable input/output driver circuit capable of operating at a variety of voltage levels and having a programmable pullup/pulldown function 失效可编程输入/输出驱动电路能够在各种电压电平下工作并具有可编程的上拉/下拉功能
公开(公告)号：US5583454A
公开(公告)日：1996-12-10
申请号：US566131
申请日：1995-12-01
IPC分类号： H03K3/356 , H03K19/003 , H03K19/0185 , H03K19/0175
CPC分类号： H03K19/018585 , H03K19/00315 , H03K19/018592 , H03K3/356182
摘要： An integrated circuit is presented having a driver circuit programmable to produce a variety of output voltages and conductive to the voltage levels of circuits interfaced by the integrated circuit. The integrated circuit includes programmable pullup and pulldown functions. The integrated circuit may be configured into an application having devices powered by a power supply voltage which is substantially larger than the voltage supplying the core section of the integrated circuit. Additionally, the present integrated circuit may be configured into other applications having devices powered by a power supply voltage substantially similar to the voltage supplying the integrated circuit core section. The present integrated circuit therefore retains utility for a large variety of applications. The pullup and pulldown transistors may be programmed to provide a resistive one, resistive zero, or neither.
摘要翻译： 提出了一种集成电路，其具有可编程的驱动器电路，以产生各种输出电压并且与由集成电路接口的电路的电压电平导通。 集成电路包括可编程上拉和下拉功能。 集成电路可以被配置为具有由比该集成电路的芯部提供的电压大得多的电源电压供电的装置的应用。 此外，本集成电路可以被配置成具有由基本上类似于提供集成电路核心部分的电压的电源电压供电的装置的其他应用。 因此，本集成电路可以用于各种各样的应用。 上拉和下拉晶体管可以被编程为提供电阻一个，电阻零或两者。
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3.发明授权CMOS photodiode having reduced dark current and improved light sensitivity and responsivity 有权CMOS光电二极管具有降低的暗电流和改善的光敏度和响应性公开(公告)号：US06621064B2
公开(公告)日：2003-09-16
申请号：US09848637
申请日：2001-05-03
IPC分类号： H01L3100
CPC分类号： H01L31/1126 , H01L27/14643 , H01L27/148
摘要： A light-sensing diode having improved efficiency due to an extended junction geometry that provides more than one level of interaction with the light input.
摘要翻译： 一种感光二极管，由于延长的接合几何形状而提高了效率，提供了与光输入不止一个层次的交互作用。
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公开(公告)号：US06512280B2
公开(公告)日：2003-01-28
申请号：US09859121
申请日：2001-05-16
IPC分类号： H01L31072
CPC分类号： H01L31/112 , H01L27/1463 , H01L27/148
摘要： A light-sensing diode fabricated in a semiconductor substrate having a surface protected by an insulator, comprising a first region of one conductivity type in this substrate, a second region of the opposite conductivity type forming a junction with the first region in the substrate; this junction having a convoluted shape, providing two portions generally parallel to the surface, and a constricted intersection with the surface; and a gate for applying electrical bias across the junction, this gate positioned on the insulator such that it covers all portions of the junction intersection with the surface, thereby creating a gate-controlled photodiode.
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5.发明授权
公开(公告)号：US5585764A
公开(公告)日：1996-12-17
申请号：US487251
申请日：1995-06-13
申请人： Kuok Y. Ling
发明人： Kuok Y. Ling
IPC分类号： H03K3/0231 , H03K3/03 , H03B5/04 , H03L1/00
CPC分类号： H03K3/0322 , H03K3/0231 , H03K3/03
摘要： A voltage controlled oscillator circuit with a high power supply rejection ratio incorporates a clamping transistor with respect to each output terminal which limits the signal swing of the output terminal. The limited voltage swing allows relatively large movements in the power supply and ground voltages without causing significant changes in the frequency of the output signals. Such an oscillator circuit may be incorporated into an integrated circuit characterized by noisy power supply and ground conductors. Additionally, multiple delayed versions of the output frequency may be created using a level shifter circuit and a buffer circuit. The oscillator circuit is relatively quick to react to changes in the controlling voltage, adjusting the oscillation frequency in a relatively short time interval.
摘要翻译： 具有高电源抑制比的压控振荡器电路包括相对于每个输出端子的钳位晶体管，其限制输出端子的信号摆幅。 有限的电压摆幅允许电源和接地电压的相对较大的移动，而不会导致输出信号频率的显着变化。 这样的振荡器电路可以结合到以噪声电源和接地导体为特征的集成电路中。 此外，可以使用电平移位器电路和缓冲电路来产生输出频率的多个延迟版本。 振荡器电路对控制电压的变化作出反应相对较快，在较短的时间间隔内调节振荡频率。
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6.发明授权High-speed voltage controlled oscillator having a level shifter for providing rail-to-rail output 失效具有用于提供轨到轨输出的电平移位器的高速压控振荡器
公开(公告)号：US5739726A
公开(公告)日：1998-04-14
申请号：US754503
申请日：1996-11-19
申请人： Kuok Y. Ling
发明人： Kuok Y. Ling
IPC分类号： H03K3/0231 , H03K3/03 , H03B5/04 , H03K19/0185 , H03L5/00
CPC分类号： H03K3/0322 , H03K3/0231 , H03K3/03
摘要： A voltage controlled oscillator circuit with a high power supply rejection ratio incorporates a clamping transistor with respect to each output terminal which limits the signal swing of the output terminal. The limited voltage swing allows relatively large movements in the power supply and ground voltages without causing significant changes in the frequency of the output signals. Such an oscillator circuit may be incorporated into an integrated circuit characterized by noisy power supply and ground conductors. Additionally, multiple delayed versions of the output frequency may be created using a level shifter circuit and a buffer circuit. The oscillator circuit is relatively quick to react to changes in the controlling voltage, adjusting the oscillation frequency in a relatively short time interval.
摘要翻译： 具有高电源抑制比的压控振荡器电路包括相对于每个输出端子的钳位晶体管，其限制输出端子的信号摆幅。 有限的电压摆幅允许电源和接地电压的相对较大的移动，而不会导致输出信号频率的显着变化。 这样的振荡器电路可以结合到以噪声电源和接地导体为特征的集成电路中。 此外，可以使用电平移位器电路和缓冲电路来产生输出频率的多个延迟版本。 振荡器电路对控制电压的变化作出反应相对较快，在较短的时间间隔内调节振荡频率。
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公开(公告)号：US5650753A
公开(公告)日：1997-07-22
申请号：US489725
申请日：1995-06-13
申请人： Kuok Y. Ling
发明人： Kuok Y. Ling
CPC分类号： H03F3/72 , H03F1/3217 , H03F3/3023 , H03F3/4521 , H03F2200/153
摘要： The op-amp circuit described herein utilizes current summing to substantially eliminate cross-over distortion. Therefore, the op-amp circuit is characterized by linearity over the operable voltage range of the amplifier. Additionally, the op-amp circuit is capable of rail-to-rail input and output voltage swings. Furthermore, the op-amp circuit is capable of operating with a power supply voltage as low as two volts when fabricated in modern CMOS fabrication processes, without requiring special processing steps. An output circuit within the op-amp circuit is configured with pullup and pulldown devices which combine to provide output voltages throughout the operable range of the op-amp. However, when an output voltage equal to the power supply voltage is desired, the pulldown device substantially stops its pulldown current flow. Therefore, the pullup device charges the output conductor of the op-amp circuit fully to the power supply voltage. Similarly, when an output voltage equal to the ground voltage is desired, the pullup device substantially stops its pullup current flow. Therefore, the pulldown device discharges the output conductor fully to the ground voltage.
摘要翻译： 本文描述的运算放大器电路利用电流求和来基本上消除交叉失真。 因此，运算放大器电路的特征在于放大器的可操作电压范围上的线性度。 此外，运算放大器电路能够实现轨至轨输入和输出电压摆幅。 此外，当在现代CMOS制造工艺中制造时，运算放大器电路能够以低至两伏的电源电压工作，而不需要特殊的处理步骤。 运算放大器电路中的输出电路配置有上拉和下拉器件，其组合以在运算放大器的整个可操作范围内提供输出电压。 然而，当期望输出电压等于电源电压时，下拉器件基本上停止其下拉电流。 因此，上拉装置将运算放大器电路的输出导体完全充电到电源电压。 类似地，当期望等于接地电压的输出电压时，上拉装置基本上停止其上拉电流。 因此，下拉器件将输出导体完全放电至接地电压。
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8.发明授权CMOS photodiode having reduced dark current and improved light sensitivity and responsivity 有权CMOS光电二极管具有降低的暗电流和改善的光敏度和响应性公开(公告)号：US06753202B2
公开(公告)日：2004-06-22
申请号：US10446910
申请日：2003-05-28
IPC分类号： H01L2100
CPC分类号： H01L31/1126 , H01L27/14643 , H01L27/148
摘要： A method for the fabrication of a light-sensing diode in a high-resistivity semiconductor substrate. A high-energy implant of ions into the substrate is patterned to form an annular well of the same conductivity type as the substrate; followed by a second high-energy implant of the opposite conductivity type, within the center of the annulus; followed by a third implant, of lower energy and high dosage, to form a region of the first conductivity type extending laterally near the substrate surface. The resulting diode junction is thereby patterned to include two planes near the substrate surface, allowing incident light to traverse the junction twice.
摘要翻译： 一种在高电阻率半导体衬底中制造感光二极管的方法。 将高能量离子注入到衬底中被图案化以形成与衬底相同的导电类型的环形阱; 之后是相对导电类型的第二高能量植入在环的中心内; 随后是较低能量和高剂量的第三种植入物，以形成在衬底表面附近横向延伸的第一导电类型的区域。 由此形成的二极管结被图案化以包括靠近衬底表面的两个平面，允许入射光穿过接合两次。
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公开(公告)号：US5739722A
公开(公告)日：1998-04-14
申请号：US746915
申请日：1996-11-19
申请人： Kuok Y. Ling
发明人： Kuok Y. Ling
CPC分类号： H03F3/72 , H03F1/3217 , H03F3/3023 , H03F3/4521 , H03F2200/153
摘要： The op-amp circuit described herein utilizes current summing to substantially eliminate cross-over distortion. Therefore, the op-amp circuit is characterized by linearity over the operable voltage range of the amplifier. Additionally, the op-amp circuit is capable of rail-to-rail input and output voltage swings. Furthermore, the op-amp circuit is capable of operating with a power supply voltage as low as two volts when fabricated in modern CMOS fabrication processes, without requiring special processing steps. An output circuit within the op-amp circuit is configured with pullup and pulldown devices which combine to provide output voltages throughout the operable range of the op-amp. However, when an output voltage equal to the power supply voltage is desired, the pulldown device substantially stops its pulldown current flow. Therefore, the pullup device charges the output conductor of the op-amp circuit fully to the power supply voltage. Similarly, when an output voltage equal to the ground voltage is desired, the pullup device substantially stops its pullup current flow. Therefore, the pulldown device discharges the output conductor fully to the ground voltage.
摘要翻译： 本文描述的运算放大器电路利用电流求和来基本上消除交叉失真。 因此，运算放大器电路的特征在于放大器的可操作电压范围上的线性度。 此外，运算放大器电路能够实现轨至轨输入和输出电压摆幅。 此外，当在现代CMOS制造工艺中制造时，运算放大器电路能够以低至两伏的电源电压工作，而不需要特殊的处理步骤。 运算放大器电路中的输出电路配置有上拉和下拉器件，其组合以在运算放大器的整个可操作范围内提供输出电压。 然而，当期望输出电压等于电源电压时，下拉器件基本上停止其下拉电流。 因此，上拉装置将运算放大器电路的输出导体完全充电到电源电压。 类似地，当期望等于接地电压的输出电压时，上拉装置基本上停止其上拉电流。 因此，下拉器件将输出导体完全放电至接地电压。
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公开(公告)号：US5493189A
公开(公告)日：1996-02-20
申请号：US169871
申请日：1993-12-17
申请人： Kuok Y. Ling , William Krenik
发明人： Kuok Y. Ling , William Krenik
摘要： A switching scheme for driving a three-phase DC motor includes a first end of a first coil 20 coupled to a first end of a second coil 22 and a first end of a third coil 24. A first high side transistor 32 is coupled between a voltage source and a second end of the first coil 20. A second high side transistor 34 is coupled between the voltage source and a second end of the second coil 22. A third high side transistor 36 is coupled between the voltage source and a second end of the third coil 24. A first low side transistor 38 is coupled between the second end of the first coil 20 and a resistor 56. A second low side transistor 40 is coupled between the second end of the second coil 22 and the resistor 56. A third low side transistor 42 is coupled between the second end of the third coil 24 and the resistor 56. An output of a first low side driver 26 is coupled to a gate of the first low side transistor 38. An output of a second low side driver 28 is coupled to a gate of the second low side transistor 40. An output of a third low side driver 30 is coupled to a gate of the third low side transistor 42. A low side reference voltage is coupled to a first input of each of the three low side drivers 26, 28, and 30. The resistor 56 is coupled to a second input of each of the low side drivers 26, 28, and 30. Pre-charge circuitry 64 is coupled to the output of each of the three low side drivers 26, 28, and 30. The pre-charge circuitry 64 provides a pre-charge signal to each of the three low side drivers 26, 28, and 30.
摘要翻译： 用于驱动三相DC电动机的开关方案包括耦合到第二线圈22的第一端和第三线圈24的第一端的第一线圈20的第一端。第一高侧晶体管32耦合在 电压源和第一线圈20的第二端。第二高侧晶体管34耦合在电压源和第二线圈22的第二端之间。第三高侧晶体管36耦合在电压源和第二端 第一低侧晶体管38耦合在第一线圈20的第二端和电阻56之间。第二低侧晶体管40耦合在第二线圈22的第二端和电阻56之间。 第三低侧晶体管42耦合在第三线圈24的第二端和电阻56之间。第一低侧驱动器26的输出耦合到第一低侧晶体管38的栅极。第二低电平 侧驱动器28耦合到第二低电平的门 第三低侧驱动器30的输出耦合到第三低侧晶体管42的栅极。低侧参考电压耦合到三个低侧驱动器26,28中的每一个的第一输入端，并且 电阻器56耦合到每个低侧驱动器26,28和30的第二输入端。预充电电路64耦合到三个低侧驱动器26,28和30中的每一个的输出端。 预充电电路64为三个低端驱动器26,28和30中的每一个提供预充电信号。
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