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    Electronic device, memory device, and method of fabricating the same
    8.
    发明授权
    Electronic device, memory device, and method of fabricating the same 有权
    电子装置，存储装置及其制造方法

    公开(公告)号：US08426935B2

    公开(公告)日：2013-04-23

    申请号：US12700464

    申请日：2010-02-04

    Applicant: Gyu Tae Kim ,  Kang Ho Lee ,  Hye Young Kim ,  Kyung Jin Lee ,  Woun Kang

    Inventor： Gyu Tae Kim ,  Kang Ho Lee ,  Hye Young Kim ,  Kyung Jin Lee ,  Woun Kang

    IPC: H01L29/82 ,  H01L21/02

    CPC classification number: H01L27/222 ,  H01L43/12

    Abstract: Provided are an electronic device, a memory device, and a method of fabricating the devices for preventing physical distortion of functional elements from generating and improving electric contact properties between the functional elements and electric elements connecting to the functional elements. At least two grooves are formed in a substrate, and a conductive material is filled in the grooves to obtain electric elements having a surface at the same height as that of the substrate. In addition, a functional material layer (functional layer) is formed on an entire upper surface of the substrate and is patterned so as to obtain a functional element having both bottom surfaces contacting the electric elements.

    Abstract translation: 提供一种电子设备，存储器件和制造用于防止功能元件的物理失真的器件的产生和改善功能元件与连接到功能元件的电气元件之间的电接触性能的方法。 在衬底中形成至少两个沟槽，并且在沟槽中填充导电材料以获得具有与衬底相同高度的表面的电气元件。 此外，在基板的整个上表面上形成功能材料层（功能层），并对其进行图案化以获得具有与电气元件接触的两个底面的功能元件。

    NANOWIRE AND MEMORY DEVICE USING IT AS A MEDIUM FOR CURRENT-INDUCED WALL DISPLACEMENT
    10.
    发明申请
    NANOWIRE AND MEMORY DEVICE USING IT AS A MEDIUM FOR CURRENT-INDUCED WALL DISPLACEMENT 有权
    使用它作为电流感应壁位移介质的纳米和存储器件

    公开(公告)号：US20110007559A1

    公开(公告)日：2011-01-13

    申请号：US12746473

    申请日：2008-12-04

    Applicant: Kyung-Jin Lee ,  Hyun-Woo Lee ,  Soon-Wook Jung

    Inventor： Kyung-Jin Lee ,  Hyun-Woo Lee ,  Soon-Wook Jung

    IPC: G11C11/14 ,  H01B5/02

    CPC classification number: G11C11/14 ,  B82Y10/00 ,  G11C11/5607 ,  G11C19/0808

    Abstract: Disclosed herein are a nanowire and a current-induced domain wall displacement-type memory device using the same. The nanowire has perpendicular magnetic anisotropy and is configured in a manner that when a parameter Q, calculated by a saturation magnetization per unit area, a domain wall thickness and a spin polarizability of a ferromagnet that is a constituent material of the nanowire, has a value of (formula 1 should be inserted here) a domain wall thickness, a width “*′” and a thickness −* of the nanowire satisfy the relationship of (formula 2 should be inserted here) The present invention can be designed such that a current density capable of driving a memory device utilizing the current-driven domain wall displacement has a value of less than (formula 3 should be inserted here), through the determination of the optimal nanowire width and thickness satisfying a value of a critical current density, Jc for the domain wall displacement below a certain value required for commercialization, for a given material in the nanowire with perpendicular anisotropy. According to such a configuration of the present invention, the current density required for the domain wall displacement can be at least 10 times or further lowered than the current density in currently available nano wires. Therefore, the present invention is capable of solving the problems associated with high power consumption and malfunction of the device due to generation of Joule heat and is also capable of achieving low-cost production of memory devices. 3 × 10 8  A  /  cm 2 ≤ Q ≤ 10 9  A  /  cm 2 , ( 1 ) 1.39 T / λ + 4.51 ≤ W λ ≤ 1.53 T / λ + 4.44 ( 2 ) 10 7  A  /  cm 2 , ( 3 )

    Abstract translation: 本文公开了使用其的纳米线和电流诱导畴壁位移型存储器件。 纳米线具有垂直磁各向异性，并且以如下方式配置：当由单位面积的饱和磁化强度计算的参数Q为作为纳米线的构成材料的铁磁体的畴壁厚度和自旋极化率时，具有值 （式1应该插入）畴壁厚度，宽度“*”“和纳米线的厚度 - *满足关系（式2应该插在这里）本发明可以被设计成使得电流 通过确定满足临界电流密度值的最佳纳米线宽度和厚度，能够利用电流驱动畴壁位移驱动存储器件的密度具有小于（在此应插入公式3）的值Jc 对于具有垂直各向异性的纳米线中的给定材料，域壁位移低于商业化所需的一定值。 根据本发明的这种结构，畴壁位移所需的电流密度可以是目前可用的纳米线中的电流密度的10倍以上。 因此，本发明能够解决由于焦耳热的产生而导致的高功耗和故障的问题，并且也能够实现低成本地生产存储器件。 3×10 8 A / cm 2≤Q≤109 A / cm 2，（1）1.39 T /λ+4.51≤Wλ≤1.53T /λ+ 4.44（2）10 7 / cm 2，（3）

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