Organic Semiconductor Interface Preparation
    1.
    发明申请
    Organic Semiconductor Interface Preparation 有权
    有机半导体界面准备

    公开(公告)号:US20120146002A1

    公开(公告)日:2012-06-14

    申请号:US12968102

    申请日:2010-12-14

    摘要: A method is provided for preparing an interface surface for the deposition of an organic semiconductor material, in the fabrication of an organic thin film transistor (OTFT). A substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode. Then, source (S) and drain (D) electrodes are formed overlying the gate dielectric, exposing a gate dielectric channel interface region between the S/D electrodes. Subsequent to exposing the OTFT to a H2 or N2 plasma, a self-assembled organic monolayer is formed overlying the S/D electrodes. Finally, an active organic semiconductor layer is formed over the S/D electrodes and gate dielectric channel interface. The OTFT may be exposed to plasma either before or after the formation of the S/D electrodes.

    摘要翻译: 在有机薄膜晶体管(OTFT)的制造中提供了一种制备用于沉积有机半导体材料的界面的方法。 提供衬底并且形成覆盖衬底的栅电极。 在栅电极上形成栅极电介质。 然后,源极(S)和漏极(D)电极形成在栅极电介质上方,暴露在S / D电极之间的栅介质沟道界面区域。 在将OTFT暴露于H 2或N 2等离子体之后,形成覆盖S / D电极的自组装有机单层。 最后,在S / D电极和栅介质通道界面上形成有源有机半导体层。 在形成S / D电极之前或之后,OTFT可能暴露于等离子体。

    One mask Pt/PCMO/Pt stack etching process for RRAM applications
    3.
    发明授权
    One mask Pt/PCMO/Pt stack etching process for RRAM applications 有权
    用于RRAM应用的一个掩模Pt / PCMO / Pt堆叠蚀刻工艺

    公开(公告)号:US07169637B2

    公开(公告)日:2007-01-30

    申请号:US10883228

    申请日:2004-07-01

    IPC分类号: H01L21/06 H01L21/461

    摘要: A one-mask etching method for use with a PCMO-containing RRAM to reduce stack side-wall residuals, includes preparing a substrate, taken from the group of substrates consisting of silicon, silicon dioxide and polysilicon; depositing a bottom electrode on the substrate; depositing a PCMO layer on the bottom electrode; depositing a top electrode on the PCMO layer; depositing a hard mask on the top electrode; depositing and patterning a photoresist layer on the hard mask; etching the hard mask; etching the top electrode using a first etching process having an etching atmosphere consisting of Ar, O2, and Cl2; etching the PCMO layer using an etching process taken from the group of etching processes consisting of the first etching process and a second etching process having an etching atmosphere consisting of Ar and O2. etching the bottom electrode using the first etching process; and completing the RRAM device.

    摘要翻译: 包含含PCMO的RRAM以减少堆叠侧壁残留物的单掩模蚀刻方法包括制备从由硅,二氧化硅和多晶硅组成的一组衬底取得的衬底; 在底物上沉积底部电极; 在底部电极上沉​​积PCMO层; 在PCMO层上沉积顶部电极; 在顶部电极上沉​​积硬掩模; 在硬掩模上沉积和图案化光致抗蚀剂层; 蚀刻硬掩模; 使用具有由Ar,O 2和Cl 2组成的蚀刻气氛的第一蚀刻工艺蚀刻顶部电极; 使用从由第一蚀刻工艺和由Ar和O 2组成的蚀刻气氛的第二蚀刻工艺组成的蚀刻工艺组中的蚀刻工艺来蚀刻PCMO层。 使用第一蚀刻工艺蚀刻底部电极; 并完成RRAM设备。

    PCMO spin-coat deposition
    4.
    发明授权
    PCMO spin-coat deposition 有权
    PCMO旋涂沉积

    公开(公告)号:US07098043B2

    公开(公告)日:2006-08-29

    申请号:US10759468

    申请日:2004-01-15

    IPC分类号: H01L21/00

    摘要: A Pr1-XCaXMnO3 (PCMO) spin-coat deposition method for eliminating voids is provided, along with a void-free PCMO film structure. The method comprises: forming a substrate, including a noble metal, with a surface; forming a feature, such as a via or trench, normal with respect to the substrate surface; spin-coating the substrate with acetic acid; spin-coating the substrate with a first, low concentration of PCMO solution; spin-coating the substrate with a second concentration of PCMO solution, having a greater concentration of PCMO than the first concentration; baking and RTA annealing (repeated one to five times); post-annealing; and, forming a PCMO film with a void-free interface between the PCMO film and the underlying substrate surface. The first concentration of PCMO solution has a PCMO concentration in the range of 0.01 to 0.1 moles (M). The second concentration of PCMO solution has a PCMO concentration in the range of 0.2 to 0.5 M.

    摘要翻译: 提供了一种用于消除空隙的Pr 1-X C 3 Mn 3 O 3(PCMO)旋涂沉积方法,以及无空隙 PCMO薄膜结构。 该方法包括:用表面形成包括贵金属的基底; 形成相对于衬底表面正常的特征,例如通孔或沟槽; 用乙酸旋涂底物; 用第一种低浓度的PCMO溶液旋涂底物; 以第二浓度的PCMO溶液旋涂底物,其具有比第一浓度更高浓度的PCMO; 烘烤和RTA退火(重复1〜5次); 后退火; 并且在PCMO膜和下面的衬底表面之间形成具有无空隙界面的PCMO膜。 PCMO溶液的第一浓度的PCMO浓度范围为0.01至0.1摩尔(M)。 PCMO溶液的第二浓度的PCMO浓度范围为0.2-0.5M。

    Controlling Printed Ink Line Widths using Fluoropolymer Templates
    5.
    发明申请
    Controlling Printed Ink Line Widths using Fluoropolymer Templates 有权
    使用氟聚合物模板控制印刷墨水线宽度

    公开(公告)号:US20130260536A1

    公开(公告)日:2013-10-03

    申请号:US13432855

    申请日:2012-03-28

    IPC分类号: H01L21/36

    摘要: A method is provided for controlling printed ink horizontal cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.

    摘要翻译: 提供了一种使用氟聚合物模板控制印刷油墨水平横截面积的方法。 该方法最初形成覆盖在基底上的氟聚合物模板。 氟聚合物模板具有水平的第一横截面尺寸。 然后,将初级墨水印刷在具有小于第一横截面尺寸的水平第二横截面尺寸的含氟聚合物模板上。 在具有模板长度大于模板宽度的含氟聚合物线的情况下,其中模板宽度是第一横截面尺寸,打印初级墨水需要打印墨水长度大于墨水宽度的主墨水线,其中 油墨宽度是第二横截面尺寸。 在一个方面,该方法印刷多个主油墨层,每个主油墨层的油墨宽度小于模板宽度。 每个上覆的初级墨水层可以在溶剂之前被打印在基本的主油墨层中蒸发。

    Organic Transistor with Fluropolymer Banked Crystallization Well
    6.
    发明申请
    Organic Transistor with Fluropolymer Banked Crystallization Well 有权
    有机晶体管与氟聚合物堆积结晶井

    公开(公告)号:US20120181512A1

    公开(公告)日:2012-07-19

    申请号:US13009806

    申请日:2011-01-19

    IPC分类号: H01L51/10 H01L51/40

    摘要: A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.

    摘要翻译: 提供了一种使用氟聚合物分层结晶井制造具有图案化有机半导体的印刷有机薄膜晶体管(OTFT)的方法。 在底栅OTFT的情况下,提供衬底并且形成覆盖衬底的栅电极。 形成覆盖栅电极的栅极电介质,并且覆盖栅极电介质形成源极(S)和漏极(D)电极。 在S / D电极之间形成栅极介电OTFT沟道界面区域。 然后形成具有氟聚合物封存和结晶团的阱,以限定有机半导体印刷区域。 该阱填充有机半导体,覆盖S / D电极和栅极介电OTFT通道界面。 然后,有机半导体结晶。 主要晶粒成核起源于覆盖S / D电极的区域。 结果,形成介于S / D电极之间的有机半导体沟道。

    Method of etching a TE/PCMO stack using an etch stop layer
    7.
    发明授权
    Method of etching a TE/PCMO stack using an etch stop layer 有权
    使用蚀刻停止层蚀刻TE / PCMO堆叠的方法

    公开(公告)号:US07727897B2

    公开(公告)日:2010-06-01

    申请号:US11215519

    申请日:2005-08-30

    IPC分类号: H01L21/302

    CPC分类号: H01L28/55 H01L21/31122

    摘要: A method of etching a top electrode/ferroelectric stack using an etch stop layer includes forming a first layer of a first dielectric material on a substrate; forming a bottom electrode in the first layer of a first dielectric material; depositing an etch stop layer on the first layer of the first dielectric material and the bottom electrode, including forming a hole therein; depositing a layer of ferroelectric material and depositing top electrode material on the ferroelectric material to form a top electrode/ferroelectric stack; stack etching the top electrode and ferroelectric material; depositing a layer of a second dielectric material encapsulating the top electrode and ferroelectric material; etching the layer of the second dielectric material to form a sidewall about the top electrode and ferroelectric material; and depositing a second and third layers of the first dielectric material.

    摘要翻译: 使用蚀刻停止层蚀刻顶部电极/铁电体堆叠的方法包括在衬底上形成第一电介质材料的第一层; 在第一介电材料的第一层中形成底电极; 在所述第一电介质材料和所述底电极的所述第一层上沉积蚀刻停止层,包括在其中形成孔; 沉积一层铁电材料层并在铁电材料上沉积顶部电极材料以形成顶部电极/铁电堆叠; 堆叠蚀刻顶部电极和铁电材料; 沉积封装上电极和铁电材料的第二电介质材料层; 蚀刻第二介电材料的层以形成围绕顶电极和铁电材料的侧壁; 以及沉积所述第一介电材料的第二和第三层。

    Iridium etching for FeRAM applications
    8.
    发明授权
    Iridium etching for FeRAM applications 失效
    用于FeRAM应用的铱蚀刻

    公开(公告)号:US07267996B2

    公开(公告)日:2007-09-11

    申请号:US10923165

    申请日:2004-08-20

    IPC分类号: H01L21/467

    CPC分类号: H01L21/32136 H01L21/28291

    摘要: A method of etching an iridium layer for use in a ferroelectric device includes preparing a substrate; depositing a barrier layer on the substrate; depositing an iridium layer on the barrier layer; depositing a hard mask layer on the iridium layer; depositing, patterning and developing a photoresist layer on the hard mask; etching the hard mask layer; etching the iridium layer using argon, oxygen and chlorine chemistry in a high-density plasma reactor; and completing the ferroelectric device.

    摘要翻译: 蚀刻用于铁电体器件的铱层的方法包括:制备衬底; 在衬底上沉积阻挡层; 在阻挡层上沉积铱层; 在铱层上沉积硬掩模层; 在硬掩模上沉积,图案化和显影光致抗蚀剂层; 蚀刻硬掩模层; 在高密度等离子体反应器中使用氩,氧和氯化学蚀刻铱层; 并完成铁电器件。

    Method of making self-aligned shallow trench isolation
    9.
    发明授权
    Method of making self-aligned shallow trench isolation 有权
    自对准浅沟槽隔离方法

    公开(公告)号:US06627510B1

    公开(公告)日:2003-09-30

    申请号:US10112014

    申请日:2002-03-29

    IPC分类号: H01L21762

    摘要: A modified STI process is provided comprising forming a first polysilicon layer over a substrate. Forming a trench through the first polysilicon layer and into the substrate, and filling the trench with an oxide layer. Depositing a second polysilicon layer over the oxide, such that the bottom of the second polysilicon layer within the trench is above the bottom of the first polysilicon layer, and the top of the second polysilicon layer within the trench is below the top of the first polysilicon layer. The resulting structure may then be planarized using a CMP process. An alignment key may be formed by selectively etching the oxide layer. A third polysilicon layer may then be deposited and patterned using photoresist to form a gate structure. During patterning, exposed second polysilicon layer is etched. An etch stop is detected at the completion of removal of the second polysilicon layer. A thin layer of the first polysilicon layer remains, to be carefully removed using a subsequent selective etch process.

    摘要翻译: 提供了一种改进的STI工艺,包括在衬底上形成第一多晶硅层。 通过第一多晶硅层形成沟槽并进入衬底,并用氧化物层填充沟槽。 在氧化物上沉积第二多晶硅层,使得沟槽内的第二多晶硅层的底部高于第一多晶硅层的底部,并且沟槽内的第二多晶硅层的顶部低于第一多晶硅的顶部 层。 然后可以使用CMP工艺将得到的结构平坦化。 可以通过选择性地蚀刻氧化物层来形成对准键。 然后可以使用光致抗蚀剂沉积和图案化第三多晶硅层以形成栅极结构。 在图案化期间,蚀刻暴露的第二多晶硅层。 在完成去除第二多晶硅层时检测到蚀刻停止。 保留第一多晶硅层的薄层,使用随后的选择性蚀刻工艺小心地去除。

    Controlling printed ink line widths using fluoropolymer templates
    10.
    发明授权
    Controlling printed ink line widths using fluoropolymer templates 有权
    使用氟聚合物模板控制印刷墨水线宽度

    公开(公告)号:US08765224B2

    公开(公告)日:2014-07-01

    申请号:US13432855

    申请日:2012-03-28

    IPC分类号: B05D5/00

    摘要: A method is provided for controlling printed ink horizontal cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.

    摘要翻译: 提供了一种使用氟聚合物模板控制印刷油墨水平横截面积的方法。 该方法最初形成覆盖在基底上的氟聚合物模板。 氟聚合物模板具有水平的第一横截面尺寸。 然后,将初级墨水印刷在具有小于第一横截面尺寸的水平第二横截面尺寸的含氟聚合物模板上。 在具有模板长度大于模板宽度的含氟聚合物线的情况下,其中模板宽度是第一横截面尺寸,打印初级墨水需要打印墨水长度大于墨水宽度的主墨水线,其中 油墨宽度是第二横截面尺寸。 在一个方面,该方法印刷多个主油墨层,每个主油墨层的油墨宽度小于模板宽度。 每个上覆的初级墨水层可以在溶剂之前被打印在基本的主油墨层中蒸发。