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公开(公告)号:US20180309460A1
公开(公告)日:2018-10-25
申请号:US15914833
申请日:2018-03-07
Applicant: Abhishek Bandyopadhyay , Daniel Peter Canniff , Mariana Tosheva Markova , Edward Chapin Guthrie
Inventor: Abhishek Bandyopadhyay , Daniel Peter Canniff , Mariana Tosheva Markova , Edward Chapin Guthrie
CPC classification number: H03M3/424 , H03M1/002 , H03M1/066 , H03M1/361 , H03M1/365 , H03M3/02 , H03M3/04 , H03M3/32 , H03M3/452 , H03M3/464
Abstract: A multibit flash quantizer circuit, such as included as a portion of delta-sigma conversion circuit, can be operated in a dynamic or configurable manner. Information indicative of at least one of an ADC input slew rate or a prior quantizer output code can be used to establish a flash quantizer conversion window. Within the selected conversion window, comparators in the quantizer circuit can be made active. Comparators outside the conversion window can be made dormant, such as depowered or biased to save power. An output from such dormant converters can be preloaded and latched. In this manner, full resolution is available without requiring that all comparator circuits within the quantizer remain active at all times.