公开(公告)号：US07777658B2

公开(公告)日：2010-08-17

申请号：US12334097

申请日：2008-12-12

Applicant: Khiem Quang Nguyen ,  Abhishek Bandyopadhyay ,  Michael Determan

Inventor： Khiem Quang Nguyen ,  Abhishek Bandyopadhyay ,  Michael Determan

IPC: H03M3/00

CPC classification number: H03M1/0663 ,  H03M1/0682 ,  H03M1/747 ,  H03M3/502

Abstract: A system for converting digital signals into analog signals using sigma-delta modulation and includes a signed thermometer encoder for converting a plurality of signed binary data received at the encoder into a plurality of signed thermometer data and a rotational dynamic element matching (DEM) arrangement for receiving the plurality of signed binary data and the plurality of signed thermometer data. The rotational DEM arrangement further includes a first barrel shifter for receiving a positive thermometer data at a cycle, the first barrel shifter having a first pointer indicating a starting position of next positive thermometer data, and a second barrel shifter for receiving a negative thermometer data at a cycle, the second shifter having a second pointer indicating a starting position of next negative thermometer data, wherein the first pointer is circularly shifted as a function of positive binary data and the second pointer is circularly shifted as a function of negative binary data.

Abstract translation: 一种用于使用Σ-Δ调制将数字信号转换成模拟信号的系统，并且包括用于将在编码器处接收的多个带符号二进制数据转换为多个带符号温度计数据的带符号温度计编码器和用于 接收多个带符号二进制数据和多个签名的温度计数据。 旋转DEM装置还包括用于在一个周期接收正温度计数据的第一桶形移位器，第一桶形移位器具有指示下一个正温度计数据的起始位置的第一指针，以及用于接收负温度计数据的第二桶形移位器 第二移位器具有指示下一个负温度计数据的开始位置的第二指示器，其中第一指针作为正二进制数据的函数循环移位，并且第二指针作为负二进制数据的函数循环移位。

公开(公告)号：US20080079708A1

公开(公告)日：2008-04-03

申请号：US11904931

申请日：2007-09-28

Applicant: Abhishek Bandyopadhyay ,  Eric Nestler ,  Michael Ashburn

Inventor： Abhishek Bandyopadhyay ,  Eric Nestler ,  Michael Ashburn

IPC: G09G5/00

CPC classification number: G09G3/3696 ,  G09G3/3233 ,  G09G3/3681 ,  G09G3/3692 ,  G09G2310/0289 ,  G09G2330/02 ,  G09G2330/04

Abstract: A low voltage driver for a higher voltage LCD includes a plurality of LCD drive bias voltage input-terminals; an LCD drive voltage output terminal; an input transistor switching circuit having at least one switch for each LCD drive bias voltage for selecting one of the bias voltages; an output transistor switching circuit, responsive to the input transistor switching circuit, for applying the selected one of the bias voltages to the LCD drive voltage output terminal, the transistors of the switching circuits having a predetermined breakdown voltage; a level shifter for providing switching voltages counterpart to the plurality of bias voltages; a logic circuit for enabling the first transistor switching circuit to select a one of the bias voltages and applying a set of counterpart switching voltages to the input and output transistor switching circuits for connecting the selected one of the bias voltages to the output terminal and applying a set of switching voltages to the input and output switching circuits which limit the voltage across the transistor junctions in the switching circuit to less than the predetermined breakdown voltage.

Abstract translation: 用于较高电压LCD的低电压驱动器包括多个LCD驱动偏置电压输入端子; LCD驱动电压输出端子; 输入晶体管切换电路，具有用于每个LCD驱动偏置电压的至少一个开关，用于选择所述偏置电压之一; 输出晶体管切换电路，响应于输入晶体管切换电路，将所选择的一个偏置电压施加到LCD驱动电压输出端，开关电路的晶体管具有预定的击穿电压; 电平移位器，用于提供与多个偏置电压相对应的开关电压; 逻辑电路，用于使第一晶体管开关电路能够选择一个偏置电压，并将一组对应的开关电压施加到输入和输出晶体管开关电路，用于将所选择的一个偏置电压连接到输出端子，并施加一个 一组开关电压到输入和输出开关电路，其将开关电路中的晶体管结两端的电压限制到小于预定的击穿电压。

公开(公告)号：US20180309460A1

公开(公告)日：2018-10-25

申请号：US15914833

申请日：2018-03-07

Applicant: Abhishek Bandyopadhyay ,  Daniel Peter Canniff ,  Mariana Tosheva Markova ,  Edward Chapin Guthrie

Inventor： Abhishek Bandyopadhyay ,  Daniel Peter Canniff ,  Mariana Tosheva Markova ,  Edward Chapin Guthrie

IPC: H03M3/00 ,  H03M1/06 ,  H03M1/36 ,  H03M3/02 ,  H03M3/04

CPC classification number: H03M3/424 ,  H03M1/002 ,  H03M1/066 ,  H03M1/361 ,  H03M1/365 ,  H03M3/02 ,  H03M3/04 ,  H03M3/32 ,  H03M3/452 ,  H03M3/464

Abstract: A multibit flash quantizer circuit, such as included as a portion of delta-sigma conversion circuit, can be operated in a dynamic or configurable manner. Information indicative of at least one of an ADC input slew rate or a prior quantizer output code can be used to establish a flash quantizer conversion window. Within the selected conversion window, comparators in the quantizer circuit can be made active. Comparators outside the conversion window can be made dormant, such as depowered or biased to save power. An output from such dormant converters can be preloaded and latched. In this manner, full resolution is available without requiring that all comparator circuits within the quantizer remain active at all times.

公开(公告)号：US20130207665A1

公开(公告)日：2013-08-15

申请号：US13747250

申请日：2013-01-22

Applicant: Abhishek Bandyopadhyay ,  Khiem Quang Nguyen

Inventor： Abhishek Bandyopadhyay ,  Khiem Quang Nguyen

IPC: G01R31/02

CPC classification number: G01R31/02 ,  G01D3/10 ,  G01R31/2829 ,  H04R29/004 ,  H04R2420/05 ,  H04R2499/13

Abstract: Fault detection techniques for control of sensor systems. A sensor control integrated circuit (“IC”) may include a fault detection system for coupling to the sensor supply lines. The system may detect faults for each of the sensor supply lines. The fault detection system may level shift sensor supply line signals from a first voltage domain to a second voltage domain appropriate for the fault detection system of the controller IC. The fault detection system may level shift source potential voltages from the first voltage domain to the second voltage domain to detect predetermined fault types. The fault detection system may compare the second domain voltages from the sensor supply lines to voltages representing predetermined fault types and may generate fault status indicators based on the comparison.

Abstract translation: 用于控制传感器系统的故障检测技术。 传感器控制集成电路（“IC”）可以包括用于耦合到传感器电源线的故障检测系统。 系统可以检测每个传感器电源线的故障。 故障检测系统可以将传感器电源线信号从第一电压域移动到适合于控制器IC的故障检测系统的第二电压域。 故障检测系统可以将来自第一电压域的移位源电位电压调整到第二电压域，以检测预定的故障类型。 故障检测系统可将来自传感器电源线的第二域电压与表示预定故障类型的电压进行比较，并且可以基于该比较来生成故障状态指示器。

公开(公告)号：US07800447B2

公开(公告)日：2010-09-21

申请号：US12173703

申请日：2008-07-15

Applicant: Abhishek Bandyopadhyay ,  Khiem Nguyen

Inventor： Abhishek Bandyopadhyay ,  Khiem Nguyen

IPC: H03F3/26

CPC classification number: H03F3/45475 ,  H03F3/3022 ,  H03F3/45183 ,  H03F2200/135 ,  H03F2200/513 ,  H03F2203/30033 ,  H03F2203/45726

Abstract: A low-power, low-voltage feedback class AB operational amplifier is disclosed. The minimum supply voltage is one gate-source voltage and two saturation voltages. Currents on the output p-type and n-type transistors are monitored as part of the feedback loop control. Accurate monitoring is achieved by connecting current monitors directly to the corresponding voltage rail. Additional output stages may be selectively connected to the primary output stage to dynamically adjust to changes source conditions. Thus by connecting the appropriate number and type of additional output stages, continuous time adaptive power supply compensation is achieved. Both single ended and differential topologies are described.

Abstract translation: 公开了一种低功率，低电压反馈级AB运算放大器。 最小电源电压为一个栅源电压和两个饱和电压。 作为反馈回路控制的一部分，监视输出p型和n型晶体管上的电流。 通过将电流监视器直接连接到相应的电压轨来实现精确的监控。 另外的输出级可以选择性地连接到主输出级，以动态调整以改变源条件。 因此，通过连接适当数量和类型的附加输出级，实现连续时间自适应电源补偿。 描述了单端和差分拓扑。

公开(公告)号：US20180309458A1

公开(公告)日：2018-10-25

申请号：US15912128

申请日：2018-03-05

Applicant: Abhishek Bandyopadhyay ,  Rong Jin

Inventor： Abhishek Bandyopadhyay ,  Rong Jin

IPC: H03M1/08

CPC classification number: H03M1/0854 ,  H03M1/468 ,  H03M1/804 ,  H03M3/46

Abstract: Some or all of a comparator circuit of an analog-to-digital converter (ADC) circuit can be efficiently repurposed or reused for residue amplification for efficient noise-shaping, e.g., in a noise-shaping feedback configuration. A preamplifier portion of a comparator circuit in an oversampling ADC can be re-purposed to provide an amplifier to amplify or otherwise modify a residue left after the bit trials of a conversion cycle. The amplified or modified residue can then be used elsewhere, for example, for noise-shaping by applying a noise transfer function (NTF), a result of which can then be fed back (e.g., summed with the next sampled input at an input of the comparator circuit for use in the N bit trials of the next ADC cycle).

公开(公告)号：US20150002322A1

公开(公告)日：2015-01-01

申请号：US14486918

申请日：2014-09-15

Applicant: Abhishek Bandyopadhyay ,  Paul A. Baginski

Inventor： Abhishek Bandyopadhyay ,  Paul A. Baginski

IPC: H03M1/06 ,  H03K17/06 ,  H03M1/00 ,  H03M1/66

CPC classification number: H03M1/0617 ,  H03K17/063 ,  H03K17/162 ,  H03M1/002 ,  H03M1/0863 ,  H03M1/664 ,  H03M1/747

Abstract: Embodiments of the present disclosure may provide a switching scheme for tri-level unit elements with ISI mitigation. A tri-level unit element may include a first and second current source and a plurality of switches arranged to form three circuit branches between the first and the second current source. The first circuit branch may include two switches connected in parallel between the first current source and a first output terminal and two switches connected in parallel between the second current source and the first output terminal. The second circuit branch may include two switches connected in parallel between the first current source and a second output terminal and two switches connected in parallel between the second current source and the second output terminal. The third circuit branch may include switches to couple the first current source and the second current source to a dump node.

Abstract translation: 本公开的实施例可以提供具有ISI减轻的三级单元元件的切换方案。 三电平单元可以包括第一和第二电流源以及被​​布置成在第一和第二电流源之间形成三个电路分支的多个开关。 第一电路支路可以包括在第一电流源和第一输出端之间并联连接的两个开关，以及并联连接在第二电流源和第一输出端之间的两个开关。 第二电路支路可以包括并联连接在第一电流源和第二输出端之间的两个开关以及在第二电流源和第二输出端之间并联连接的两个开关。 第三电路分支可以包括将第一电流源和第二电流源耦合到转储节点的开关。

公开(公告)号：US08847807B2

公开(公告)日：2014-09-30

申请号：US13790472

申请日：2013-03-08

Applicant: Abhishek Bandyopadhyay ,  Paul A. Baginski

Inventor： Abhishek Bandyopadhyay ,  Paul A. Baginski

IPC: H03M1/66 ,  H03K17/06

CPC classification number: H03M1/0617 ,  H03K17/063 ,  H03K17/162 ,  H03M1/002 ,  H03M1/0863 ,  H03M1/664 ,  H03M1/747

Abstract: Embodiments of the present disclosure may provide a switching scheme for tri-level unit elements with ISI mitigation. A tri-level unit element may include a first and second current source and a plurality of switches arranged to form three circuit branches between the first and the second current source. The first circuit branch may include two switches connected in parallel between the first current source and a first output terminal and two switches connected in parallel between the second current source and the first output terminal. The second circuit branch may include two switches connected in parallel between the first current source and a second output terminal and two switches connected in parallel between the second current source and the second output terminal. The third circuit branch may include switches to couple the first current source and the second current source to a dump node.

Abstract translation: 本公开的实施例可以提供具有ISI减轻的三级单元元件的切换方案。 三电平单元可以包括第一和第二电流源以及被​​布置成在第一和第二电流源之间形成三个电路分支的多个开关。 第一电路支路可以包括在第一电流源和第一输出端之间并联连接的两个开关，以及并联连接在第二电流源和第一输出端之间的两个开关。 第二电路支路可以包括并联连接在第一电流源和第二输出端之间的两个开关以及在第二电流源和第二输出端之间并联连接的两个开关。 第三电路分支可以包括将第一电流源和第二电流源耦合到转储节点的开关。

公开(公告)号：US20130241915A1

公开(公告)日：2013-09-19

申请号：US13873067

申请日：2013-04-29

Applicant: Abhishek BANDYOPADHYAY ,  Eric G. NESTLER ,  Michael A. ASHBURN, JR.

Inventor： Abhishek BANDYOPADHYAY ,  Eric G. NESTLER ,  Michael A. ASHBURN, JR.

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G3/3233 ,  G09G3/3681 ,  G09G3/3692 ,  G09G2310/0289 ,  G09G2330/02 ,  G09G2330/04

Abstract: A low voltage driver for a higher voltage LCD includes a plurality of LCD drive bias voltage input terminals; an LCD drive voltage output terminal; an input transistor switching circuit having at least one switch for each LCD drive bias voltage for selecting one of the bias voltages; an output transistor switching circuit, responsive to the input transistor switching circuit, for applying the selected one of the bias voltages to the LCD drive voltage output terminal, the transistors of the switching circuits having a predetermined breakdown voltage; a level shifter for providing switching voltages counterpart to the plurality of bias voltages; a logic circuit for enabling the first transistor switching circuit to select a one of the bias voltages and applying a set of counterpart switching voltages to the input and output transistor switching circuits for connecting the selected one of the bias voltages to the output terminal and applying a set of switching voltages to the input and output switching circuits which limit the voltage across the transistor junctions in the switching circuit to less than the predetermined breakdown voltage.

Abstract translation: 用于较高电压LCD的低电压驱动器包括多个LCD驱动偏置电压输入端子; LCD驱动电压输出端子; 输入晶体管切换电路，具有用于每个LCD驱动偏置电压的至少一个开关，用于选择所述偏置电压之一; 输出晶体管切换电路，响应于输入晶体管切换电路，将所选择的一个偏置电压施加到LCD驱动电压输出端，开关电路的晶体管具有预定的击穿电压; 电平移位器，用于提供与多个偏置电压相对应的开关电压; 逻辑电路，用于使第一晶体管开关电路能够选择一个偏置电压，并将一组对应的开关电压施加到输入和输出晶体管开关电路，用于将所选择的一个偏置电压连接到输出端子，并施加一个 一组开关电压到输入和输出开关电路，其将开关电路中的晶体管结两端的电压限制到小于预定的击穿电压。

公开(公告)号：US20100149012A1

公开(公告)日：2010-06-17

申请号：US12334097

申请日：2008-12-12

Applicant: Khiem Quang NGUYEN ,  Abhishek BANDYOPADHYAY ,  Michael DETERMAN

Inventor： Khiem Quang NGUYEN ,  Abhishek BANDYOPADHYAY ,  Michael DETERMAN

IPC: H03M3/02

CPC classification number: H03M1/0663 ,  H03M1/0682 ,  H03M1/747 ,  H03M3/502

Abstract: A system for converting digital signals into analog signals using sigma-delta modulation and includes a signed thermometer encoder for converting a plurality of signed binary data received at the encoder into a plurality of signed thermometer data and a rotational dynamic element matching (DEM) arrangement for receiving the plurality of signed binary data and the plurality of signed thermometer data. The rotational DEM arrangement further includes a first barrel shifter for receiving a positive thermometer data at a cycle, the first barrel shifter having a first pointer indicating a starting position of next positive thermometer data, and a second barrel shifter for receiving a negative thermometer data at a cycle, the second shifter having a second pointer indicating a starting position of next negative thermometer data, wherein the first pointer is circularly shifted as a function of positive binary data and the second pointer is circularly shifted as a function of negative binary data.

Abstract translation: 一种用于使用Σ-Δ调制将数字信号转换成模拟信号的系统，并且包括用于将在编码器处接收的多个带符号二进制数据转换为多个带符号温度计数据的带符号温度计编码器和用于 接收多个带符号二进制数据和多个签名的温度计数据。 旋转DEM装置还包括用于在一个周期接收正温度计数据的第一桶形移位器，第一桶形移位器具有指示下一个正温度计数据的起始位置的第一指针，以及用于接收负温度计数据的第二桶形移位器 第二移位器具有指示下一个负温度计数据的开始位置的第二指示器，其中第一指针作为正二进制数据的函数循环移位，并且第二指针作为负二进制数据的函数循环移位。