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    Semiconductor memory module with error correction
    2.
    发明申请
    Semiconductor memory module with error correction 失效
    具有误差校正的半导体存储器模块

    公开(公告)号：US20070033490A1

    公开(公告)日：2007-02-08

    申请号：US11488919

    申请日：2006-07-19

    申请人： Karl-Heinz Moosrainer ,  Srdjan Djordjevic ,  Michael Bestele

    发明人： Karl-Heinz Moosrainer ,  Srdjan Djordjevic ,  Michael Bestele

    IPC分类号： G11C29/00

    CPC分类号： G11C5/025 ,  G06F11/1044 ,  H05K1/181 ,  H05K3/429 ,  H05K2201/09254 ,  H05K2201/09627 ,  H05K2201/10159 ,  Y02P70/611

    摘要： A semiconductor memory module comprises a control chip for driving ECC memory chips and further memory chips. The memory chips are arranged in two rows on a top side and a bottom side of the module circuit board. The ECC memory chips are arranged centrally on the module circuit board alongside the rows of the memory chips. A control bus connects the ECC memory chips and also the memory chips to the control chip. In a region remote from the control chip, the control bus branches in a contact-making hole into a first partial bus, to which a first group of memory chips are connected, and a second partial bus, to which a second group of memory chips are connected. The ECC memory chips are likewise connected to the control bus via the contact-making hole. Since the ECC memory chips are not arranged directly under the control chip, a bus branch directed backward is not required. As a result, space considerations on the module circuit board are eased and signal integrity on the control buses is improved.

    摘要翻译： 半导体存储器模块包括用于驱动ECC存储器芯片和另外的存储器芯片的控制芯片。 存储芯片在模块电路板的上侧和下侧布置成两列。 ECC存储器芯片沿着存储器芯片的行排列在模块电路板的中央。 控制总线将ECC存储器芯片以及存储器芯片连接到控制芯片。 在远离控制芯片的区域中，控制总线将接触孔分支到连接有第一组存储器芯片的第一部分总线和第二部分总线，第二组存储器芯片 被连接。 ECC存储器芯片同样通过接触孔连接到控制总线。 由于ECC存储器芯片不直接布置在控制芯片的下方，所以不需要向后指向的总线分支。 结果，模块电路板上的空间考虑被减轻，并且控制总线上的信号完整性得到改善。

    Semiconductor memory module with error correction
    3.
    发明授权
    Semiconductor memory module with error correction 失效
    具有误差校正的半导体存储器模块

    公开(公告)号：US07681108B2

    公开(公告)日：2010-03-16

    申请号：US11488919

    申请日：2006-07-19

    申请人： Karl-Heinz Moosrainer ,  Srdjan Djordjevic ,  Michael Bestele

    发明人： Karl-Heinz Moosrainer ,  Srdjan Djordjevic ,  Michael Bestele

    IPC分类号： G06F11/10

    CPC分类号： G11C5/025 ,  G06F11/1044 ,  H05K1/181 ,  H05K3/429 ,  H05K2201/09254 ,  H05K2201/09627 ,  H05K2201/10159 ,  Y02P70/611

    摘要： A semiconductor memory module comprises a control chip for driving ECC memory chips and further memory chips. The memory chips are arranged in two rows on a top side and a bottom side of the module circuit board. The ECC memory chips are arranged centrally on the module circuit board alongside the rows of the memory chips. A control bus connects the ECC memory chips and also the memory chips to the control chip. In a region remote from the control chip, the control bus branches in a contact-making hole into a first partial bus, to which a first group of memory chips are connected, and a second partial bus, to which a second group of memory chips are connected. The ECC memory chips are likewise connected to the control bus via the contact-making hole. Since the ECC memory chips are not arranged directly under the control chip, a bus branch directed backward is not required. As a result, space considerations on the module circuit board are eased and signal integrity on the control buses is improved.

    摘要翻译： 半导体存储器模块包括用于驱动ECC存储器芯片和另外的存储器芯片的控制芯片。 存储芯片在模块电路板的上侧和下侧布置成两列。 ECC存储器芯片沿着存储器芯片的行排列在模块电路板的中央。 控制总线将ECC存储器芯片以及存储器芯片连接到控制芯片。 在远离控制芯片的区域中，控制总线将接触孔分支到连接有第一组存储器芯片的第一部分总线和第二部分总线，第二组存储器芯片 被连接。 ECC存储器芯片同样通过接触孔连接到控制总线。 由于ECC存储器芯片不直接布置在控制芯片的下方，所以不需要向后指向的总线分支。 结果，模块电路板上的空间考虑被减轻，并且控制总线上的信号完整性得到改善。