公开(公告)号：US20120193749A1

公开(公告)日：2012-08-02

申请号：US13447566

申请日：2012-04-16

申请人： Ryouichi KAWANO ,  Tomoyuki Yamazaki ,  Michio Nemoto ,  Mituhiro Kakefu

发明人： Ryouichi KAWANO ,  Tomoyuki Yamazaki ,  Michio Nemoto ,  Mituhiro Kakefu

IPC分类号： H01L29/06

CPC分类号： H01L29/8611 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/404 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device having a pn-junction diode structure that includes anode diffusion region including edge area, anode electrode on anode diffusion region, and insulator film on edge area of anode diffusion region, the area of anode electrode above anode diffusion region with insulator film interposed between anode electrode and anode diffusion region is narrower than the area of insulator film on edge area of anode diffusion region.

摘要翻译： 在具有pn结二极管结构的半导体器件中，包括阳极扩散区域包括边缘区域，阳极扩散区域上的阳极电极和阳极扩散区域的边缘区域上的绝缘膜，阳极扩散区域上方的绝缘膜的阳极电极面积 介于阳极电极和阳极扩散区之间的绝缘膜的面积比阳极扩散区边缘区域的面积窄。

公开(公告)号：US08178941B2

公开(公告)日：2012-05-15

申请号：US12507735

申请日：2009-07-22

申请人： Ryouichi Kawano ,  Tomoyuki Yamazaki ,  Michio Nemoto ,  Mituhiro Kakefu

发明人： Ryouichi Kawano ,  Tomoyuki Yamazaki ,  Michio Nemoto ,  Mituhiro Kakefu

IPC分类号： H01L23/58

CPC分类号： H01L29/8611 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/404 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device having a pn-junction diode structure that includes anode diffusion region including edge area, anode electrode on anode diffusion region, and insulator film on edge area of anode diffusion region, the area of anode electrode above anode diffusion region with insulator film interposed between anode electrode and anode diffusion region is narrower than the area of insulator film on edge area of anode diffusion region.

摘要翻译： 在具有pn结二极管结构的半导体器件中，包括阳极扩散区域包括边缘区域，阳极扩散区域上的阳极电极和阳极扩散区域的边缘区域上的绝缘膜，阳极扩散区域上方的绝缘膜的阳极电极面积 介于阳极电极和阳极扩散区之间的绝缘膜的面积比阳极扩散区边缘区域的面积窄。

公开(公告)号：US20120064706A1

公开(公告)日：2012-03-15

申请号：US13299870

申请日：2011-11-18

申请人： Michio NEMOTO ,  Haruo NAKAZAWA

发明人： Michio NEMOTO ,  Haruo NAKAZAWA

IPC分类号： H01L21/265

CPC分类号： H01L29/7397 ,  H01L21/263 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/36 ,  H01L29/66348

摘要： A semiconductor device is provided in which a semiconductor substrate can be prevented from being broken while elements can be prevented from being destroyed by a snap-back phenomenon. After an MOS gate structure is formed in a front surface of an FZ wafer, a rear surface of the FZ wafer is ground. Then, the ground surface is irradiated with protons and irradiated with two kinds of laser beams different in wavelength simultaneously to thereby form an N+ first buffer layer and an N second buffer layer. Then, a P+ collector layer and a collector electrode are formed on the proton-irradiated surface. The distance from a position where the net doping concentration of the N+ first buffer layer is locally maximized to the interface between the P+ collector layer and the N second buffer layer is set to be in a range of 5 μm to 30 μm, both inclusively.

摘要翻译： 提供一种半导体器件，其中可以防止半导体衬底破裂，同时可以防止元件被卡扣现象破坏。 在FZ晶片的前表面形成MOS栅极结构之后，研磨FZ晶片的背面。 然后，用质子照射地面，同时照射两种不同波长的激光束，从而形成N +第一缓冲层和N第二缓冲层。 然后，在质子照射的表面上形成P +集电极层和集电极。 从N +第一缓冲层的净掺杂浓度局部最大化的位置到P +集电极层和N第二缓冲层之间的界面的距离被设定在5μm至30μm的范围内。

公开(公告)号：US20110163409A1

公开(公告)日：2011-07-07

申请号：US12984140

申请日：2011-01-04

申请人： Tomonori MIZUSHIMA ,  Michio NEMOTO

发明人： Tomonori MIZUSHIMA ,  Michio NEMOTO

IPC分类号： H01L29/47

CPC分类号： H01L29/872 ,  H01L29/0661 ,  H01L29/402 ,  H01L29/407 ,  H01L29/8725

摘要： A TMBS diode is disclosed. In an active portion and a voltage withstanding structure portion of the diode, an end portion trench surrounds active portion trenches. An active end portion which is an outer circumferential side end portion of an anode electrode is in contact with conductive polysilicon inside the end portion trench. A guard trench is separated from the end portion trench and surrounds it. A field plate provided on an outer circumferential portion of the anode electrode is separated from the anode electrode, and contacts both part of a surface of an n-type drift layer in a mesa region between the end portion trench and the guard trench and the conductive polysilicon formed inside the guard trench. The semiconductor device is high in withstand voltage without injection of minority carriers, and electric field intensity of a trench formed in an end portion of an active portion is relaxed.

摘要翻译： 公开了TMBS二极管。 在二极管的有效部分和耐电压结构部分中，端部沟槽围绕有源部分沟槽。 作为阳极电极的外周侧端部的活性端部与端部槽内的导电性多晶硅接触。 保护沟槽与端部沟槽分离并将其包围。 设置在阳极电极的外周部上的场板与阳极电极分离，并且在端部沟槽和保护沟槽之间的台面区域中与n型漂移层的表面的两部分接触，导电 保护沟内形成多晶硅。 该半导体器件在不注入少数载流子的情况下耐受电压高，并且在有源部分的端部形成的沟槽的电场强度被放宽。

公开(公告)号：US20110124160A1

公开(公告)日：2011-05-26

申请号：US13017726

申请日：2011-01-31

申请人： Michio NEMOTO

发明人： Michio NEMOTO

IPC分类号： H01L21/265 ,  H01L21/331

CPC分类号： H01L29/8611 ,  H01L21/2255 ,  H01L21/263 ,  H01L29/167 ,  H01L29/66128

摘要： A semiconductor substrate and a method of its manufacture has a semiconductor substrate having a carbon concentration in a range of 6.0×1015 to 2.0×1017 atoms/cm3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region in a first semiconductor layer where a net impurity doping concentration is locally maximized. Due to the broad buffer structure, lifetime values are substantially equalized in a region extending from an interface between the first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer to the region where the net impurity doping concentration is locally maximized. In addition, the local minimum of lifetime values of the first semiconductor layer becomes high. It is thus possible to provide a semiconductor device having soft recovery characteristics, in addition to high-speed and low-loss characteristics, while suppressing a kinked leakage current waveform.

摘要翻译： 半导体衬底及其制造方法具有碳浓度在6.0×10 15至2.0×10 17原子/ cm 3范围内的半导体衬底。 用质子照射衬底的一个主表面，然后进行热处理，从而形成宽的缓冲结构，即第一半导体层中的净杂质掺杂浓度局部最大化的区域。 由于宽的缓冲结构，在从第一半导体层和形成在第一半导体层上的第二半导体层之间的界面延伸到局部最大化净杂质掺杂浓度的区域的区域中，寿命值基本相等。 此外，第一半导体层的寿命值的局部最小值变高。 因此，可以在抑制扭结的漏电流波形的同时，提供除了高速低损耗特性之外还具有软恢复特性的半导体器件。

公开(公告)号：US20100019342A1

公开(公告)日：2010-01-28

申请号：US12507735

申请日：2009-07-22

申请人： Ryouichi KAWANO ,  Tomoyuki YAMAZAKI ,  Michio NEMOTO ,  Mituhiro KAKEFU

发明人： Ryouichi KAWANO ,  Tomoyuki YAMAZAKI ,  Michio NEMOTO ,  Mituhiro KAKEFU

IPC分类号： H01L29/861

CPC分类号： H01L29/8611 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/404 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device having a pn-junction diode structure that includes anode diffusion region including edge area, anode electrode on anode diffusion region, and insulator film on edge area of anode diffusion region, the area of anode electrode above anode diffusion region with insulator film interposed between anode electrode and anode diffusion region is narrower than the area of insulator film on edge area of anode diffusion region.

摘要翻译： 在具有pn结二极管结构的半导体器件中，包括阳极扩散区域包括边缘区域，阳极扩散区域上的阳极电极和阳极扩散区域的边缘区域上的绝缘膜，阳极扩散区域上方的绝缘膜的阳极电极面积 介于阳极电极和阳极扩散区之间的绝缘膜的面积比阳极扩散区边缘区域的面积窄。

公开(公告)号：US20070048982A1

公开(公告)日：2007-03-01

申请号：US11464489

申请日：2006-08-14

申请人： Michio NEMOTO ,  Mitsuaki KIRISAWA ,  Haruo NAKAZAWA

发明人： Michio NEMOTO ,  Mitsuaki KIRISAWA ,  Haruo NAKAZAWA

IPC分类号： H01L21/04

CPC分类号： H01L29/8611 ,  H01L21/263 ,  H01L21/26513 ,  H01L21/268 ,  H01L29/66128

摘要： The method of manufacturing a semiconductor device includes forming a p-type anode layer and an anode electrode on one major surface of an n-type semiconductor substrate, irradiating an electron beam to the semiconductor substrate to introduce crystal defects into the semiconductor substrate, grinding the other major surface of semiconductor substrate to reduce the thickness the semiconductor substrate, implanting phosphorus ions from the exposed surface of semiconductor substrate, and irradiating pulsed YAG laser beams by the double pulse technique to the exposed surface, from which the phosphorus ions have been implanted, to activate the implanted phosphorus atoms and to recover the region extending from the exposed surface irradiated with the YAG laser beams to the depth corresponding to 5 to 30% of the total wafer thickness from the defective state caused by the crystal defects introduced therein.

摘要翻译： 制造半导体器件的方法包括在n型半导体衬底的一个主表面上形成p型阳极层和阳极电极，向半导体衬底照射电子束以将晶体缺陷引入到半导体衬底中，研磨 半导体衬底的其他主表面以减小半导体衬底的厚度，从半导体衬底的暴露表面注入磷离子，并通过双脉冲技术将脉冲YAG激光束照射到已经植入磷离子的暴露表面， 激活注入的磷原子，并且从由YAG激光束照射的暴露表面延伸的区域恢复到由其中引入的晶体缺陷引起的缺陷状态对应于总晶片厚度的5至30％的深度。

公开(公告)号：US07157785B2

公开(公告)日：2007-01-02

申请号：US10928927

申请日：2004-08-27

申请人： Manabu Takei ,  Tatsuya Naito ,  Michio Nemoto

发明人： Manabu Takei ,  Tatsuya Naito ,  Michio Nemoto

IPC分类号： H01L27/85 ,  H01L27/102 ,  H01L29/70 ,  H01L31/11 ,  H01L31/07

CPC分类号： H02M7/003 ,  H01L29/0696 ,  H01L29/7395 ,  H01L29/872

摘要： A semiconductor device is disclosed that reduces the reverse leakage current caused by reverse bias voltage application and reduces the on-voltage of the IGBT. A two-way switching device using the semiconductor devices is provided, and a method of manufacturing the semiconductor device is disclosed. The reverse blocking IGBT reduces the reverse leakage current and the on-voltage by bringing portions of an n−-type drift region 1 that extend between p-type base regions and an emitter electrode into Schottky contact to form Schottky junctions.

摘要翻译： 公开了一种半导体器件，其减少由反向偏置电压施加引起的反向泄漏电流并且降低IGBT的导通电压。 提供了使用半导体器件的双向开关器件，并且公开了制造半导体器件的方法。 反向阻断IGBT通过将p型基极区域和发射极电极之间延伸的类型漂移区域1的部分引入肖特基接触来形成反向漏电流和导通电压，形成 肖特基路口。

公开(公告)号：US10068998B2

公开(公告)日：2018-09-04

申请号：US13299870

申请日：2011-11-18

申请人： Michio Nemoto ,  Haruo Nakazawa

发明人： Michio Nemoto ,  Haruo Nakazawa

IPC分类号： H01L21/26 ,  H01L21/42 ,  H01L29/739 ,  H01L29/32 ,  H01L29/66 ,  H01L29/36 ,  H01L21/263 ,  H01L29/10

摘要： A semiconductor device is provided in which a semiconductor substrate can be prevented from being broken while elements can be prevented from being destroyed by a snap-back phenomenon. After an MOS gate structure is formed in a front surface of an FZ wafer, a rear surface of the FZ wafer is ground. Then, the ground surface is irradiated with protons and irradiated with two kinds of laser beams different in wavelength simultaneously to thereby form an N+ first buffer layer and an N second buffer layer. Then, a P+ collector layer and a collector electrode are formed on the proton-irradiated surface. The distance from a position where the net doping concentration of the N+ first buffer layer is locally maximized to the interface between the P+ collector layer and the N second buffer layer is set to be in a range of 5 μm to 30 μm, both inclusively.

公开(公告)号：US20120267681A1

公开(公告)日：2012-10-25

申请号：US13505294

申请日：2010-11-02

申请人： Michio Nemoto ,  Takashi Yoshimura

发明人： Michio Nemoto ,  Takashi Yoshimura

IPC分类号： H01L29/739 ,  H01L21/20 ,  H01L21/22 ,  H01L29/02

CPC分类号： H01L29/0611 ,  H01L21/263 ,  H01L21/268 ,  H01L21/3221 ,  H01L29/06 ,  H01L29/0684 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/36 ,  H01L29/66348 ,  H01L29/7393 ,  H01L29/7397 ,  H01L29/861 ,  H01L29/868 ,  H01L29/885

摘要： A p anode layer (2) is formed on one main surface of an n− drift layer (1). An n+ cathode layer (3) having an impurity concentration more than that of the n− drift layer (1) is formed on the other main surface of the n− drift layer (1). An anode electrode (4) is formed on the surface of the p anode layer (2). A cathode electrode (5) is formed on the surface of the n+ cathode layer (3). An n-type broad buffer region (6) that has a net doping concentration more than the bulk impurity concentration of a wafer and less than that of the n+ cathode layer (3) and the p anode layer (2) is formed in the n− drift layer (1). The resistivity ρ0 of the n− drift layer (1) satisfies 0.12V0≦ρ0≦0.25V0 with respect to a rated voltage V0. The total amount of the net doping concentration of the broad buffer region (6) is equal to or more than 4.8×1011 atoms/cm2 and equal to or less than 1.0×1012 atoms/cm2.

摘要翻译： p阳极层（2）形成在n漂移层（1）的一个主表面上。 在n漂移层（1）的另一个主表面上形成杂质浓度大于n漂移层（1）的n +阴极层（3）。 在p阳极层（2）的表面上形成阳极电极（4）。 在n +阴极层（3）的表面上形成有阴极电极（5）。 n型宽缓冲区（6）的净掺杂浓度大于晶片的体杂质浓度并且小于n +阴极层（3）和p阳极层（2）的净掺杂浓度 漂移层（1）。 相对于额定电压V0，n漂移层（1）的电阻率＆rgr0满足0.12V0＆lt; nlE;＆rgr; 0＆nlE; 0.25V0。 宽缓冲区域（6）的净掺杂浓度的总量等于或大于4.8×10 11原子/ cm 2，等于或小于1.0×10 12原子/ cm 2。