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公开(公告)号：US09857621B1
公开(公告)日：2018-01-02
申请号：US08889732
申请日：1997-07-08
Applicant: Dong-Hyo Gu , Min-Cheol Shin
Inventor： Dong-Hyo Gu , Min-Cheol Shin
IPC: G02F1/1335 , G02B3/00
CPC classification number: G02F1/133526 , G02B3/0056 , G02F1/133512 , G02F1/133621
Abstract: A liquid crystal display with a high transmittance and a low power consumption rate, includes first and second transmittable substrates, a plurality of gate and data bus lines formed on the first substrate, a plurality of color filters formed on the second substrate, and a plurality of microlenses formed on the first or second substrate corresponding to the gate and data bus lines. The microlenses are formed at positions corresponding to the gate and data bus lines which block incident lights, so that most incident lights can be transmitted. Further, the transmittance can be greatly improved by forming the microlenses at the positions corresponding to storage capacitor lines as well as the gate and data bus lines.
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2.发明申请NEGATIVE CAPACITANCE LOGIC DEVICE, CLOCK GENERATOR INCLUDING THE SAME AND METHOD OF OPERATING CLOCK GENERATOR 有权负电容逻辑器件，包括其的时钟发生器和操作时钟发生器的方法公开(公告)号：US20160211849A1
公开(公告)日：2016-07-21
申请号：US14614884
申请日：2015-02-05
Applicant: Min Cheol Shin , Jae Hyun Lee , Doo Hyung Kang , Jun Beom Seo , Woo Jin Jeong
Inventor： Min Cheol Shin , Jae Hyun Lee , Doo Hyung Kang , Jun Beom Seo , Woo Jin Jeong
IPC: H03K19/16 , H03L7/26 , H03B15/00 , H03K19/0185
CPC classification number: H03K19/16 , B82Y25/00 , G11C11/16 , H01L29/66984 , H01L43/02 , H01L43/08 , H01L43/10 , H03B15/006 , H03K19/018578
Abstract: A negative capacitance logic device includes a first field effect transistor (FET) and a second FET. The first FET is coupled between a power supply voltage and an output node, and the first FET includes a ferroelectric having a negative capacitance. The second FET is coupled between the output node and a ground voltage, and the second FET includes a ferroelectric having a negative capacitance. The negative capacitance logic differentiates an input voltage applied to an input node to provide an output voltage at the output node.
Abstract translation: 负电容逻辑器件包括第一场效应晶体管（FET）和第二FET。 第一FET耦合在电源电压和输出节点之间，并且第一FET包括具有负电容的铁电体。 第二FET耦合在输出节点和接地电压之间，第二FET包括具有负电容的铁电体。 负电容逻辑区分施加到输入节点的输入电压以在输出节点处提供输出电压。
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公开(公告)号：US20100158283A1
公开(公告)日：2010-06-24
申请号：US12507364
申请日：2009-07-22
Applicant: Hye Jin Kim , Sung Q. Lee , Min Cheol Shin , Kang Ho Park , Jong Dae Kim
Inventor： Hye Jin Kim , Sung Q. Lee , Min Cheol Shin , Kang Ho Park , Jong Dae Kim
CPC classification number: H04R17/00 , H04R1/06 , H04R31/006 , H04R2499/11
Abstract: A piezoelectric speaker and a method of manufacturing the same that can obtain a high sound pressure using a piezoelectric thin film are provided. The piezoelectric speaker includes a piezoelectric thin film, electrodes formed on an upper surface or upper and lower surfaces of the piezoelectric thin film, a damping material layer formed on the lower surface of the piezoelectric thin film, and a frame attached around at least one of the piezoelectric thin film and the damping material layer using an adhesive.
Abstract translation: 提供一种使用压电薄膜可以获得高声压的压电扬声器及其制造方法。 压电扬声器包括压电薄膜，形成在压电薄膜的上表面或上表面和下表面上的电极，形成在压电薄膜的下表面上的阻尼材料层和围绕至少一个 压电薄膜和使用粘合剂的阻尼材料层。
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4.发明申请公开(公告)号：US20100080085A1
公开(公告)日：2010-04-01
申请号：US12473214
申请日：2009-05-27
Applicant: Min Cheol SHIN , Sung Q. Lee , Sang Kyun Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim
Inventor： Min Cheol SHIN , Sung Q. Lee , Sang Kyun Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim
IPC: H04B1/02
CPC classification number: H04R1/403
Abstract: Provided is a forced acoustic dipole capable of regulating phases and acoustic pressures of first and second acoustic signals output from first and second pole speakers to freely steer the direction of an acoustic lobe. In addition, a forced acoustic multipole array is constituted by a plurality of forced acoustic dipoles. When the phases and acoustic pressures of the first and second acoustic signals output from the forced acoustic dipoles are regulated to steer an acoustic lobe in a specific direction, sound can be heard from a desired direction only without disturbing others.
Abstract translation: 提供了一种能够调节从第一和第二极扬声器输出的第一和第二声信号的相位和声压以自由地引导声波瓣的方向的强制声偶极子。 此外，强制声音多极阵列由多个强制声学偶极子构成。 当从强制声学偶极子输出的第一和第二声信号的相位和声压被调节以在特定方向上引导声波波瓣时，只能从期望的方向听到声音，而不会扰乱其它声音。
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公开(公告)号：US06323504B1
公开(公告)日：2001-11-27
申请号：US09495740
申请日：2000-02-01
Applicant: Min Cheol Shin , Seong Jae Lee , Kyoung Wan Park
Inventor： Min Cheol Shin , Seong Jae Lee , Kyoung Wan Park
IPC: H01L2906
CPC classification number: B82Y10/00 , G11C2216/08 , H01L29/7888 , Y10S977/937
Abstract: A single-electron memory device using the electron-hole Coulomb blockade is provided. A single-electron memory device in accordance with an embodiment of the present invention includes a plurality of quantum dot tunnel-junction arrays, a gate electrode, and source and drain electrodes. The plurality of quantum dot tunnel-junction arrays include at least two tunnel-junctions, are parallelly coupled to each other, and are well separated from each other to prevent single-electron tunneling between them. One of the plurality of quantum dot tunnel-junction arrays includes the gate electrode, and the voltage applied to the gate electrode can vary the number of electron-hole pairs. Each of the above-mentioned plurality of quantum dot tunnel-junction arrays includes separate source and drain electrodes where voltages are applied
Abstract translation: 提供了使用电子孔库仑封锁的单电子存储器件。 根据本发明的实施例的单电子存储器件包括多个量子点隧道结阵列，栅电极和源电极和漏电极。 多个量子点隧道结阵列包括至少两个隧道结，它们彼此平行地耦合，并且彼此相互分离以防止它们之间的单电子隧穿。 多个量子点隧道结阵列中的一个包括栅电极，并且施加到栅电极的电压可以改变电子 - 空穴对的数量。 上述多个量子点隧道结阵列中的每一个包括分别施加电压的源极和漏极
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Patent Agency Ranking
公开(公告)号：US6064451A
公开(公告)日：2000-05-16
申请号：US934770
申请日：1997-09-22
Applicant: Young Jin Oh , Kyoung Nam Lim , Dong Hyo Gu , Sang Ho Lee , Min Cheol Shin
Inventor： Young Jin Oh , Kyoung Nam Lim , Dong Hyo Gu , Sang Ho Lee , Min Cheol Shin
IPC: G02F1/136 , G02F1/1333 , G02F1/1335 , G02F1/1343 , G02F1/1362
CPC classification number: G02F1/134363 , G02F2001/136218
Abstract: A liquid crystal display device includes a first substrate including a plurality of data bus lines, a plurality of gate bus lines, and a plurality of thin film transistors at cross points of the plurality gate bus lines and the plurality of gate bus lines; a second substrate including a color filter layer; at least one shielding layer for shielding an outer induced electric field; and a liquid crystal layer sandwiched between the first substrate and the second substrate.
Abstract translation: 液晶显示装置包括在多个栅极总线和多个栅极总线的交叉点处包括多个数据总线，多个栅极总线和多个薄膜晶体管的第一基板; 第二基板，包括滤色器层; 用于屏蔽外部感应电场的至少一个屏蔽层; 以及夹在第一基板和第二基板之间的液晶层。
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7.发明授权Method and apparatus for controlling directional sound sources based on listening area 有权基于收听区域控制定向声源的方法和装置公开(公告)号：US08295500B2
公开(公告)日：2012-10-23
申请号：US12547288
申请日：2009-08-25
Applicant: Min Cheol Shin , Sung Q Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim , Se Myung Wang , Dae Sung Kim
Inventor： Min Cheol Shin , Sung Q Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim , Se Myung Wang , Dae Sung Kim
IPC: H04R29/00
CPC classification number: H04R1/403 , H04R3/12 , H04R2203/12
Abstract: Sound can be listened to only in a listening area by maximizing a sound energy difference between a listening area and a non-listening area while maximizing sound radiation efficiency of each sound source. Accordingly, realistic sound can be provided to listeners without causing auditory disturbance to third parties, and maximal sound effects can be obtained with only minimal control.
Abstract translation: 通过最大化每个声源的声音辐射效率，在收听区域和非聆听区域之间的声音能量差异，才可以在聆听区域收听声音。 因此，可以向聆听者提供逼真的声音，而不会对第三方造成听觉干扰，并且只有最小的控制才能获得最大的声音效果。
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8.发明授权公开(公告)号：US08031558B2
公开(公告)日：2011-10-04
申请号：US12473214
申请日：2009-05-27
Applicant: Min Cheol Shin , Sung Q Lee , Sang Kyun Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim
Inventor： Min Cheol Shin , Sung Q Lee , Sang Kyun Lee , Hye Jin Kim , Kang Ho Park , Jong Dae Kim
IPC: H04B1/02
CPC classification number: H04R1/403
Abstract: Provided is a forced acoustic dipole capable of regulating phases and acoustic pressures of first and second acoustic signals output from first and second pole speakers to freely steer the direction of an acoustic lobe. In addition, a forced acoustic multipole array is constituted by a plurality of forced acoustic dipoles. When the phases and acoustic pressures of the first and second acoustic signals output from the forced acoustic dipoles are regulated to steer an acoustic lobe in a specific direction, sound can be heard from a desired direction only without disturbing others.
Abstract translation: 提供了一种能够调节从第一和第二极扬声器输出的第一和第二声信号的相位和声压以自由地引导声波瓣的方向的强制声偶极子。 此外，强制声音多极阵列由多个强制声学偶极子构成。 当从强制声学偶极子输出的第一和第二声信号的相位和声压被调节以在特定方向上引导声波波瓣时，只能从期望的方向听到声音，而不会扰乱其它声音。
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9.发明授权公开(公告)号：US06323836B1
公开(公告)日：2001-11-27
申请号：US09006592
申请日：1998-01-13
Applicant: Min Cheol Shin
Inventor： Min Cheol Shin
IPC: G09G336
CPC classification number: G09G3/3688 , G09G3/3666 , G09G5/18 , G09G2352/00
Abstract: A driving circuit for driving a liquid crystal display is provided. The driving circuit includes a clock generator processing a first clock signal to output a second clock signal, the clock speed of the second clock signal being half of that of the first clock signal, a memory for storing a first video data and a second video data in accordance with the first clock signal, and a data controller for simultaneously outputting the first video data and the second video data stored in the memory in accordance with the second clock signal.
Abstract translation: 提供驱动液晶显示器的驱动电路。 驱动电路包括时钟发生器，处理第一时钟信号以输出第二时钟信号，第二时钟信号的时钟速度是第一时钟信号的时钟速度的一半;存储器，用于存储第一视频数据和第二视频数据 根据第一时钟信号，以及数据控制器，用于根据第二时钟信号同时输出存储在存储器中的第一视频数据和第二视频数据。
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10.发明授权Negative capacitance logic device, clock generator including the same and method of operating clock generator 有权负电容逻辑器件，时钟发生器包括相同的操作时钟发生器和方法公开(公告)号：US09484924B2
公开(公告)日：2016-11-01
申请号：US14614884
申请日：2015-02-05
Applicant: Min Cheol Shin , Jae Hyun Lee , Doo Hyung Kang , Jun Beom Seo , Woo Jin Jeong
Inventor： Min Cheol Shin , Jae Hyun Lee , Doo Hyung Kang , Jun Beom Seo , Woo Jin Jeong
IPC: H03K3/315 , H03L7/26 , H03K19/16 , H03K19/0185 , H03B15/00 , H01L29/66 , B82Y25/00 , H01L43/02 , G11C11/16 , H01L43/10
CPC classification number: H03K19/16 , B82Y25/00 , G11C11/16 , H01L29/66984 , H01L43/02 , H01L43/08 , H01L43/10 , H03B15/006 , H03K19/018578
Abstract: A negative capacitance logic device includes a first field effect transistor (FET) and a second FET. The first FET is coupled between a power supply voltage and an output node, and the first FET includes a ferroelectric having a negative capacitance. The second FET is coupled between the output node and a ground voltage, and the second FET includes a ferroelectric having a negative capacitance. The negative capacitance logic differentiates an input voltage applied to an input node to provide an output voltage at the output node.
Abstract translation: 负电容逻辑器件包括第一场效应晶体管（FET）和第二FET。 第一FET耦合在电源电压和输出节点之间，并且第一FET包括具有负电容的铁电体。 第二FET耦合在输出节点和接地电压之间，第二FET包括具有负电容的铁电体。 负电容逻辑区分施加到输入节点的输入电压以在输出节点处提供输出电压。
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