公开(公告)号：US20090321810A1

公开(公告)日：2009-12-31

申请号：US12476574

申请日：2009-06-02

申请人： Min-Kyung RYU ,  Byong-sun JU ,  Myoung-bum LEE ,  Seung-hyun LIM ,  Sung-hae LEE ,  Young-sun KIM

发明人： Min-Kyung RYU ,  Byong-sun JU ,  Myoung-bum LEE ,  Seung-hyun LIM ,  Sung-hae LEE ,  Young-sun KIM

IPC分类号： H01L29/788 ,  H01L29/792

CPC分类号： H01L27/11521 ,  H01L27/11519 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/513

摘要： Provided is a non-volatile memory device including; a substrate having source/drain regions and a channel region between the source/drain regions; a tunneling insulating layer formed in the channel region of the substrate; a charge storage layer formed on the tunneling insulating layer; a blocking insulating layer formed on the charge storage layer, and comprising a silicon oxide layer and a high-k dielectric layer sequentially formed; and a control gate formed on the blocking insulating layer, wherein an equivalent oxide thickness of the silicon oxide layer is equal to or greater than that of the high-k dielectric layer.

摘要翻译： 提供了一种非易失性存储器件，包括： 具有源极/漏极区域和源极/漏极区域之间的沟道区域的衬底; 形成在所述基板的沟道区域中的隧道绝缘层; 形成在隧道绝缘层上的电荷存储层; 形成在所述电荷存储层上的阻挡绝缘层，并且依次形成氧化硅层和高k电介质层; 以及形成在所述阻挡绝缘层上的控制栅极，其中所述氧化硅层的等效氧化物厚度等于或大于所述高k电介质层的氧化物厚度。

公开(公告)号：US20090159955A1

公开(公告)日：2009-06-25

申请号：US12235689

申请日：2008-09-23

申请人： Sung-hae LEE ,  Ki-yeon PARK ,  Min-Kyung RYU ,  Myoung-bum LEE ,  Jun-noh LEE

发明人： Sung-hae LEE ,  Ki-yeon PARK ,  Min-Kyung RYU ,  Myoung-bum LEE ,  Jun-noh LEE

IPC分类号： H01L29/788 ,  H01L29/792

CPC分类号： H01L29/42324 ,  B82Y10/00 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/7881 ,  H01L29/792

摘要： A nonvolatile memory device includes a semiconductor substrate, a tunneling insulation layer on the semiconductor substrate, a charge storage layer on the tunneling insulation layer, an inter-electrode insulation layer on the charge storage layer, and a control gate electrode on the inter-electrode insulation layer. The inter-electrode insulation layer includes a high-k dielectric layer having a dielectric constant greater than that of a silicon nitride, and an interfacial layer between the charge storage layer and the high-k dielectric layer. The interfacial layer includes a silicon oxynitride layer.

摘要翻译： 非易失性存储器件包括半导体衬底，半导体衬底上的隧道绝缘层，隧道绝缘层上的电荷存储层，电荷存储层上的电极间绝缘层和电极上的控制栅电极 绝缘层。 电极间绝缘层包括具有大于氮化硅的介电常数的高k电介质层，以及电荷存储层和高k电介质层之间的界面层。 界面层包括氧氮化硅层。

公开(公告)号：US07820514B2

公开(公告)日：2010-10-26

申请号：US11756427

申请日：2007-05-31

申请人： Min-kyung Ryu ,  Han-mei Choi ,  Seung-hwan Lee ,  Sun-jung Kim ,  Se-hoon Oh

发明人： Min-kyung Ryu ,  Han-mei Choi ,  Seung-hwan Lee ,  Sun-jung Kim ,  Se-hoon Oh

IPC分类号： H01L21/336

CPC分类号： H01L29/513 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/28282 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78 ,  H01L29/792

摘要： A method of forming a flash memory device can include forming a tunneling oxide film on a semiconductor substrate, forming a charge storing layer on the tunneling oxide film, forming a first blocking oxide film on the charge storing layer at a first temperature, forming a second blocking oxide film on the first blocking oxide film at a second temperature higher than the first temperature, and forming a gate electrode on the second blocking oxide film.

摘要翻译： 形成闪速存储器件的方法可以包括在半导体衬底上形成隧穿氧化膜，在隧道氧化膜上形成电荷存储层，在第一温度下在电荷存储层上形成第一阻挡氧化膜，形成第二 在高于第一温度的第二温度下在第一阻挡氧化膜上形成阻挡氧化膜，以及在第二阻挡氧化膜上形成栅电极。

公开(公告)号：US07800162B2

公开(公告)日：2010-09-21

申请号：US12235689

申请日：2008-09-23

申请人： Sung-hae Lee ,  Ki-yeon Park ,  Min-Kyung Ryu ,  Myoung-bum Lee ,  Jun-noh Lee

发明人： Sung-hae Lee ,  Ki-yeon Park ,  Min-Kyung Ryu ,  Myoung-bum Lee ,  Jun-noh Lee

IPC分类号： H01L29/94

CPC分类号： H01L29/42324 ,  B82Y10/00 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/7881 ,  H01L29/792

摘要： A nonvolatile memory device includes a semiconductor substrate, a tunneling insulation layer on the semiconductor substrate, a charge storage layer on the tunneling insulation layer, an inter-electrode insulation layer on the charge storage layer, and a control gate electrode on the inter-electrode insulation layer. The inter-electrode insulation layer includes a high-k dielectric layer having a dielectric constant greater than that of a silicon nitride, and an interfacial layer between the charge storage layer and the high-k dielectric layer. The interfacial layer includes a silicon oxynitride layer.

摘要翻译： 非易失性存储器件包括半导体衬底，半导体衬底上的隧道绝缘层，隧道绝缘层上的电荷存储层，电荷存储层上的电极间绝缘层和电极上的控制栅电极 绝缘层。 电极间绝缘层包括具有大于氮化硅的介电常数的高k电介质层，以及电荷存储层和高k电介质层之间的界面层。 界面层包括氧氮化硅层。

公开(公告)号：US20090127611A1

公开(公告)日：2009-05-21

申请号：US12120443

申请日：2008-05-14

申请人： Ki-yeon Park ,  Cha-young Yoo ,  Sung-hae Lee ,  Jun-noh Lee ,  Min-kyung Ryu

发明人： Ki-yeon Park ,  Cha-young Yoo ,  Sung-hae Lee ,  Jun-noh Lee ,  Min-kyung Ryu

IPC分类号： H01L29/792 ,  H01L29/788

CPC分类号： H01L29/513 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42324 ,  H01L29/4234

摘要： A non-volatile memory device includes a semiconductor layer including source and drain regions and a channel region between the source and drain regions; a tunneling insulating layer on the channel region of the semiconductor layer; a charge storage layer on the tunneling insulating layer; a blocking insulating layer on the charge storage layer and including a first oxide layer with a first thickness, a high-k dielectric layer, and a second oxide layer with a second thickness different from the first thickness that are stacked sequentially on the charge storage layer; and a control gate on the blocking insulating layer.

摘要翻译： 非易失性存储器件包括包括源区和漏区的半导体层和源区和漏区之间的沟道区; 在半导体层的沟道区上的隧道绝缘层; 隧道绝缘层上的电荷存储层; 电荷存储层上的阻挡绝缘层，并且包括具有第一厚度的第一氧化物层，高k电介质层和具有不同于第一厚度的第二厚度的第二氧化物层，其顺次层叠在电荷存储层上 ; 和阻挡绝缘层上的控制栅极。

公开(公告)号：US20080090353A1

公开(公告)日：2008-04-17

申请号：US11859618

申请日：2007-09-21

申请人： Ki-Yeon Park ,  Sun-Jung Kim ,  Min-Kyung Ryu ,  Seung-Hwan Lee ,  Han-Mei Choi

发明人： Ki-Yeon Park ,  Sun-Jung Kim ,  Min-Kyung Ryu ,  Seung-Hwan Lee ,  Han-Mei Choi

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A method of manufacturing a non-volatie memory device includes forming a tunnel insulating layer on a substrate, forming a conductive pattern on the tunnel insulating layer, forming a lower dielectric layer on the conductive pattern, performing a first heat treatment process to density the lower dielectric layer, and forming a middle dielectric layer having an energy band gap smaller than that of the lower dielectric layer on the first heat-treated lower dielectric layer. The method further includes forming an upper dielectric layer including a material substantially identical to that of the lower dielectric layer on the middle dielectric layer, performing a second heat treatment process to densify the middle dielectric layer and the upper dielectric layer and forming a conductive layer on the second heat-treated upper dielectric layer.

摘要翻译： 制造非挥发性记忆装置的方法包括在基板上形成隧道绝缘层，在隧道绝缘层上形成导电图案，在导电图案上形成下介电层，进行第一热处理工艺以密度较低 并且形成具有比第一经热处理的下电介质层上的下介电层的能带隙小的能带隙的中间电介质层。 该方法还包括形成上介电层，其包括与中间介电层上的下电介质层的材料基本相同的材料，执行第二热处理工艺以使中介电层和上电介质层致密并形成导电层 第二热处理的上介电层。

公开(公告)号：US20080076224A1

公开(公告)日：2008-03-27

申请号：US11756427

申请日：2007-05-31

申请人： Min-kyung Ryu ,  Han-mei Choi ,  Seung-hwan Lee ,  Sun-jung Kim ,  Se-hoon Oh

发明人： Min-kyung Ryu ,  Han-mei Choi ,  Seung-hwan Lee ,  Sun-jung Kim ,  Se-hoon Oh

IPC分类号： H01L21/336

CPC分类号： H01L29/513 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/28282 ,  H01L29/517 ,  H01L29/518 ,  H01L29/78 ,  H01L29/792

摘要： A method of forming a flash memory device can include forming a tunneling oxide film on a semiconductor substrate, forming a charge storing layer on the tunneling oxide film, forming a first blocking oxide film on the charge storing layer at a first temperature, forming a second blocking oxide film on the first blocking oxide film at a second temperature higher than the first temperature, and forming a gate electrode on the second blocking oxide film.

摘要翻译： 形成闪速存储器件的方法可以包括在半导体衬底上形成隧穿氧化膜，在隧道氧化膜上形成电荷存储层，在第一温度下在电荷存储层上形成第一阻挡氧化膜，形成第二 在高于第一温度的第二温度下在第一阻挡氧化膜上形成阻挡氧化膜，以及在第二阻挡氧化膜上形成栅电极。

公开(公告)号：US07605067B2

公开(公告)日：2009-10-20

申请号：US11859618

申请日：2007-09-21

申请人： Ki-Yeon Park ,  Sun-Jung Kim ,  Min-Kyung Ryu ,  Seung-Hwan Lee ,  Han-Mei Choi

发明人： Ki-Yeon Park ,  Sun-Jung Kim ,  Min-Kyung Ryu ,  Seung-Hwan Lee ,  Han-Mei Choi

IPC分类号： H01L21/3205

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A method of manufacturing a non-volatile memory device includes forming a tunnel insulating layer on a substrate, forming a conductive pattern on the tunnel insulating layer, forming a lower dielectric layer on the conductive pattern, performing a first heat treatment process to density the lower dielectric layer, and forming a middle dielectric layer having an energy band gap smaller than that of the lower dielectric layer on the first heat-treated lower dielectric layer. The method further includes forming an upper dielectric layer including a material substantially identical to that of the lower dielectric layer on the middle dielectric layer, performing a second heat treatment process to densify the middle dielectric layer and the upper dielectric layer and forming a conductive layer on the second heat-treated upper dielectric layer.

摘要翻译： 一种制造非易失性存储器件的方法包括在衬底上形成隧道绝缘层，在隧道绝缘层上形成导电图案，在导电图案上形成下介电层，执行第一热处理工艺以密度较低 并且形成具有比第一经热处理的下电介质层上的下介电层的能带隙小的能带隙的中间电介质层。 该方法还包括形成上介电层，其包括与中间介电层上的下电介质层的材料基本相同的材料，执行第二热处理工艺以使中介电层和上电介质层致密并形成导电层 第二热处理的上介电层。