公开(公告)号：US20140322832A1

公开(公告)日：2014-10-30

申请号：US14100651

申请日：2013-12-09

申请人： Tae-Gon KIM ,  Jong-Hoon KANG ,  Jae-Young AHN ,  Jun-Kyu YANG ,  Han-Mei CHOI ,  Ki-Hyun HWANG

发明人： Tae-Gon KIM ,  Jong-Hoon KANG ,  Jae-Young AHN ,  Jun-Kyu YANG ,  Han-Mei CHOI ,  Ki-Hyun HWANG

IPC分类号： H01L21/66 ,  H01L21/3065

CPC分类号： H01L22/12 ,  H01L21/31116 ,  H01L22/20 ,  H01L27/11582 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to example embodiments of inventive concepts, a method of fabricating a semiconductor device includes: forming a preliminary stack structure, the preliminary stack structure defining a through hole; forming a protection layer and a dielectric layer in the through hole; forming a channel pattern, a gapfill pattern, and a contact pattern in the through hole; forming an offset oxide on the preliminary stack structure; measuring thickness data of the offset oxide; and scanning the offset oxide using a reactive gas cluster ion beam. The scanning the offset oxide includes setting a scan speed based on the measured thickness data of the offset oxide, and forming a gas cluster.

摘要翻译： 根据本发明构思的示例性实施例，制造半导体器件的方法包括：形成初步叠层结构，所述预备叠层结构限定通孔; 在通孔中形成保护层和电介质层; 在通孔中形成通道图案，间隙填充图案和接触图案; 在预备堆叠结构上形成偏移氧化物; 测量偏移氧化物的厚度数据; 并使用反应性气体簇离子束扫描偏移氧化物。 扫描偏移氧化物包括基于测量的偏移氧化物的厚度数据设置扫描速度，并形成气体簇。

公开(公告)号：US08815697B2

公开(公告)日：2014-08-26

申请号：US13478450

申请日：2012-05-23

申请人： Jun-Ho Yoon ,  Bong-Jin Kuh ,  Ki-Chul Kim ,  Gyung-Jin Min ,  Tae-Jin Park ,  Sang-Ryol Yang ,  Jung-Min Oh ,  Sang-Yoon Woo ,  Young-Sub Yoo ,  Ji-Eun Lee ,  Jong-Sung Lim ,  Yong-Moon Jang ,  Han-Mei Choi ,  Je-Woo Han

发明人： Jun-Ho Yoon ,  Bong-Jin Kuh ,  Ki-Chul Kim ,  Gyung-Jin Min ,  Tae-Jin Park ,  Sang-Ryol Yang ,  Jung-Min Oh ,  Sang-Yoon Woo ,  Young-Sub Yoo ,  Ji-Eun Lee ,  Jong-Sung Lim ,  Yong-Moon Jang ,  Han-Mei Choi ,  Je-Woo Han

IPC分类号： H01L21/3213 ,  H01L27/108 ,  H01L21/285

CPC分类号： H01L28/90 ,  H01L27/10852

摘要： Provided is a method of manufacturing a semiconductor device having a capacitor. The method includes forming a composite layer, including sequentially stacking on a substrate alternating layers of first through nth sacrificial layers and first through nth supporting layers. A plurality of openings that penetrate the composite layer are formed. A lower electrode is formed in the plurality of openings. At least portions of the first through nth sacrificial layers are removed to define a support structure for the lower electrode extending between adjacent ones of the plurality of openings and the lower electrode formed therein, the support structure including the first through nth supporting layers and a gap region between adjacent ones of the first through nth supporting layers where the first through nth sacrificial layers have been removed. A dielectric layer is formed on the lower electrode and an upper electrode is formed on the dielectric layer.

摘要翻译： 提供一种制造具有电容器的半导体器件的方法。 该方法包括形成复合层，包括顺序地堆叠在第一至第n牺牲层和第一至第n支撑层上的交替层上的衬底上。 形成贯穿复合层的多个开口。 在多个开口中形成下电极。 去除第一至第n牺牲层的至少部分以限定在多个开口中相邻的开口和形成在其中的下电极之间延伸的下电极的支撑结构，支撑结构包括第一至第n支撑层和间隙 在第一至第n个支撑层中相邻的第一至第n个牺牲层已被去除之间的区域。 在下电极上形成介电层，在电介质层上形成上电极。

公开(公告)号：US20130005110A1

公开(公告)日：2013-01-03

申请号：US13478450

申请日：2012-05-23

申请人： Jun-Ho Yoon ,  Bong-Jin Kuh ,  Ki-Chul Kim ,  Gyung-Jin Min ,  Tae-Jin Park ,  Sang-Ryol Yang ,  Jung-Min Oh ,  Sang-Yoon Woo ,  Young-Sub Yoo ,  Ji-Eun Lee ,  Jong-Sung Lim ,  Yong-Moon Jang ,  Han-Mei Choi ,  Je-Woo Han

发明人： Jun-Ho Yoon ,  Bong-Jin Kuh ,  Ki-Chul Kim ,  Gyung-Jin Min ,  Tae-Jin Park ,  Sang-Ryol Yang ,  Jung-Min Oh ,  Sang-Yoon Woo ,  Young-Sub Yoo ,  Ji-Eun Lee ,  Jong-Sung Lim ,  Yong-Moon Jang ,  Han-Mei Choi ,  Je-Woo Han

IPC分类号： H01L21/02

CPC分类号： H01L28/90 ,  H01L27/10852

摘要： Provided is a method of manufacturing a semiconductor device having a capacitor. The method includes forming a composite layer, including sequentially stacking on a substrate alternating layers of first through nth sacrificial layers and first through nth supporting layers. A plurality of openings that penetrate the composite layer are formed. A lower electrode is formed in the plurality of openings. At least portions of the first through nth sacrificial layers are removed to define a support structure for the lower electrode extending between adjacent ones of the plurality of openings and the lower electrode formed therein, the support structure including the first through nth supporting layers and a gap region between adjacent ones of the first through nth supporting layers where the first through nth sacrificial layers have been removed. A dielectric layer is formed on the lower electrode and an upper electrode is formed on the dielectric layer.

摘要翻译： 提供一种制造具有电容器的半导体器件的方法。 该方法包括形成复合层，包括顺序地堆叠在第一至第n牺牲层和第一至第n支撑层上的交替层上的衬底上。 形成贯穿复合层的多个开口。 在多个开口中形成下电极。 去除第一至第n牺牲层的至少部分以限定在多个开口中相邻的开口和形成在其中的下电极之间延伸的下电极的支撑结构，支撑结构包括第一至第n支撑层和间隙 在第一至第n个支撑层中相邻的第一至第n个牺牲层已被去除之间的区域。 在下电极上形成介电层，在电介质层上形成上电极。

公开(公告)号：US08294198B2

公开(公告)日：2012-10-23

申请号：US12704312

申请日：2010-02-11

申请人： Dong-Chul Yoo ,  Eun-Ha Lee ,  Byong-Ju Kim ,  Hyung-Ik Lee ,  Sung Heo ,  Han-Mei Choi ,  Chan-Hee Park ,  Ki-Hyun Hwang

发明人： Dong-Chul Yoo ,  Eun-Ha Lee ,  Byong-Ju Kim ,  Hyung-Ik Lee ,  Sung Heo ,  Han-Mei Choi ,  Chan-Hee Park ,  Ki-Hyun Hwang

IPC分类号： H01L29/72

CPC分类号： H01L29/792 ,  H01L21/7605 ,  H01L21/7607 ,  H01L21/76224 ,  H01L27/11565 ,  H01L27/11568 ,  H01L29/4234

摘要： A semiconductor integrated circuit device is provided. The semiconductor integrated circuit device includes a plurality of isolation regions which are formed within a semiconductor substrate and define active regions. A tunnel layer and a trap seed layer are formed in each of the active regions and are sequentially stacked between the isolation regions. A trap layer is formed on the trap seed layer and protrudes further than a top surface of each of the isolation regions. A blocking layer is formed on the trap layer. A gate electrode is formed on the blocking layer.

摘要翻译： 提供了一种半导体集成电路器件。 半导体集成电路器件包括形成在半导体衬底内并限定有源区的多个隔离区。 在每个有源区域中形成隧道层和陷阱种子层，并且依次堆叠在隔离区域之间。 陷阱层形成在捕获种子层上并且比每个隔离区的顶表面更突出。 在捕获层上形成阻挡层。 在阻挡层上形成栅电极。

公开(公告)号：US20120098139A1

公开(公告)日：2012-04-26

申请号：US13246152

申请日：2011-09-27

申请人： Soo-Doo Chae ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Dong-Chul Yoo

发明人： Soo-Doo Chae ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Dong-Chul Yoo

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L27/11582 ,  H01L29/7926

摘要： A vertical memory device includes a channel, a ground selection line (GSL), word lines, a string selection line (SSL), and a contact. The channel includes a vertical portion and a horizontal portion. The vertical portion extends in a first direction substantially perpendicular to a top surface of a substrate, and the horizontal portion is connected to the vertical portion and parallel to the top surface of the substrate. The GSL, the word lines and the SSL are formed on a sidewall of the vertical portion of the channel sequentially in the first direction, and are spaced apart from each other. The contact is on the substrate and electrically connected to the horizontal portion of the channel.

摘要翻译： 垂直存储器件包括通道，接地选择线（GSL），字线，字符串选择线（SSL）和触点。 通道包括垂直部分和水平部分。 垂直部分在基本上垂直于基板的顶表面的第一方向上延伸，并且水平部分连接到垂直部分并且平行于基板的顶表面。 GSL，字线和SSL沿着第一方向依次形成在通道的垂直部分的侧壁上，并且彼此间隔开。 触点位于基板上并电连接到通道的水平部分。

公开(公告)号：US07927950B2

公开(公告)日：2011-04-19

申请号：US11672916

申请日：2007-02-08

申请人： Han-Mei Choi ,  Chang-Hyun Lee ,  Seung-Hwan Lee ,  Young-Geun Park ,  Sung-Jung Kim ,  Young-Sun Kim

发明人： Han-Mei Choi ,  Chang-Hyun Lee ,  Seung-Hwan Lee ,  Young-Geun Park ,  Sung-Jung Kim ,  Young-Sun Kim

IPC分类号： H01L21/336

CPC分类号： H01L21/823462 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11568 ,  H01L27/11573

摘要： A method of fabricating a floating trap type nonvolatile memory device includes forming a cell gate insulating layer on a semiconductor substrate, the cell gate insulating layer being comprised of a lower insulating layer, a charge storage layer and an upper insulating layer sequentially stacked; thermally annealing the cell gate insulating Layer at a temperature of approximately 810° C. to approximately 1370° C.; and forming a gate electrode on the thermally annealed cell gate insulating layer.

摘要翻译： 一种制造浮动阱型非易失性存储器件的方法包括：在半导体衬底上形成单元栅极绝缘层，所述栅极绝缘层由下层绝缘层，电荷存储层和上部绝缘层构成; 在大约810℃至大约137​​0℃的温度下对单元栅极绝缘层进行热退火; 以及在所述热退火单元栅极绝缘层上形成栅电极。

公开(公告)号：US07790591B2

公开(公告)日：2010-09-07

申请号：US12270014

申请日：2008-11-13

申请人： Dong-chul Yoo ,  Myoung-bum Lee ,  Young-geun Park ,  Han-mei Choi ,  Se-hoon Oh ,  Byong-ju Kim ,  Kyong-won An ,  Seon-ho Jo

发明人： Dong-chul Yoo ,  Myoung-bum Lee ,  Young-geun Park ,  Han-mei Choi ,  Se-hoon Oh ,  Byong-ju Kim ,  Kyong-won An ,  Seon-ho Jo

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L21/31616 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/3142 ,  H01L21/3145 ,  H01L21/31604

摘要： Methods of manufacturing a semiconductor device are provided including forming a charge storage layer on a gate insulating layer that is on a semiconductor substrate. A blocking insulating layer is formed on the charge storage layer and an electrode layer is formed on the blocking insulating layer. The blocking insulating layer may be formed by forming a lower metal oxide layer at a first temperature and forming an upper metal oxide layer on the lower metal oxide layer at a second temperature, lower than the first temperature.

摘要翻译： 提供了制造半导体器件的方法，包括在半导体衬底上的栅极绝缘层上形成电荷存储层。 在电荷存储层上形成阻挡绝缘层，在隔离绝缘层上形成电极层。 阻挡绝缘层可以通过在第一温度下形成下部金属氧化物层并在低于第一温度的第二温度下在下部金属氧化物层上形成上部金属氧化物层而形成。

公开(公告)号：US07646056B2

公开(公告)日：2010-01-12

申请号：US11375762

申请日：2006-03-15

申请人： Han-Mei Choi ,  Kyoung-Ryul Yoon ,  Seung-Hwan Lee ,  Ki-Yeon Park ,  Young-Sun Kim

发明人： Han-Mei Choi ,  Kyoung-Ryul Yoon ,  Seung-Hwan Lee ,  Ki-Yeon Park ,  Young-Sun Kim

IPC分类号： H01L29/792

CPC分类号： H01L29/792 ,  H01L29/513

摘要： In a gate structure of a non-volatile memory device is formed, a tunnel insulating layer and a charge trapping layer are formed on a substrate. A composite dielectric layer is formed on the charge trapping layer and has a laminate structure in which first material layers including aluminum oxide and second material layers including hafnium oxide or zirconium oxide are alternately stacked. A conductive layer is formed on the composite dielectric layer and then a gate structure is formed by patterning the conductive layer, the composite dielectric layer, the charge trapping layer, and the tunnel insulating layer.

摘要翻译： 在形成非易失性存储器件的栅极结构中，在衬底上形成隧道绝缘层和电荷俘获层。 在电荷捕获层上形成复合电介质层，并且具有层叠结构，其中包括氧化铝的第一材料层和包括氧化铪或氧化锆的第二材料层交替堆叠。 在复合电介质层上形成导电层，然后通过图案化导电层，复合介电层，电荷俘获层和隧道绝缘层形成栅极结构。

公开(公告)号：US07566608B2

公开(公告)日：2009-07-28

申请号：US11285555

申请日：2005-11-22

申请人： Dae-Sik Choi ,  Kyoung-Ryul Yoon ,  Han-Mei Choi ,  Ki-Yeon Park ,  Seung-Hwan Lee ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo

发明人： Dae-Sik Choi ,  Kyoung-Ryul Yoon ,  Han-Mei Choi ,  Ki-Yeon Park ,  Seung-Hwan Lee ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo

IPC分类号： H01L21/8238

CPC分类号： H01L21/02205 ,  C23C16/405 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/02194 ,  H01L21/28194 ,  H01L21/28273 ,  H01L21/3142 ,  H01L21/31641 ,  H01L21/31645 ,  H01L27/11521 ,  H01L29/4933 ,  H01L29/517 ,  H01L29/78

摘要： Methods of forming a zirconium hafnium oxide thin layer on a semiconductor substrate by supplying tetrakis(ethylmethylamino)zirconium ([Zr{N(C2H5)(CH3)}4], TEMAZ) and tetrakis(ethylmethylamino)hafnium ([Hf{N(C2H5)(CH3)}4], TEMAH) to a substrate are provided. The TEMAZ and the TEMAH may be reacted with an oxidizing agent. The thin layer including zirconium hafnium oxide may be used for a gate insulation layer in a gate structure, a dielectric layer in a capacitor, or a dielectric layer in a flash memory device.

摘要翻译： 通过供应四（乙基甲基氨基）锆（[Zr（N（C 2 H 5）（CH 3）} 4]，TEMAZ）和四（乙基甲基氨基）铪（[Hf（N（C 2 H 5））的方式在半导体衬底上形成氧化锆铪薄膜 ）（CH 3）} 4]，TEMAH）。 TEMAZ和TEMAH可与氧化剂反应。 包括氧化铪的薄层可以用于栅极结构中的栅极绝缘层，电容器中的电介质层或闪存器件中的介电层。

公开(公告)号：US20090050210A1

公开(公告)日：2009-02-26

申请号：US12258818

申请日：2008-10-27

申请人： Han-Mei Choi ,  Thomas Jongwon Kwon ,  Jae-Soon Lim ,  Ki-Chul Kim ,  Sung-Tae Kim ,  Young-Sun Kim

发明人： Han-Mei Choi ,  Thomas Jongwon Kwon ,  Jae-Soon Lim ,  Ki-Chul Kim ,  Sung-Tae Kim ,  Young-Sun Kim

IPC分类号： G05D7/06 ,  B01F3/04 ,  G05D11/00

CPC分类号： C23C16/448 ,  B01B1/005 ,  B01J4/02 ,  B01J2219/0011 ,  B01J2219/00164 ,  C23C16/45561 ,  Y10T137/0329 ,  Y10T436/2575

摘要： Liquid chemical delivery systems are provided which include a liquid chemical storage canister, a pressurized gas source that feeds a pressurized gas into the storage canister, a vaporizer that may be used to vaporize the liquid chemical supplied from the storage canister, a delivery line that connects the storage canister to the vaporizer, a liquid mass flow controller that controls the flow rate of the liquid chemical through the delivery line, a reaction chamber that is connected to the vaporizer, and a liquid chemical recycling element that collects at least some of the chemical flowing through the system during periods when the liquid chemical delivery system is isolated from the reaction chamber.

摘要翻译： 提供了液体化学输送系统，其包括液体化学品储存罐，将加压气体进料到储存罐中的加压气体源，可用于蒸发从储存罐供应的液体化学品的蒸发器，连接 储存罐到蒸发器，液体质量流量控制器，其通过输送管线控制液体化学品的流速;连接到蒸发器的反应室;以及液体化学品循环元件，其收集至少一些化学物质 在液体化学品输送系统与反应室隔离的期间流经系统。