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    Method and apparatus of forming a sputtered doped seed layer
    1.
    发明授权
    Method and apparatus of forming a sputtered doped seed layer 失效
    形成溅射掺杂种子层的方法和装置

    公开(公告)号：US06432819B1

    公开(公告)日：2002-08-13

    申请号：US09406325

    申请日：1999-09-27

    申请人： Vikram Pavate ,  Murali Narasimhan

    发明人： Vikram Pavate ,  Murali Narasimhan

    IPC分类号： H01L2144

    CPC分类号： H01L21/76873 ,  H01L21/2855 ,  H01L21/76843 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention generally provides a method and apparatus for forming a doped layer on a substrate to improve uniformity of subsequent deposition thereover. Preferably, the layer is deposited by a sputtering process, such as physical vapor deposition (PVD) or Ionized Metal Plasma (IMP) PVD, using a doped target of conductive material. Preferably, the conductive material, such as copper, is alloyed with a dopant, such as phosphorus, boron, indium, tin, beryllium, or combinations thereof, to improve deposition uniformity of the doped layer over the substrate surface and to reduce oxidation of the conductive material. It is believed that the addition of a dopant, such as phosphorus, stabilizes the conductive material surface, such as a copper surface, and lessens the surface diffusivity of the conductive material. The overall surface diffusivity of copper is reduced such that the tendency to agglomerate or to become discontinuous is reduced, thereby allowing the deposition of a smoother conductive film and thereby reducing localized agglomeration of the conductive material. The smoother film is highly desirable for subsequent deposition processes. A conductive material, such as copper, can be deposited on the deposited doped layer by a variety of processes including PVD, chemical vapor deposition (CVD), electroplating, electroless deposition and other deposition processes.

    摘要翻译： 本发明通常提供了一种用于在衬底上形成掺杂层的方法和装置，以改善其后续沉积的均匀性。 优选地，通过使用导电材料的掺杂靶的溅射工艺，诸如物理气相沉积（PVD）或离子化金属等离子体（IMP）PVD沉积该层。 优选地，诸如铜的导电材料与诸如磷，硼，铟，锡，铍或其组合的掺杂剂合金化，以改善掺杂层在衬底表面上的沉积均匀性并减少氧化 导电材料。 据信，诸如磷的掺杂剂的添加稳定了诸如铜表面的导电材料表面，并且减小了导电材料的表面扩散率。 铜的整个表面扩散率降低，使得凝聚或变得不连续的趋势减小，从而允许沉积更平滑的导电膜，从而减少导电材料的局部聚集。 对于随后的沉积工艺，更平滑的膜是非常需要的。 诸如铜的导电材料可以通过包括PVD，化学气相沉积（CVD），电镀，无电沉积和其它沉积工艺的各种工艺沉积在沉积的掺杂层上。

    Target for use in magnetron sputtering of aluminum for forming metallization films having low defect densities and methods for manufacturing and using such target
    2.
    发明授权
    Target for use in magnetron sputtering of aluminum for forming metallization films having low defect densities and methods for manufacturing and using such target 有权
    用于用于形成具有低缺陷密度的金属化膜的铝的磁控溅射的目标以及用于制造和使用该靶的方法

    公开(公告)号：US06171455B2

    公开(公告)日：2001-01-09

    申请号：US09419712

    申请日：1999-10-14

    申请人： Vikram Pavate ,  Keith J. Hansen ,  Glen Mori ,  Murali Narasimhan ,  Seshadri Ramaswami ,  Jaim Nulman

    发明人： Vikram Pavate ,  Keith J. Hansen ,  Glen Mori ,  Murali Narasimhan ,  Seshadri Ramaswami ,  Jaim Nulman

    IPC分类号： C23C1434

    CPC分类号： C23C14/3414 ,  Y10S29/002 ,  Y10S29/005 ,  Y10T29/49988

    摘要： Improved targets for use in DC_magnetron sputtering of aluminum or like metals are disclosed for forming metallization films having low defect densities. Methods for manufacturing and using such targets are also disclosed. Conductivity anomalies such as those composed of metal oxide inclusions can induce arcing between the target surface and the plasma. The arcing can lead to production of excessive deposition material in the form of splats or blobs. Reducing the content of conductivity anomalies and strengthening the to-be-deposited material is seen to reduce production of such splats or blobs. Other splat limiting steps include smooth finishing of the target surface and low-stress ramp up of the plasma.

    摘要翻译： 公开了用于形成具有低缺陷密度的金属化膜的改进的用于铝或类似金属的DC_磁控溅射的靶。 还公开了制造和使用这些靶的方法。 诸如由金属氧化物夹杂物组成的电导率异常可以引起目标表面和等离子体之间的电弧。 电弧会导致过剩的沉积材料以斑块或斑点的形式产生。 减少电导率异常的含量和加强待沉积材料可以减少这种斑块或斑点的产生。 其它限制步骤包括平滑地对目标表面进行精加工和等离子体的低应力升高。

    Copper target for sputter deposition
    3.
    发明授权
    Copper target for sputter deposition 有权
    用于溅射沉积的铜靶

    公开(公告)号：US6139701A

    公开(公告)日：2000-10-31

    申请号：US272974

    申请日：1999-03-18

    申请人： Vikram Pavate ,  Seshadri Ramaswami ,  Murali Abburi ,  Murali Narasimhan

    发明人： Vikram Pavate ,  Seshadri Ramaswami ,  Murali Abburi ,  Murali Narasimhan

    IPC分类号： C22C9/00 ,  C23C14/34 ,  H01L21/203 ,  H01L21/28 ,  H01L21/285

    CPC分类号： C23C14/3414

    摘要： A copper sputtering target is provided for producing copper films having reduced in-film defect densities. In addition to reducing dielectric inclusion content of the copper target material, the hardness of the copper target is maintained within a range greater than 45 Rockwell. Within this range defect generation from arc-induced mechanical failure is reduced. Preferably hardness is achieved by limiting grain size to less than 50 microns, and most preferably to less than 25 microns. The surface roughness preferably is limited to less than 20 micro inches, or more preferably, less than 5 micro inches to reduce defect generation from field-enhanced emission. This grain size range preferably is achieved by limiting the purity level of the copper target material to a level less than 99.9999%, preferably within a range between 99.995% to 99.9999%, while reducing particular impurity levels.

    摘要翻译： 提供一种铜溅射靶，用于制造薄膜缺陷密度降低的铜膜。 除了降低铜靶材料的电介质夹杂物含量外，铜靶的硬度保持在大于45的洛氏硬度范围内。 在此范围内，电弧引起的机械故障的缺陷产生减少。 优选地，通过将​​晶粒尺寸限制为小于50微米，最优选小于25微米来实现硬度。 表面粗糙度优选限于小于20微英寸，或更优选小于5微英寸，以减少场增强发射的缺陷产生。 该粒度范围优选通过将铜靶材料的纯度水平限制在小于99.9999％，优选在99.995％至99.9999％之间的范围内，同时降低特定杂质水平来实现。

    METHODS FOR CONTACT CLEAN
    5.
    发明申请
    METHODS FOR CONTACT CLEAN 有权
    联系清洁方法

    公开(公告)号：US20120225558A1

    公开(公告)日：2012-09-06

    申请号：US13411398

    申请日：2012-03-02

    申请人： MEI CHANG ,  Linh Thanh ,  Bo Zheng ,  Arvind Sundarrajan ,  John C. Forster ,  Umesh M. Kellkar ,  Murali Narasimhan

    发明人： MEI CHANG ,  Linh Thanh ,  Bo Zheng ,  Arvind Sundarrajan ,  John C. Forster ,  Umesh M. Kellkar ,  Murali Narasimhan

    IPC分类号： H01L21/311 ,  H01L21/3105

    CPC分类号： H01L21/02063 ,  H01L21/76802 ,  H01L21/76814 ,  H01L21/76829

    摘要： Methods and apparatus for removing oxide from a surface, the surface comprising at least one of silicon and germanium, are provided. The method and apparatus are particularly suitable for removing native oxide from a metal silicide layer of a contact structure. The method and apparatus advantageously integrate both the etch stop layer etching process and the native oxide removal process in a single chamber, thereby eliminating native oxide growth or other contaminates redeposit during the substrate transfer processes. Furthermore, the method and the apparatus also provides the improved three-step chemical reaction process to efficiently remove native oxide from the metal silicide layer without adversely altering the geometry of the contact structure and the critical dimension of the trenches or vias formed in the contact structure.

    摘要翻译： 提供了从表面除去氧化物的方法和装置，所述表面包括硅和锗中的至少一种。 所述方法和装置特别适用于从接触结构的金属硅化物层去除天然氧化物。 该方法和装置有利地将蚀刻停止层蚀刻工艺和自然氧化物去除工艺集成在单个室中，从而在衬底转移过程期间消除自然氧化物生长或其它污染物再沉积。 此外，该方法和设备还提供了改进的三步化学反应过程，以有效地从金属硅化物层去除天然氧化物，而不会不利地改变接触结构的几何形状和形成在接触结构中的沟槽或通孔的临界尺寸 。

    Shield to prevent cryopump charcoal array from shedding during cryo-regeneration
    6.
    发明授权
    Shield to prevent cryopump charcoal array from shedding during cryo-regeneration 失效
    防止低温泵木炭阵列在冷冻再生过程中脱落

    公开(公告)号：US6122921A

    公开(公告)日：2000-09-26

    申请号：US233393

    申请日：1999-01-19

    申请人： Thomas Brezoczky ,  Murali Narasimhan

    发明人： Thomas Brezoczky ,  Murali Narasimhan

    IPC分类号： B01J3/02 ,  B01J20/20 ,  C23C14/00 ,  F04B37/08 ,  B01D8/00

    CPC分类号： F04B37/085

    摘要： The present invention provides a regeneration shield 22 for a vacuum system, typically used in the processing of integrated circuits. The regeneration shield protects fragile arrays 13, having a dislocatable material 16, such as charcoal, in a high vacuum pump 4 from volatile regeneration gases, which impinge the fragile material on the array and dislocate that material to cause pumping inefficiencies and scrap. The shield may be planar, concave, or convex and may have sides. The shield may also have inwardly and outwardly extending flanges.

    摘要翻译： 本发明提供一种用于真空系统的再生屏蔽22，其通常用于集成电路的处理。 再生屏蔽保护脆性阵列13，其具有位于高真空泵4中的易挥发物质16（例如木炭）的易挥发的再生气体，其将脆性材料撞击在阵列上并使该材料脱位以引起泵低效率和废料。 屏蔽可以是平面的，凹的或凸的，并且可以具有侧面。 护罩还可具有向内和向外延伸的凸缘。

    BEOL Interconnect With Carbon Nanotubes
    9.
    发明申请
    BEOL Interconnect With Carbon Nanotubes 有权
    BEOL与碳纳米管互连

    公开(公告)号：US20130228933A1

    公开(公告)日：2013-09-05

    申请号：US13601963

    申请日：2012-08-31

    申请人： Pravin K. Narwankar ,  Joe Griffith Cruz ,  Arvind Sundarrajan ,  Murali Narasimhan ,  Subbalakshmi Sreekala ,  Victor Pushparaj

    发明人： Pravin K. Narwankar ,  Joe Griffith Cruz ,  Arvind Sundarrajan ,  Murali Narasimhan ,  Subbalakshmi Sreekala ,  Victor Pushparaj

    IPC分类号： H01L21/768 ,  H01L23/538

    CPC分类号： H01L21/76877 ,  A61K8/46 ,  A61K8/8182 ,  A61K2800/884 ,  A61Q9/04 ,  B82Y40/00 ,  H01L21/76843 ,  H01L23/5384 ,  H01L29/413 ,  H01L2924/0002 ,  Y10S977/742 ,  H01L2924/00

    摘要： An integrated circuit with BEOL interconnects may comprise: a substrate including a semiconductor device; a first layer of dielectric over the surface of the substrate, the first layer of dielectric including a filled via for making electrical contact to the semiconductor device; and a second layer of dielectric on the first layer of dielectric, the second layer of dielectric including a trench running perpendicular to the longitudinal axis of the filled via, the trench being filled with an interconnect line, the interconnect line comprising cross-linked carbon nanotubes and being physically and electrically connected to the filled via. Cross-linked CNTs are grown on catalyst particles on the bottom of the trench using growth conditions including a partial pressure of precursor gas greater than the transition partial pressure at which carbon nanotube growth transitions from a parallel carbon nanotube growth mode to a cross-linked carbon nanotube growth mode.

    摘要翻译： 具有BEOL互连的集成电路可以包括：包括半导体器件的衬底; 在所述衬底的表面上的第一层电介质，所述第一层电介质包括用于与所述半导体器件电接触的填充通孔; 以及在所述第一介电层上的第二电介质层，所述第二介电层包括垂直于所述填充通孔的纵向轴线延伸的沟槽，所述沟槽填充有互连线，所述互连线包含交联的碳纳米管 并且物理地和电连接到填充的通孔。 使用包括前体气体分压大于碳纳米管生长从平行碳纳米管生长模式转变为交联碳的过渡分压的生长条件，将交联的CNT生长在沟槽底部的催化剂颗粒上 纳米管生长模式。