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    Methods of forming variable resistive memory devices
    1.
    发明授权
    Methods of forming variable resistive memory devices 有权
    形成可变电阻式存储器件的方法

    公开(公告)号：US08765564B2

    公开(公告)日：2014-07-01

    申请号：US13495529

    申请日：2012-06-13

    Applicant: Myung Jin Kang

    Inventor： Myung Jin Kang

    IPC: H01L21/20 ,  H01L45/00

    CPC classification number: H01L45/1683 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2445 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1608

    Abstract: A method of forming a variable resistive memory device includes forming a conductive pattern that alternates with a first insulation pattern along a first direction on a substrate that is parallel with a surface of the substrate, forming a preliminary sacrificial pattern on the conductive pattern that contacts a sidewall of the first insulation pattern, etching the conductive pattern using the preliminary sacrificial pattern as an etch masks to form a preliminary bottom electrode pattern, patterning the preliminary sacrificial pattern and the preliminary bottom electrode pattern to form a sacrificial pattern and a bottom electrode pattern that each include at least two portions which are separated from each other along a second direction intersecting the first direction, and replacing the sacrificial pattern with a variable resistive pattern.

    Abstract translation: 一种形成可变电阻式存储器件的方法包括：在与衬底的表面平行的衬底上沿第一方向形成与第一绝缘图案交替的导电图案，在与衬底的表面平行的衬底上形成初步牺牲图案， 第一绝缘图案的侧壁，使用预备牺牲图案蚀刻导电图案作为蚀刻掩模以形成初步底部电极图案，图案化初步牺牲图案和预备底部电极图案以形成牺牲图案和底部电极图案， 每个包括沿着与第一方向相交的第二方向彼此分离的至少两个部分，并且以可变电阻图案替换牺牲图案。

    Methods of forming variable-resistance memory devices and devices formed thereby
    5.
    发明授权
    Methods of forming variable-resistance memory devices and devices formed thereby 有权
    形成可变电阻存储器件和由此形成的器件的方法

    公开(公告)号：US08598010B2

    公开(公告)日：2013-12-03

    申请号：US13090553

    申请日：2011-04-20

    Applicant: Heung Jin Joo ,  JaeHee Oh ,  Byoungjae Bae ,  Myung Jin Kang

    Inventor： Heung Jin Joo ,  JaeHee Oh ,  Byoungjae Bae ,  Myung Jin Kang

    IPC: H01L21/02

    CPC classification number: H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/1683

    Abstract: Methods of forming a variable-resistance memory device include patterning an interlayer dielectric layer to define an opening therein that exposes a bottom electrode of a variable-resistance memory cell, on a memory cell region of a substrate (e.g., semiconductor substrate). These methods further include depositing a layer of variable-resistance material (e.g., phase-changeable material) onto the exposed bottom electrode in the opening and onto a first portion of the interlayer dielectric layer extending opposite a peripheral circuit region of the substrate. The layer of variable-resistance material and the first portion of the interlayer dielectric layer are then selectively etched in sequence to define a recess in the interlayer dielectric layer. The layer of variable-resistance material and the interlayer dielectric layer are then planarized to define a variable-resistance pattern within the opening.

    Abstract translation: 形成可变电阻存储器件的方法包括图案化层间电介质层以限定其中可露出可变电阻存储单元的底部电极的开口，在衬底（例如，半导体衬底）的存储单元区域上。 这些方法还包括在开口中的暴露的底部电极上沉​​积可变电阻材料层（例如，相变材料），并且延伸到与衬底的外围电路区域相对延伸的层间电介质层的第一部分上。 然后依次选择性地蚀刻可变电阻材料层和层间电介质层的第一部分，以在层间介质层中限定凹陷。 然后将可变电阻材料层和层间电介质层平坦化，以在开口内限定可变电阻图案。

    Non-volatile memory device including phase-change material
    6.
    发明授权
    Non-volatile memory device including phase-change material 有权
    包括相变材料的非易失性存储器件

    公开(公告)号：US08237141B2

    公开(公告)日：2012-08-07

    申请号：US12657345

    申请日：2010-01-19

    Applicant: Myung-jin Kang ,  Jun-soo Bae ,  Doo-hwan Park ,  Eun-hee Cho

    Inventor： Myung-jin Kang ,  Jun-soo Bae ,  Doo-hwan Park ,  Eun-hee Cho

    IPC: H01L45/00

    CPC classification number: H01L45/141 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/144

    Abstract: A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by InXSbYTeZ or, alternatively, with substitutions of silicon and/or tin for indium, arsenic and/or bismuth for antimony, and selenium for tellurium; and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer.

    Abstract translation: 包括具有低工作电压和低功耗的相变材料的非易失性存储器件包括下电极; 相变材料层，形成在下电极上以与下电极电连接，其中相变材料层包括具有由InXSbYTeZ表示的组成的相变材料，或者替代地，硅和 /或锡用于铟，砷和/或锑的锑，硒用于碲; 以及形成在所述相变材料层上以与所述相变材料层电连接的上电极。

    Phase change memory devices and methods of manufacturing the same
    7.
    发明授权
    Phase change memory devices and methods of manufacturing the same 有权
    相变存储器件及其制造方法

    公开(公告)号：US08824187B2

    公开(公告)日：2014-09-02

    申请号：US13487567

    申请日：2012-06-04

    Applicant: Tae-Jin Park ,  Ki-Hoon Do ,  Myung-Jin Kang

    Inventor： Tae-Jin Park ,  Ki-Hoon Do ,  Myung-Jin Kang

    IPC: H01L21/782 ,  G11C11/21 ,  H01L27/10

    CPC classification number: H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1293 ,  H01L45/141 ,  H01L45/144 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1675

    Abstract: A phase change memory device includes a plurality of word lines, a plurality of lower electrodes, and a plurality of phase change material patterns. The plurality of word lines extend in a first direction and the plurality of word lines are arranged along a second direction perpendicular to the first direction. The lower electrodes are on the word lines and the lower electrodes are arranged in a direction diagonal to the first direction by a first angle. Each of the plurality of phase change material patterns are on a corresponding one of the plurality of lower electrodes.

    Abstract translation: 相变存储器件包括多个字线，多个下电极和多个相变材料图案。 多个字线沿着第一方向延伸，并且多个字线沿着垂直于第一方向的第二方向布置。 下电极位于字线上，下电极沿与第一方向对角的方向排列第一角度。 多个相变材料图案中的每一个在多个下电极中的相应一个上。

    PHASE CHANGE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME
    8.
    发明申请
    PHASE CHANGE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 有权
    相变存储器件及其制造方法

    公开(公告)号：US20130105757A1

    公开(公告)日：2013-05-02

    申请号：US13487567

    申请日：2012-06-04

    Applicant: Tae-Jin PARK ,  Ki-Hoon DO ,  Myung-Jin KANG

    Inventor： Tae-Jin PARK ,  Ki-Hoon DO ,  Myung-Jin KANG

    IPC: H01L45/00 ,  H01L21/8239

    CPC classification number: H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1293 ,  H01L45/141 ,  H01L45/144 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1675

    Abstract: A phase change memory device includes a plurality of word lines, a plurality of lower electrodes, and a plurality of phase change material patterns. The plurality of word lines extend in a first direction and the plurality of word lines are arranged along a second direction perpendicular to the first direction. The lower electrodes are on the word lines and the lower electrodes are arranged in a direction diagonal to the first direction by a first angle. Each of the plurality of phase change material patterns are on a corresponding one of the plurality of lower electrodes.

    Abstract translation: 相变存储器件包括多个字线，多个下电极和多个相变材料图案。 多个字线沿着第一方向延伸，并且多个字线沿着垂直于第一方向的第二方向布置。 下电极位于字线上，下电极沿与第一方向对角的方向排列第一角度。 多个相变材料图案中的每一个在多个下电极中的相应一个上。

    Non-volatile memory device including phase-change material
    9.
    发明申请
    Non-volatile memory device including phase-change material 有权
    包括相变材料的非易失性存储器件

    公开(公告)号：US20110049457A1

    公开(公告)日：2011-03-03

    申请号：US12657345

    申请日：2010-01-19

    Applicant: Myung-jin Kang ,  Jun-soo Bae ,  Doo-hwan Park ,  Eun-hee Cho

    Inventor： Myung-jin Kang ,  Jun-soo Bae ,  Doo-hwan Park ,  Eun-hee Cho

    IPC: H01L45/00

    CPC classification number: H01L45/141 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/144

    Abstract: A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by InXSbYTeZ or, alternatively, with substitutions of silicon and/or tin for indium, arsenic and/or bismuth for antimony, and selenium for tellurium; and an upper electrode formed on the phase-change material layer so as to be electrically connected to the phase-change material layer.

    Abstract translation: 包括具有低工作电压和低功耗的相变材料的非易失性存储器件包括下电极; 相变材料层，形成在下电极上以与下电极电连接，其中相变材料层包括具有由InXSbYTeZ表示的组成的相变材料，或者替代地，硅和 /或锡用于铟，砷和/或锑的锑，硒用于碲; 以及形成在所述相变材料层上以与所述相变材料层电连接的上电极。

    PHASE CHANGE MEMORY DEVICE
    10.
    发明申请
    PHASE CHANGE MEMORY DEVICE 审中-公开
    相变存储器件

    公开(公告)号：US20110031461A1

    公开(公告)日：2011-02-10

    申请号：US12910672

    申请日：2010-10-22

    Applicant: Myung-Jin KANG ,  Yong-Ho HA ,  Doo-Hwan PARK ,  Jeong-Hee PARK ,  Hee-Ju SHIN

    Inventor： Myung-Jin KANG ,  Yong-Ho HA ,  Doo-Hwan PARK ,  Jeong-Hee PARK ,  Hee-Ju SHIN

    IPC: H01L45/00

    CPC classification number: G11C11/5678 ,  G11C13/0004 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/1683 ,  Y10T428/24273

    Abstract: A method of fabricating a phase change memory device includes forming an opening in a first layer, forming a phase change material in the opening and on the first layer, heating the phase change material to a first temperature that is sufficient to reflow the phase change material in the opening, wherein the first temperature is less than a melting point of the phase change material, and, after heating the phase change material to the first temperature, patterning the phase change material to define a phase change element in the opening.

    Abstract translation: 一种制造相变存储器件的方法包括在第一层中形成开口，在开口和第一层上形成相变材料，将相变材料加热至足以使相变材料回流的第一温度 在所述开口中，其中所述第一温度小于所述相变材料的熔点，并且在将所述相变材料加热到所述第一温度之后，对所述相变材料进行图案化以在所述开口中限定相变元件。

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