公开(公告)号：US08980656B2

公开(公告)日：2015-03-17

申请号：US13503123

申请日：2010-10-14

Applicant: Xiuling Li ,  Nicholas X. Fang ,  Placid M. Ferreira ,  Winston Chern ,  Ik Su Chun ,  Keng Hao Hsu

Inventor： Xiuling Li ,  Nicholas X. Fang ,  Placid M. Ferreira ,  Winston Chern ,  Ik Su Chun ,  Keng Hao Hsu

IPC: H01L21/00 ,  H01L21/308 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/06

CPC classification number: H01L21/3081 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/3086 ,  H01L29/0676 ,  Y10S977/893

Abstract: A new method for forming an array of high aspect ratio semiconductor nanostructures entails positioning a surface of a stamp comprising a solid electrolyte in opposition to a conductive film disposed on a semiconductor substrate. The surface of the stamp includes a pattern of relief features in contact with the conductive film so as to define a film-stamp interface. A flux of metal ions is generated across the film-stamp interface, and a pattern of recessed features complementary to the pattern of relief features is created in the conductive film. The recessed features extend through an entire thickness of the conductive film to expose the underlying semiconductor substrate and define a conductive pattern on the substrate. The stamp is removed, and material immediately below the conductive pattern is selectively removed from the substrate. Features are formed in the semiconductor substrate having a length-to-width aspect ratio of at least about 5:1.

Abstract translation: 用于形成高纵横比半导体纳米结构阵列的新方法需要将包含固体电解质的印模的表面定位成与设置在半导体衬底上的导电膜相对。 印模的表面包括与导电膜接触的凹凸图案，以便限定胶片印记界面。 在膜 - 印迹界面上产生金属离子通量，并且在导电膜中产生与凹凸特征图案互补的凹陷特征图案。 凹陷特征延伸穿过导电膜的整个厚度以暴露下面的半导体衬底并且在衬底上限定导电图案。 去除印模，并且从基板选择性地去除导电图案之下的材料。 在半导体衬底中形成具有至少约5:1的长宽比纵横比的特征。

公开(公告)号：US20110033887A1

公开(公告)日：2011-02-10

申请号：US12679497

申请日：2008-09-24

Applicant: Nicholas X. Fang ,  Chunguang Xia ,  Andrew Cox

Inventor： Nicholas X. Fang ,  Chunguang Xia ,  Andrew Cox

IPC: C12M3/00 ,  G03F7/20 ,  C12P1/00 ,  G01D18/00

CPC classification number: C12M23/16 ,  B01L3/502707 ,  B33Y10/00 ,  B81B2201/058 ,  B81B2201/06 ,  B81C1/00119 ,  B81C99/0095

Abstract: In an aspect, the present invention uses projection micro stereolithography to generate three-dimensional microvessel networks that are capable of supporting and fostering growth of a cell population. For example, provided is a method of making a microvascularized bioreactor via layer-by-layer polymerization of a photocurable liquid composition with repeated patterns of illumination, wherein each layer corresponds to a layer of the desired microvessel network. The plurality of layers are assembled to make a microvascular network. Support structures having different etch rates than the structures that make up the network provides access to manufacturing arbitrary geometries that cannot be made by conventional methods. A cell population is introduced to the external wall of the network to obtain a microvascularized bioreactor. Provided are various methods and related bioreactors, wherein the network wall has a permeability to a biological material that varies within and along the network.

Abstract translation: 在一方面，本发明使用投影微立体光刻术来产生能够支持和促进细胞群体生长的三维微血管网络。 例如，提供了通过具有重复照明模式的光固化液体组合物的逐层聚合制备微血管化生物反应器的方法，其中每层对应于所需微血管网络的层。 组合多个层以形成微血管网络。 具有与组成网络的结构不同的蚀刻速率的支撑结构提供了对通过常规方法不能制造的任意几何形状的访问。 将细胞群引入网络的外壁以获得微血管生物反应器。 提供了各种方法和相关的生物反应器，其中网络壁具有在网络内和沿网络变化的生物材料的渗透性。

公开(公告)号：US20090050487A1

公开(公告)日：2009-02-26

申请号：US12122967

申请日：2008-05-19

Applicant: Nicholas X. FANG ,  Placid M. FERREIRA ,  Keng Hao HSU ,  Peter Lee SCHULTZ ,  Kyle E. JACOBS ,  Anil KUMAR

Inventor： Nicholas X. FANG ,  Placid M. FERREIRA ,  Keng Hao HSU ,  Peter Lee SCHULTZ ,  Kyle E. JACOBS ,  Anil KUMAR

IPC: C25D5/02

CPC classification number: B23H3/00 ,  B23H3/04 ,  B81C1/0046 ,  B81C2201/0154 ,  C25D1/00 ,  C25D1/006 ,  C25D5/02 ,  C25D11/22 ,  C25D17/007 ,  G01Q80/00 ,  H01L21/32134 ,  H05K3/07 ,  H05K2203/0108 ,  H05K2203/0117

Abstract: Disclosed herein are electrochemical fabrication platforms for making structures, arrays of structures and functional devices having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods, systems and system components use an electrochemical stamping tool such as solid state polymeric electrolytes for generating patterns of relief and/or recessed features exhibiting excellent reproducibility, pattern fidelity and resolution on surfaces of solid state ionic conductors and in metal. Electrochemical stamping tools are capable high throughput patterning of large substrate areas, are compatible with commercially attractive manufacturing pathways to access a range of functional systems and devices including nano- and micro-electromechanical systems, sensors, energy storage devices, metal masks for printing, interconnects, and integrated electronic circuits.

Abstract translation: 本文公开了用于制造具有选定的纳米尺寸和/或微尺寸物理尺寸，形状和空间取向的结构，结构阵列和功能装置的电化学制造平台。 方法，系统和系统组件使用电化学冲压工具，例如固态聚合物电解质，用于产生在固态离子导体和金属表面上显示出优异的再现性，图案保真度和分辨率的浮雕和/或凹陷特征图案。 电化学冲压工具能够对大衬底区域进行高通量图案化，与商业上有吸引力的制造途径兼容，以访问一系列功能系统和设备，包括纳米和微机电系统，传感器，能量存储设备，印刷用金属掩模，互连 ，和集成电子电路。

公开(公告)号：US20130052762A1

公开(公告)日：2013-02-28

申请号：US13503123

申请日：2010-10-14

Applicant: Xiuling Li ,  Nicholas X. Fang ,  Placid M. Ferreira ,  Winston Chern ,  Ik Su Chun ,  Keng Hao Hsu

Inventor： Xiuling Li ,  Nicholas X. Fang ,  Placid M. Ferreira ,  Winston Chern ,  Ik Su Chun ,  Keng Hao Hsu

IPC: H01L21/20 ,  H01L33/04

CPC classification number: H01L21/3081 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/3086 ,  H01L29/0676 ,  Y10S977/893

Abstract: A new method for forming an array of high aspect ratio semiconductor nanostructures entails positioning a surface of a stamp comprising a solid electrolyte in opposition to a conductive film disposed on a semiconductor substrate. The surface of the stamp includes a pattern of relief features in contact with the conductive film so as to define a film-stamp interface. A flux of metal ions is generated across the film-stamp interface, and a pattern of recessed features complementary to the pattern of relief features is created in the conductive film. The recessed features extend through an entire thickness of the conductive film to expose the underlying semiconductor substrate and define a conductive pattern on the substrate. The stamp is removed, and material immediately below the conductive pattern is selectively removed from the substrate. Features are formed in the semiconductor substrate having a length-to-width aspect ratio of at least about 5:1.

Abstract translation: 形成高纵横比半导体纳米结构阵列的新方法需要将包含固体电解质的印模的表面定位成与设置在半导体衬底上的导电膜相对。 印模的表面包括与导电膜接触的凹凸图案，以便限定胶片印记界面。 在膜 - 印迹界面上产生金属离子通量，并且在导电膜中产生与凹凸特征图案互补的凹陷特征图案。 凹陷特征延伸穿过导电膜的整个厚度以暴露下面的半导体衬底并且在衬底上限定导电图案。 去除印模，并且从基板选择性地去除导电图案之下的材料。 在半导体衬底中形成具有至少约5:1的长宽比纵横比的特征。

公开(公告)号：US07998330B2

公开(公告)日：2011-08-16

申请号：US12122967

申请日：2008-05-19

Applicant: Nicholas X. Fang ,  Placid M. Ferreira ,  Keng Hao Hsu ,  Peter Lee Schultz ,  Kyle E. Jacobs ,  Anil Kumar

Inventor： Nicholas X. Fang ,  Placid M. Ferreira ,  Keng Hao Hsu ,  Peter Lee Schultz ,  Kyle E. Jacobs ,  Anil Kumar

IPC: C25D5/02 ,  C25D17/00

CPC classification number: B23H3/00 ,  B23H3/04 ,  B81C1/0046 ,  B81C2201/0154 ,  C25D1/00 ,  C25D1/006 ,  C25D5/02 ,  C25D11/22 ,  C25D17/007 ,  G01Q80/00 ,  H01L21/32134 ,  H05K3/07 ,  H05K2203/0108 ,  H05K2203/0117

Abstract: Disclosed herein are electrochemical fabrication platforms for making structures, arrays of structures and functional devices having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods, systems and system components use an electrochemical stamping tool such as solid state polymeric electrolytes for generating patterns of relief and/or recessed features exhibiting excellent reproducibility, pattern fidelity and resolution on surfaces of solid state ionic conductors and in metal. Electrochemical stamping tools are capable high throughput patterning of large substrate areas, are compatible with commercially attractive manufacturing pathways to access a range of functional systems and devices including nano- and micro-electromechanical systems, sensors, energy storage devices, metal masks for printing, interconnects, and integrated electronic circuits.

Abstract translation: 本文公开了用于制造具有选定的纳米尺寸和/或微尺寸物理尺寸，形状和空间取向的结构，结构阵列和功能装置的电化学制造平台。 方法，系统和系统组件使用电化学冲压工具，例如固态聚合物电解质，用于产生在固态离子导体和金属表面上显示出优异的再现性，图案保真度和分辨率的浮雕和/或凹陷特征图案。 电化学冲压工具能够对大衬底区域进行高通量图案化，与商业上有吸引力的制造途径兼容，以访问一系列功能系统和设备，包括纳米和微机电系统，传感器，能量存储设备，印刷用金属掩模，互连 ，和集成电子电路。