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8 条记录 (耗时 0.017 秒)

    Hybird cooling system for electronic components
    3.
    发明授权
    Hybird cooling system for electronic components 失效
    Hybird冷却系统用于电子元器件

    公开(公告)号：US5285347A

    公开(公告)日：1994-02-08

    申请号：US830952

    申请日：1992-02-06

    申请人： Leslie Fox ,  Paul C. Wade

    发明人： Leslie Fox ,  Paul C. Wade

    IPC分类号： H05K7/20

    CPC分类号： H05K7/20772 ,  G06F1/20 ,  G06F2200/201

    摘要： An improved method for removing heat from electronic devices, such as computer modules, is described. A flow of gas, such as air, cools the components. The gas flow is sufficient to cool so called "hot" components to their maximum operating temperature, and to cool the other components to their normal operating range. A liquid cooling system is also provided to cool the "hot" components to their normal operating range.

    摘要翻译： 描述了一种用于从诸如计算机模块的电子设备移除热量的改进方法。 诸如空气的气体流使部件冷却。 气流足以将所谓的“热”组分冷却至其最大工作温度，并将其它组分冷却至正常工作范围。 还提供液体冷却系统以将“热”组件冷却至其正常工作范围。

    Reverse channel GaAsFET oscillator
    4.
    发明授权
    Reverse channel GaAsFET oscillator 失效
    反向沟道GaAsFET振荡器

    公开(公告)号：US4135168A

    公开(公告)日：1979-01-16

    申请号：US874703

    申请日：1978-02-02

    申请人： Paul C. Wade

    发明人： Paul C. Wade

    IPC分类号： H03B5/12 ,  H03B5/00

    CPC分类号： H03B5/1203 ,  H03B5/1231

    摘要： A common-drain high frequency power oscillator is configured by electrically reversing the channel of a GaAsFET transistor. Such an oscillator can be flip-chip mounted for reduced thermal resistance and has superior oscillation characteristics as compared with conventional common-source oscillators. Specifically, its gain is nearly constant with frequency, oscillation is less critically dependent on terminal impedance, and it can be operated with a single polarity voltage supply.

    摘要翻译： 公共漏极高频功率振荡器通过电反转GaAsFET晶体管的沟道来配置。 与传统的共源振荡器相比，这种振荡器可以倒装安装以降低热阻并且具有优异的振荡特性。 具体来说，其增益与频率几乎恒定，振荡较少严重依赖于端子阻抗，并且可以使用单极性电压供电。

    Method and apparatus for realignment of synchronous data
    6.
    发明授权
    Method and apparatus for realignment of synchronous data 失效
    用于重新对准同步数据的方法和装置

    公开(公告)号：US5359630A

    公开(公告)日：1994-10-25

    申请号：US929623

    申请日：1992-08-13

    申请人： Paul C. Wade ,  David J. Sager ,  Andrey Varpahovsky

    发明人： Paul C. Wade ,  David J. Sager ,  Andrey Varpahovsky

    IPC分类号： G06F1/10 ,  H04L7/00 ,  H04L7/033 ,  H04L7/04

    CPC分类号： G06F1/10 ,  H04L7/0012 ,  H04L7/0338

    摘要： A method and device for receiving data in a synchronous communication system. Data can be accurately transferred between two subsystems in a synchronous system even where the clock skew and propagation delay between the two subsystems is unlimited. The receiving subsystem is initialized to ensure synchronous data transfer over a theoretically infinite range. The transmitting subsystem transmits data and a forwarded clock to the receiving subsystem. Data is captured in three state devices arranged in parallel to eliminate minimum delay requirements and to expand data valid time. The captured data is then aligned to the clock of the receiving subsystem by controlling a multiplexer which selects the proper state device output to pass to another state device for alignment to the receiving subsystem's clock. The multiplexer is controlled by a circuit which monitors the capturing of the incoming data and determines the correct state device output to select for proper data alignment.

    摘要翻译： 一种用于在同步通信系统中接收数据的方法和装置。 即使在两个子系统之间的时钟偏移和传播延迟是无限制的情况下，也可以在同步系统中的两个子系统之间精确地传输数据。 接收子系统被初始化以确保在理论上无限范围内的同步数据传输。 发送子系统向接收子系统发送数据和转发时钟。 在并行布置的三个状态设备中捕获数据，以消除最小延迟要求并扩展数据有效时间。 捕获的数据然后通过控制多路复用器对准接收子系统的时钟，多路复用器选择适当的状态设备输出传递到另一个状态设备以与接收子系统的时钟对准。 多路复用器由监视输入数据的捕获的电路控制，并确定正确的状态设备输出以选择正确的数据对准。

    High-power, high-performance integrated circuit chip package
    7.
    发明授权
    High-power, high-performance integrated circuit chip package 失效
    大功率，高性能的集成电路芯片封装

    公开(公告)号：US5068715A

    公开(公告)日：1991-11-26

    申请号：US546569

    申请日：1990-06-29

    申请人： Paul C. Wade ,  JJ Grady, III

    发明人： Paul C. Wade ,  JJ Grady, III

    IPC分类号： H01L23/04 ,  H01L23/051 ,  H01L23/36

    CPC分类号： H01L23/04 ,  H01L23/051 ,  H01L23/36 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/3011

    摘要： The high-power, high-performance integrated circuit chip package comprises a chip constructed to contain top and bottom surfaces to which top and bottom metallization planes are fixed. Top and bottom heat sinks are fixedly mounted to the top metallization plane and bottom metallization plane, respectively. The metallization planes and heat sink combination functions as both a power lead and a heat dissipation means, allowing for the chip to contain signal connections which may be dedicated to input and output signal paths. The chip further comprises a plurality of contiguous top layers of thin dielectric material, at least one epitaxial layer on whichis mounted a plurality of transistors and associated circuitry, and at least one bottom layer of crystalline silicon material. The plurality of transistors and associated circuitry generates heat. Such heat may then be dissipated by following a first or second thermal path, the first path proceeding through the plurality of contiguous top layers, through the top metallization plane to the top heat sink and the second thermal path proceeding through at least one bottom layer through the bottom metallization plane to the bottom heat sink.

    摘要翻译： 大功率，高性能的集成电路芯片封装包括一个构造成容纳顶部和底部金属化平面固定的顶表面和底表面的芯片。 顶部和底部散热器分别固定地安装在顶部金属化平面和底部金属化平面上。 金属化平面和散热器组合既用作电源引线又用作散热装置，从而允许芯片包含专用于输入和输出信号路径的信号连接。 芯片还包括多个连续的薄介电材料的顶层，至少一个外延层上安装有多个晶体管和相关电路，以及至少一个结晶硅材料的底层。 多个晶体管和相关电路产生热量。 然后可以通过跟随第一或第二热路径，第一路径穿过多个相邻顶层，穿过顶部金属化平面到顶部散热器，并且第二热路径通过至少一个底层通过 底部金属化平面到底部散热器。

    Method of cooling and powering an integrated circuit chip using a compliant interposing pad
    8.
    发明授权
    Method of cooling and powering an integrated circuit chip using a compliant interposing pad 失效
    使用兼容的插入式块来对集成电路芯片进行冷却和供电的方法

    公开(公告)号：US5010038A

    公开(公告)日：1991-04-23

    申请号：US549611

    申请日：1990-07-09

    申请人： Leslie R. Fox ,  Paul C. Wade ,  William L. Schmidt

    发明人： Leslie R. Fox ,  Paul C. Wade ,  William L. Schmidt

    IPC分类号： H01L23/40 ,  H01L23/498 ,  H01R13/24 ,  H05K3/32

    CPC分类号： H01R13/2414 ,  H01L23/4006 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/73 ,  H05K3/325 ,  H01L2023/4043 ,  H01L2023/4062 ,  H01L2224/16225 ,  H01L2924/12042 ,  H01L2924/14 ,  H01R12/714 ,  H05K2201/10681

    摘要： An IC chip assembly includes a chip having an array of exposed contacts at a first face thereof, a substrate having an array of exposed contacts at a face thereof and a compliant interposer with exposed contacts at opposite faces thereof positioned between the chip and substrate so that contacts on the opposite faces of the interposer engage the contacts on said chip and substrate, respectively. A thermal transfer member contacts the opposite face of the chip and is engaged to the substrate so as to compress the interposer thereby simultaneously establishing relatively low inductance electrical connections between the chip contacts and the substrate contacts and good thermal contact between the chip and the thermal transfer member. The assembly is particularly adapted to provide power to the chip of a TAB-type integrated circuit assembly which includes a flexible lead frame connected between the chip and the substrate.

    摘要翻译： IC芯片组件包括在其第一面处具有暴露触点阵列的芯片，具有在其表面处具有暴露触点阵列的基板和具有位于芯片和基板之间的相对面处的暴露触点的柔性插入器，使得 插入器的相对面上的触点分别接合在所述芯片和衬底上的触点。 热传递构件接触芯片的相对面并与衬底接合，以便压缩插入器，从而同时在芯片触点和衬底触点之间建立相对低的电感电连接，并且芯片与热转印之间具有良好的热接触 会员。 该组件特别适于向TAB型集成电路组件的芯片提供电力，其包括连接在芯片和衬底之间的柔性引线框架。