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    Dry aging system using oxygen
    1.
    发明授权
    Dry aging system using oxygen 有权

    公开(公告)号：US10925291B2

    公开(公告)日：2021-02-23

    申请号：US16157513

    申请日：2018-10-11

    申请人： Youn Je Chun ,  Sang Min Kim

    发明人： Won ho Kang ,  Sang Min Kim

    IPC分类号： A23B4/16 ,  A23B7/148 ,  A23L13/70 ,  F26B21/14 ,  A23L3/3418 ,  A23B4/06 ,  F26B21/08 ,  A23L3/36 ,  A23B4/08 ,  F26B5/04 ,  A23L3/40 ,  A23B4/037 ,  A23B4/09

    摘要： Provided is a dry aging system using oxygen in which a separate dry-aging room is provided in a refrigerating compartment, and a mixed gas using oxygen is supplied into the dry-aging room so as to solve a blacking and browning phenomenon of a meat surface, which is led to an increase in loss rate and an increase in edible meat cost, which are disadvantages of existing dry-aging, thereby allowing the meat surface to be maintained in a bright red color through meat color fixation, minimizing the occurrence of the blacking and browning phenomenon to reduce the loss rate of the edible meat, and supplying flavorful dry-aged meat at a more reasonable price. Also, the blacking and browning phenomenon occurring on the generally dry-aged meat may be significantly reduced to produce aesthetically and tastefully very superior dry-aged meat.

    CLOCK
    4.
    发明申请
    CLOCK 审中-公开
    时钟

    公开(公告)号：US20130250738A1

    公开(公告)日：2013-09-26

    申请号：US13601955

    申请日：2012-08-31

    申请人： Sang-Min Kim ,  Jee-Yeon Lee ,  Ji-Su Park

    发明人： Sang-Min Kim ,  Jee-Yeon Lee ,  Ji-Su Park

    IPC分类号： G04B19/24

    CPC分类号： G04G17/08

    摘要： A clock includes a display including a plurality of planar portions and a plurality of bending portions disposed between the plane portions. The display is configured to display at least one of time, day, or day of the week. The clock also includes a bottom support for supporting one end of the display.

    摘要翻译： 时钟包括包括多个平面部分和设置在平面部分之间的多个弯曲部分的显示器。 显示器被配置为显示时间，日期或星期几中的至少一个。 时钟还包括用于支持显示器一端的底部支撑。

    Semiconductor memory device and method of manufacturing the same
    6.
    发明授权
    Semiconductor memory device and method of manufacturing the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US08273652B2

    公开(公告)日：2012-09-25

    申请号：US13246726

    申请日：2011-09-27

    申请人： Sang Min Kim

    发明人： Sang Min Kim

    IPC分类号： H01L21/4763

    CPC分类号： H01L27/11521 ,  H01L23/5222 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of manufacturing a semiconductor device includes providing a substrate having junction regions and contact plugs formed thereon. A second insulating layer is formed over a first insulating layer and includes first and second pad holes extending in different directions and exposing the contact plugs. First and second conductive pads are formed in the first and second pad holes, respectively. A third insulating layer is formed and includes dual damascene patterns and pad contact holes. The dual damascene pattern exposes the first conductive pad, and each pad contact hole exposes a second conductive pad. First pad contact plugs and a first bit line are formed in the dual damascene pattern and a second pad contact plug is formed in each pad contact hole. A fourth insulating layer including trenches is formed. Each trench exposes a second pad contact plug. A second bit line is formed in each trench.

    摘要翻译： 制造半导体器件的方法包括提供具有形成在其上的接合区域和接触插塞的衬底。 第二绝缘层形成在第一绝缘层之上，并且包括沿不同方向延伸并暴露接触插塞的第一和第二焊盘孔。 第一和第二导电焊盘分别形成在第一和第二焊盘孔中。 形成第三绝缘层，并且包括双镶嵌图案和焊盘接触孔。 双镶嵌图案暴露第一导电焊盘，并且每个焊盘接触孔暴露第二导电焊盘。 在双镶嵌图案中形成第一垫接触塞和第一位线，并且在每个垫接触孔中形成第二垫接触塞。 形成包括沟槽的第四绝缘层。 每个沟槽露出第二垫接触插头。 在每个沟槽中形成第二位线。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20120021595A1

    公开(公告)日：2012-01-26

    申请号：US13246726

    申请日：2011-09-27

    申请人： Sang Min KIM

    发明人： Sang Min KIM

    IPC分类号： H01L21/336

    CPC分类号： H01L27/11521 ,  H01L23/5222 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of manufacturing a semiconductor device includes providing a substrate having junction regions and contact plugs formed thereon. A second insulating layer is formed over a first insulating layer and includes first and second pad holes extending in different directions and exposing the contact plugs. First and second conductive pads are formed in the first and second pad holes, respectively. A third insulating layer is formed and includes dual damascene patterns and pad contact holes. The dual damascene pattern exposes the first conductive pad, and each pad contact hole exposes a second conductive pad. First pad contact plugs and a first bit line are formed in the dual damascene pattern and a second pad contract plug is formed in each pad contact hole. A fourth insulating layer including trenches is formed. Each trench exposes a second pad contact plug. A second bit line is formed in each trench.

    摘要翻译： 制造半导体器件的方法包括提供具有形成在其上的接合区域和接触插塞的衬底。 在第一绝缘层上形成第二绝缘层，并且包括在不同方向上延伸并暴露接触插塞的第一和第二焊盘孔。 第一和第二导电焊盘分别形成在第一和第二焊盘孔中。 形成第三绝缘层，并且包括双镶嵌图案和焊盘接触孔。 双镶嵌图案暴露第一导电焊盘，并且每个焊盘接触孔暴露第二导电焊盘。 在双镶嵌图案中形成第一焊盘接触插头和第一位线，并且在每个焊盘接触孔中形成第二焊盘接合插头。 形成包括沟槽的第四绝缘层。 每个沟槽露出第二垫接触插头。 在每个沟槽中形成第二位线。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20090250743A1

    公开(公告)日：2009-10-08

    申请号：US12417341

    申请日：2009-04-02

    申请人： Sang Min Kim

    发明人： Sang Min Kim

    IPC分类号： H01L29/788 ,  H01L21/28

    CPC分类号： H01L27/11521 ,  H01L23/5222 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor memory device has side surfaces of neighboring bit lines that do not face each other to reduce a capacitance of a parasitic capacitor formed between adjacent bit lines. The semiconductor memory device includes contact plugs formed on a semiconductor substrate. Each contact plug is disposed between gate patterns. First and second conductive pads extend in different directions and are connected to the contact plugs. First and second pad contact plugs are formed on extended peripheries of the first and second conductive pads, respectively. Each of the first pad contact plugs has a height which differs from a height of each of the second pad contact plugs. First bit lines are connected to the first pad contact plugs, and second bit lines are connected to the second pad contact plugs.

    摘要翻译： 半导体存储器件具有不相对的相邻位线的侧表面，以减小在相邻位线之间形成的寄生电容器的电容。 半导体存储器件包括形成在半导体衬底上的接触插塞。 每个接触插头设置在栅极图案之间。 第一和第二导电焊盘在不同的方向上延伸并连接到接触插头。 第一和第二焊盘接触插塞分别形成在第一和第二导电焊盘的延伸的外围。 每个第一焊盘接触插塞具有与每个第二焊盘接触插塞的高度不同的高度。 第一位线连接到第一焊盘触点插头，第二位线连接到第二焊盘触点插头。

    Apparatus for controlling temperature of fingerprint sensor for vehicle and method thereof
    9.
    发明授权
    Apparatus for controlling temperature of fingerprint sensor for vehicle and method thereof 有权
    车辆指纹传感器温度控制装置及其方法

    公开(公告)号：US07257242B2

    公开(公告)日：2007-08-14

    申请号：US10696640

    申请日：2003-10-28

    申请人： Sang Min Kim

    发明人： Sang Min Kim

    IPC分类号： G06K9/00

    CPC分类号： G06K9/00013

    摘要： When a fingerprint sensor temperature is outside a preferred predetermined temperature range, heat is transferred between a fingerprint sensor and semiconductor assembly. Accordingly the fingerprint sensor temperature can stay within the predetermined temperature range regardless of the driving conditions.

    摘要翻译： 当指纹传感器温度超出优选的预定温度范围时，在指纹传感器和半导体组件之间传递热量。 因此，无论驾驶条件如何，指纹传感器温度都可以保持在预定温度范围内。

    System and method for designing RS-based LDPC code decoder
    10.
    发明申请
    System and method for designing RS-based LDPC code decoder 有权
    用于设计基于RS的LDPC码解码器的系统和方法

    公开(公告)号：US20070033484A1

    公开(公告)日：2007-02-08

    申请号：US11487042

    申请日：2006-07-13

    申请人： Sang-Min Kim ,  Keshab Parhi ,  Renfei Liu

    发明人： Sang-Min Kim ,  Keshab Parhi ,  Renfei Liu

    IPC分类号： H03M13/00

    CPC分类号： H03M13/1151 ,  H03M13/1111 ,  H03M13/1137

    摘要： A memory address generation method and circuit architecture for time-multiplexed RS-based LDPC code decoder is presented. The method is developed for non quasi-cyclic RS-based LDPC code decoder implementation. A circuit for the memory address generation method achieves low area. High throughput time-multiplexed RS-based LDPC code decoder design models and circuit architectures are presented. The decoder models are specifically developed for 10BASE-T (10-Gigabit Ethernet Transceiver Over Copper) system. These time-multiplexed architectures enable higher throughput with lower area.

    摘要翻译： 提出了一种用于时间复用的基于RS的LDPC码解码器的存储器地址生成方法和电路架构。 该方法被开发用于非准循环的基于RS的LDPC码解码器实现。 用于存储器地址生成方法的电路实现了低的面积。 提出了高吞吐量时间复用的基于RS的LDPC码解码器设计模型和电路架构。 解码器型号专为10BASE-T（万兆以太网收发器铜缆）系统而开发。 这些时分复用架构能够实现更低的面积的更高的吞吐量。