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    Intelligent memory system compiler
    3.
    发明授权
    Intelligent memory system compiler 有权
    智能内存系统编译器

    公开(公告)号：US08589851B2

    公开(公告)日：2013-11-19

    申请号：US12806946

    申请日：2010-08-23

    申请人： Sundar Iyer ,  Sanjeev Joshi ,  Shang-Tse Chuang

    发明人： Sundar Iyer ,  Sanjeev Joshi ,  Shang-Tse Chuang

    IPC分类号： G06F17/50 ,  G06F9/455

    CPC分类号： G06F3/0607 ,  G06F3/0629 ,  G06F3/0683 ,  G06F12/0844 ,  G06F12/0851 ,  G06F12/0855

    摘要： Designing memory subsystems for integrated circuits can be time-consuming and costly task. To reduce development time and costs, an automated system and method for designing and constructing high-speed memory operations is disclosed. The automated system accepts a set of desired memory characteristics and then methodically selects different potential memory system design types and different implementations of each memory system design type. The potential memory system design types may include traditional memory systems, optimized traditional memory systems, intelligent memory systems, and hierarchical memory systems. A selected set of proposed memory systems that meet the specified set of desired memory characteristics is output to a circuit designer. When a circuit designer selects a proposed memory system, the automated system generates a complete memory system design, a model for the memory system, and a test suite for the memory system.

    摘要翻译： 为集成电路设计存储器子系统可能是耗时且昂贵的任务。 为了减少开发时间和成本，公开了一种用于设计和构建高速存储器操作的自动化系统和方法。 自动化系统接受一组期望的存储特性，然后有选择地选择不同的潜在存储器系统设计类型和每种存储器系统设计类型的不同实现。 潜在的存储器系统设计类型可以包括传统的存储器系统，优化的传统存储器系统，智能存储器系统和分层存储器系统。 满足所指定的所需存储器特性集合的一组选定的存储器系统被输出到电路设计者。 当电路设计者选择所提出的存储器系统时，自动化系统产生完整的存储器系统设计，存储器系统的模型以及存储器系统的测试套件。

    PROCESS FOR PREPARING AQUEOUS DISPERSIONS
    4.
    发明申请
    PROCESS FOR PREPARING AQUEOUS DISPERSIONS 审中-公开
    制备水性分散体的方法

    公开(公告)号：US20150250888A1

    公开(公告)日：2015-09-10

    申请号：US14430592

    申请日：2012-11-27

    申请人： Shraddha Sanjeev Joshi ,  Ashish Sharadchandra GUHA ,  Vinay JAIN

    发明人： Shraddha Sanjeev Joshi ,  Ashish Sharadchandra Guha ,  Vinay Jain

    IPC分类号： A61K47/32 ,  A61K9/10

    CPC分类号： A61K47/32 ,  A61K9/10 ,  A61K9/2846

    摘要： The invention discloses a process for preparing aqueous dispersions comprising the components (a) and (b) and optionally (c) or (d) or both, (a) a copolymer consisting of free-radical-polymerized C1- to C4-esters of acrylic or methacrylic acid and alkyl(meth)acrylate monomers with tertiary ammonium groups in the alkyl side groups, (b) 5 to 25% by weight, based on (a), of a C12- to C18-monocarboxylic acid or a C12- to C18-alcohol, (c) 0 to 10% by weight based on (a) of a dicarboxylic acid having 3 to 10 carbon atoms, (d) 0 to 20% by weight, based on (a), of an emulsifier having an HLB of at least 14 by dispersing the components in water where the water has a temperature of more than 40 and up to 85° C., where the solid content of the dispersion is from 5 to 40% by weight and where a clear colloidal dispersion is obtained in less than 30 min.

    摘要翻译： 本发明公开了一种制备包含组分（a）和（b）和任选地（c）或（d）或两者的水分散体的方法，（a）由游离基聚合的C 1 -C 4酯 丙烯酸或甲基丙烯酸和烷基侧基具有叔铵基的（甲基）丙烯酸烷基酯单体，（b）基于（a）的5-25重量％的C12- C18-一元羧酸或C12- （c）0至10重量％，基于（a）具有3至10个碳原子的二羧酸，（d）0至20重量％（a），基于（a）的乳化剂，其具有 通过将组分分散在水中，其中水的温度高于40℃且高达85℃，其中固体含量为5至40重量％，并且其中透明胶体 在少于30分钟内获得分散体。

    Methods and Apparatus for Designing and Constructing High-Speed Memory Circuits
    8.
    发明申请
    Methods and Apparatus for Designing and Constructing High-Speed Memory Circuits 审中-公开
    用于设计和构建高速存储器电路的方法和装置

    公开(公告)号：US20140104960A1

    公开(公告)日：2014-04-17

    申请号：US13651698

    申请日：2012-10-15

    申请人： Sundar Iyer ,  Shang-Tse Chuang ,  Thu Nguyen ,  Sanjeev Joshi ,  Adam Kablanian

    发明人： Sundar Iyer ,  Shang-Tse Chuang ,  Thu Nguyen ,  Sanjeev Joshi ,  Adam Kablanian

    IPC分类号： G11C7/12 ,  G11C7/10

    CPC分类号： G11C7/12 ,  G11C7/1042 ,  G11C8/16 ,  G11C11/419

    摘要： Static random access memory (SRAM) circuits are used in most digital integrated circuits to store digital data bits. SRAM memory circuits are generally read by decoding an address, reading from an addressed memory cell using a set of bit lines, outputting data from the read memory cell, and precharging the bit lines for a subsequent memory cycle. To handle memory operations faster, a bit line multiplexing system is proposed. Two sets of bit lines are coupled to each memory cell and each set of bit lines are used for memory operations in alternating memory cycles. During a first memory cycle, a first set of bit lines accesses the memory array while precharging a second set of bit lines. Then during a second memory cycle following the first memory cycle, the first set of bit lines are precharged while the second set of bit lines accesses the memory array to read data.

    摘要翻译： 在大多数数字集成电路中使用静态随机存取存储器（SRAM）电路来存储数字数据位。 通常通过对地址进行解码来读取SRAM存储器电路，使用一组位线从寻址的存储器单元读取，从读取的存储器单元输出数据，并为后续存储器周期预充电位线。 为了更快地处理存储器操作，提出了一种位线复用系统。 两组位线耦合到每个存储器单元，并且每组位线用于交替存储器周期中的存储器操作。 在第一存储器周期期间，第一组位线在对第二组位线进行预充电的同时访问存储器阵列。 然后在第一存储器周期之后的第二存储器周期期间，第一组位线被预充电，而第二组位线访问存储器阵列以读取数据。

    Managing objects in a role based access control system
    9.
    发明申请
    Managing objects in a role based access control system 审中-公开
    管理基于角色的访问控制系统中的对象

    公开(公告)号：US20070240231A1

    公开(公告)日：2007-10-11

    申请号：US11392156

    申请日：2006-03-29

    申请人： Bashir Haswarey ,  Sanjeev Joshi

    发明人： Bashir Haswarey ,  Sanjeev Joshi

    IPC分类号： H04L9/32

    CPC分类号： H04L63/10 ,  G06F21/6218 ,  H04L63/0227 ,  H04L63/101

    摘要： A method and system for managing objects in a O&M RBAC system includes a first step of dynamically discovering an object and associated command actions by the RBAC system. A next step includes defining roles and tasks to users assigning authorization privileges for the object. A next step includes updating a graphical user interface with information about the objects, roles, tasks, and command actions. A next step includes adding information about the objects, roles, tasks, and command actions to a database for the network. A next step includes entering a command with an action from a user. A next step includes determining a role of a requesting user. A next step includes comparing the role against the database to find authorization to execute the task and action against the object.

    摘要翻译： 用于管理O＆M RBAC系统中的对象的方法和系统包括动态发现对象的第一步骤和RBAC系统的关联命令动作。 下一步包括为角色和任务定义为对象分配授权权限的用户。 下一步包括使用有关对象，角色，任务和命令操作的信息来更新图形用户界面。 下一步包括将关于对象，角色，任务和命令操作的信息添加到网络的数据库。 下一步包括使用用户的操作输入命令。 下一步包括确定请求用户的角色。 下一步包括将角色与数据库进行比较，以查找对对象执行任务和操作的授权。

    PROCESS FOR PREPARING A GRANULATED PRODUCT FROM A POWDER COMPOSITION
    10.
    发明申请
    PROCESS FOR PREPARING A GRANULATED PRODUCT FROM A POWDER COMPOSITION 审中-公开
    从粉末组合物制备颗粒状产品的方法

    公开(公告)号：US20150290136A1

    公开(公告)日：2015-10-15

    申请号：US14646569

    申请日：2013-02-28

    申请人： Shraddha Sanjeev JOSHI ,  Ashish Sharadchandra GUHA ,  Vinay JAIN

    发明人： Shraddha Sanjeev JOSHI ,  Ashish Sharadchandra GUHA ,  Vinay JAIN

    IPC分类号： A61K9/16

    CPC分类号： A61K9/1635 ,  C08F220/14 ,  C08F220/34 ,  C08F2220/1825 ,  C08K5/05 ,  C08K5/09 ,  C08L33/14

    摘要： The invention discloses a process for preparing granulated product from a powder composition comprising the mixed components (a) and (b) and (c) or (d) or both, with (a), a copolymer consisting of free-radical-polymerized C1- to C4-esters of acrylic or methacrylic acid and alkyl(meth)acrylate monomers with tertiary amino groups in the alkyl side groups (b) 5 to 25% by weight, based on (a), of a C12- to C18-monocarboxylic acid or a C12- to C18-alcohol, (c) 0 to 10% by weight based on (a) of a dicarboxylic acid having 3 to 10 carbon atoms, (d) 0 to 20% by weight, based on (a), of an emulsifier having an HLB of at least 14, wherein the mixed components are processed by a dry granulation process to a granulate with a mean particle size of 2 mm or less.

    摘要翻译： 本发明公开了一种由包含混合组分（a）和（b）和（c）或（d）或两者的粉末组合物制备造粒产物的方法与（a）由自由基聚合的C1 - 丙烯酸或甲基丙烯酸的C 4-酯和（甲基）丙烯酸烷基酯单体与烷基侧基中的叔氨基（b）基于（a）的5-25重量％的C12- C18-单羧酸 （c）基于（a）基于（a）的碳原子数为3〜10的二羧酸为0〜10重量％，（c）0〜10重量％，（d）0〜20重量％ 的具有至少14的HLB的乳化剂，其中所述混合组分通过干法制粒法加工成平均粒径为2mm或更小的颗粒。