摘要:
A universal substrate includes an input/output (I/O) layer having a fixed I/O assignment of I/O locations for connection with a printed circuit board or the like. A chip receiving layer is provided for receiving one of at least two different but allied semiconductor chips, wherein each of the at least two different but allied chips include a set of bond pads and have a unique wire-out requirement. A first layer includes a plurality of bond pads and vias, the plurality of bond pads including at least two sets of bond pads, wherein each set is adapted for bond connection with a respective one of the at least two different semiconductor chips when received by said receiving means and further in accordance with a respective wire-out requirement. A second layer, different from the first layer, includes redistribution lines for coupling the plurality of bond pads and vias of the first layer to the I/O locations of the I/O layer in accordance with the wire-out requirements of the at least two different semiconductor chips and the fixed I/O assignment.
摘要:
An electronic component package comprising a substrate having at least one die-receiving cavity formed therein, the cavity being defined by a die-receiving surface and an inner sidewall having a terraced contour, the substrate having an exterior surface bordering the cavity perimeter, the inner sidewall extending between the die-receiving surface and the substrate exterior surface, and at least one capacitor positioned completely within the cavity and mounted to the terraced contour of the inner sidewall.