摘要:
Provided is a black box timing modeling method for a digital circuit comprising synchronous elements including latches. The method includes: characterizing a setup time arc by extracting a setup time with respect to a rising or falling edge of a clock of a synchronous element with respect to an input connected to the synchronous element and forming the setup time arc using the extracted setup time; and characterizing a clock-to-output delay arc by providing information on an output departure time from an output based on a rising or falling edge of a clock of a closest synchronous element connected to the output, at least partially based on the setup time arc and forming the clock-to-output delay arc. Accordingly, the method can be efficiently used for a latch-based design without re-verifying internal components of the latch-based design during an upper-level verification, thereby reducing verification time and model size.
摘要:
A semiconductor device includes gate electrodes vertically stacked on a substrate, and channel holes passing through the gate electrodes to extend perpendicularly to the substrate and including a gate dielectric layer and a channel area. The gate dielectric layer may be formed of a plurality of layers, and at least one layer among the plurality of layers may have different thicknesses in different locations.
摘要:
A semiconductor device is provided as follows. A tunnel insulation layer is disposed on a substrate. The tunnel insulation layer includes a first silicon oxide layer, a second silicon oxide layer, and a silicon layer interposed between the first silicon oxide layer and the second silicon oxide layer. The silicon layer has a thickness smaller than a thickness of each of the first silicon oxide layer and the second silicon oxide layer. A gate pattern is disposed on the tunnel insulation layer.
摘要:
A semiconductor device including a dielectric layer is provided. The semiconductor device includes a stack structure, and a vertical structure within the stack structure. The vertical structure includes a lower region having a first width and an upper region having a second width, greater than the first width. The vertical structure further includes two dielectric layers of which respective ratios of lower thicknesses in the lower region to upper thicknesses in the upper region are different from each other.
摘要:
A semiconductor device including a dielectric layer is provided. The semiconductor device includes a stack structure, and a vertical structure within the stack structure. The vertical structure includes a lower region having a first width and an upper region having a second width, greater than the first width. The vertical structure further includes two dielectric layers of which respective ratios of lower thicknesses in the lower region to upper thicknesses in the upper region are different from each other.
摘要:
Provided is a black box timing modeling method for a digital circuit comprising synchronous elements including latches. The method includes: characterizing a setup time arc by extracting a setup time with respect to a rising or falling edge of a clock of a synchronous element with respect to an input connected to the synchronous element and forming the setup time arc using the extracted setup time; and characterizing a clock-to-output delay arc by providing information on an output departure time from an output based on a rising or falling edge of a clock of a closest synchronous element connected to the output, at least partially based on the setup time arc and forming the clock-to-output delay arc. Accordingly, the method can be efficiently used for a latch-based design without re-verifying internal components of the latch-based design during an upper-level verification, thereby reducing verification time and model size.
摘要:
The present invention relates to a reflection plate for a backlight unit in a liquid crystal display device, and more particularly, to a reflection plate for a backlight unit in a liquid crystal display device, which is made of a thermoplastic thermal conductive resin composition having a thermal conductivity of at least 0.35 W/mK, thereby effectively solving the thermal problem of the backlight unit, and having excellent properties such as shock resistance, heat resistance, mechanical strength, and the like, as well as having excellent reflectivity, thereby improving the durability of the liquid crystal display device. Furthermore, the present invention relates to a backlight unit of a liquid crystal display device, comprising a reflection plate positioned at a lower portion of a lamp of the backlight unit for reflecting the light coming out of the lamp, a supporting rod for the lamp, and a lower plate functioning as a heat sink, wherein the reflection plate and the lower plate are made of the same material, thereby effectively solving the thermal problem of the backlight unit, and simplifying the manufacturing process.