公开(公告)号：US08060854B2

公开(公告)日：2011-11-15

申请号：US12371071

申请日：2009-02-13

申请人： Takashi Asano ,  Shinji Furuichi

发明人： Takashi Asano ,  Shinji Furuichi

IPC分类号： G06F17/50

CPC分类号： H01L27/0207 ,  H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

摘要： A plurality of third fixed potential lines are wired in parallel. A group of high-potential-side fixed potential lines containing a first fixed potential line and a second fixed potential line are wired in a plurality at predetermined intervals in a direction perpendicular to the third fixed potential line. In a layout region, surrounded by a pair of adjacent third fixed potential lines and a pair of groups of adjacent high-potential-side fixed potential lines, where a first element or a second element is arranged, either one of the first fixed potential line and the second fixed potential line is wired between the pair of third fixed potential lines. In a layout region used for second elements, a second fixed potential line connecting a pair of second fixed potential lines contained respectively in a pair of groups of high-potential-side fixed potential lines that form the layout region is wired between a pair of third fixed potential lines that form the layout region.

摘要翻译： 多个第三固定电位线并联布线。 包含第一固定电位线和第二固定电位线的一组高电位侧固定电位线在与第三固定电位线垂直的方向上以预定间隔多个布线。 在布置区域中，由一对相邻的第三固定电位线和一对相邻的高电位侧固定电位线包围，其中布置有第一元件或第二元件，第一固定电位线 并且第二固定电位线被布线在该对第三固定电位线之间。 在用于第二元件的布局区域中，连接形成布局区域的一组高电位侧固定电位线中的一对第二固定电位线的第二固定电位线被布线在一对第三 形成布局区域的固定电位线。

公开(公告)号：US20080218235A1

公开(公告)日：2008-09-11

申请号：US12044406

申请日：2008-03-07

申请人： Satoru SEKINE ,  Yoshitaka Ueda ,  Takashi Asano ,  Shinji Furuichi ,  Atsushi Wada

发明人： Satoru SEKINE ,  Yoshitaka Ueda ,  Takashi Asano ,  Shinji Furuichi ,  Atsushi Wada

IPC分类号： H03K3/356 ,  H03K3/00 ,  H03K3/037

CPC分类号： H03K3/35625

摘要： A plurality of flip-flop circuits, having different circuit configurations, which perform an identical digital signal processing are mixed on a single semiconductor substrate. A first flip-flop circuit among the plurality of flip-flop circuits receives a clock signal supplied from outside the flip-flop circuits, through at least two stage inverters, and operates with clock signals outputted from the inverters. A second flip-flop circuit receives the clock signal supplied from outside the flip-flop circuits through at least one inverter having a less number of stages than the number of stages of the inverter contained in the first flip-flop circuit, and operates with at least one of the clock signal and a clock signal outputted from the inverter.

摘要翻译： 具有不同电路结构的执行相同数字信号处理的多个触发电路混合在单个半导体衬底上。 多个触发器电路中的第一触发器电路通过至少两级反相器接收从触发器电路外部提供的时钟信号，并且利用从反相器输出的时钟信号进行操作。 第二触发器电路通过至少一个具有比包含在第一触发器电路中的反相器的级数少的级数的反相器接收从触发器电路的外部提供的时钟信号，并且以 至少一个时钟信号和从逆变器输出的时钟信号。

公开(公告)号：US07111514B2

公开(公告)日：2006-09-26

申请号：US10936809

申请日：2004-09-09

申请人： Hiroyuki Hatano ,  Shinji Furuichi ,  Masakatsu Saitoh

发明人： Hiroyuki Hatano ,  Shinji Furuichi ,  Masakatsu Saitoh

IPC分类号： G01P15/12 ,  G01P15/00

CPC分类号： G01P15/18 ,  G01P15/0802 ,  G01P15/123 ,  G01P2015/0842

摘要： An acceleration sensor comprises an acceleration sensor element having a mass portion in the center, a thick frame surrounding the mass portion and a plurality of elastic support arms bridging the mass portion and the thick frame, and an upper regulation plate covering the acceleration sensor element and fixed on the thick frame with adhesive. The mass portion has, on the mass portion upper surface, connection portions connecting the mass portion with each of the arms, wired areas having lead wires on it and non-wired areas. The non-wired areas have a major area of the upper surface of the mass portion and are lower than the wired areas. The upper regulation plate has a first gap with the wired areas and a second gap with the non-wired areas, of which length is more than the sum of the first gap length, a lead wire thickness and 0.1 μm (preferably 1.0 μm). Even if contaminants adhere the mass portion upper surface, there is a large possibility of removing the contaminants from the upper surface when etching the non-wired areas, so that the vibration amplitude of the mass portion is scarcely lessened due to them.

摘要翻译： 加速度传感器包括：加速度传感器元件，其具有中心的质量部分，围绕质量部分的厚框架和桥接质量部分和厚框架的多个弹性支撑臂;以及覆盖加速度传感器元件的上调节板， 用粘合剂固定在厚框架上。 质量部分在质量部分上表面上具有将质量部分与每个臂连接的连接部分，其上具有引线的有线区域和非接线区域。 非接线区域具有质量部分的上表面的主要区域并且低于有线区域。 上调节板具有与布线区域的第一间隙和与非接线区域的第二间隙，其长度大于第一间隙长度，引线厚度和0.1μm（优选1.0μm）的总和。 即使污染物粘附质量部分上表面，当蚀刻非接线区域时，从上表面去除污染物的可能性很大，使得质量部分的振动振幅由于它们而几乎不减少。

公开(公告)号：US06763719B2

公开(公告)日：2004-07-20

申请号：US10384645

申请日：2003-03-11

申请人： Hiroyuki Hatano ,  Masakatsu Saitoh ,  Shinji Furuichi

发明人： Hiroyuki Hatano ,  Masakatsu Saitoh ,  Shinji Furuichi

IPC分类号： G01P1512

CPC分类号： G01P15/123 ,  G01P15/18 ,  G01P2015/084

摘要： An ultra-small and slim semiconductor acceleration sensor with high sensitivity is provided. The acceleration sensor has a mass portion formed at a center part of a silicon semiconductor substrate, a frame formed on an edge part of the substrate, thin elastic support arms which are provided on top surfaces of the mass portion and the frame and connect the mass portion and the frame, and strain gauges constituted by a plurality of pairs of piezoresistors formed on top surfaces of the elastic support arms. A distance between a pair of Z-axis strain gauges provided on the top surface of the elastic support arm is made longer by 0.4L to 1.2L or shorter by 1.0L to 1.8L than a distance between a pair of X-axis strain gauges, whereby output of the Z-axis strain gauge is made at the same level as output of the X-axis strain gauge. Alternatively, an angle formed by the Z-axis strain gauge with an X-axis is made 10 to 30 degrees or 65 to 90 degrees, whereby the output of the Z-axis strain gauge is made at the same level as the output of the X-axis strain gauge.

摘要翻译： 提供了一种具有高灵敏度的超小型半导体加速度传感器。 加速度传感器具有形成在硅半导体基板的中心部分的质量部分，形成在基板的边缘部分上的框架，薄的弹性支撑臂设置在质量部分和框架的顶表面上并且连接质量 部分和框架，以及由形成在弹性支撑臂的顶表面上的多对压电电阻器构成的应变计。 设置在弹性支撑臂的顶表面上的一对Z轴应变计之间的距离比一对X轴应变计之间的距离长0.4L至1.2L或更短1.0L至1.8L 由此，Z轴应变计的输出与X轴应变计的输出相同。 或者，由Z轴应变计与X轴形成的角度为10〜30度或65〜90度，由此将Z轴应变计的输出设定为与 X轴应变仪。

公开(公告)号：US06635220B2

公开(公告)日：2003-10-21

申请号：US09987048

申请日：2001-11-13

申请人： Shinji Furuichi ,  Shigetoshi Takashima

发明人： Shinji Furuichi ,  Shigetoshi Takashima

IPC分类号： B22F700

CPC分类号： C23C14/14 ,  B22F5/12 ,  B22F7/06 ,  B22F2998/00 ,  B22F2999/00 ,  C23C14/027 ,  Y10T428/12028 ,  Y10T428/12063 ,  Y10T428/12097 ,  B22F1/0011 ,  B22F3/1216 ,  B22F1/0003 ,  B22F2207/01

摘要： A method for forming a composite vapor-deposited film one side of which suitable for vapor-deposition on a phosphor surface of a CRT, such as a color television picture tube, has high light reflectivity, and the other side of which has a property to absorb radiant heat, and a composite vapor-deposition material suitable for vacuum deposition are disclosed. The composite vapor-deposition material has a high vapor-pressure metal envelope and a low vapor-pressure metal in the core region of the envelope. Low vapor-pressure metal powder should preferably be dispersed and held by high vapor-pressure metal powder in the core region. Vacuum deposition using this composite vapor-deposition material yields a composite deposited film having a composition comprising almost 100% of the high vapor-pressure metal formed in the initial stage of evaporation, and a composition comprising 100% of the low vapor-pressure metal formed in the final stage of evaporation.

公开(公告)号：US06465817B1

公开(公告)日：2002-10-15

申请号：US09666478

申请日：2000-09-20

申请人： Shinji Furuichi

发明人： Shinji Furuichi

IPC分类号： H01L2710

CPC分类号： H01L27/118

摘要： A semiconductor integrated circuit capable of speeding up its operations and improving the degree of integration is obtained. This semiconductor integrated circuit comprises a macro cell part and a logic part formed around the macro cell part. The macro cell part includes a logic wiring region for receiving wires provided in the logic part. Thus, such a probability that the wires of the logic circuit bypass the macro cell part is reduced, whereby the wiring length of the wires of the logic part is reduced to reduce the wiring capacity while the wires are prevented from congestion around the macro cell part. Consequently, the circuit operations are speeded up and the degree of integration of the semiconductor integrated circuit is improved.

摘要翻译： 获得能够加快其运转并提高集成度的半导体集成电路。 该半导体集成电路包括宏小区部分和形成在宏小区部分周围的逻辑部分。 宏单元部分包括用于接收设置在逻辑部分中的导线的逻辑布线区域。 因此，逻辑电路的布线绕过宏单元部分的这种概率被减小，从而减少了逻辑部分的布线的布线长度以减少布线容量，同时防止布线围绕宏单元部分的拥塞 。 因此，电路操作加快，并且提高了半导体集成电路的集成度。

公开(公告)号：US5581429A

公开(公告)日：1996-12-03

申请号：US418110

申请日：1995-04-06

申请人： Shinji Furuichi ,  Kuniaki Yoshimura

发明人： Shinji Furuichi ,  Kuniaki Yoshimura

IPC分类号： G11B5/31 ,  G11B5/147

CPC分类号： G11B5/3146

摘要： The thin-film magnetic head comprises a gap layer, coil layer, insulating layer, and top magnetic pole layer stacked in sequence on the bottom magnetic pole layer, and a magnetic gap formed at the end position of the gap layer. The top magnetic pole layer is magnetically joined to the bottom magnetic pole layer over the whole width at the opposite position of the magnetic gap. All these enable an easy production of the thin-film magnetic head keeping the magnetic resistance of the magnetic circuit small and having a structure appropriate to a higher recording density.

摘要翻译： 薄膜磁头包括依次堆叠在底部磁极层上的间隙层，线圈层，绝缘层和顶部磁极层以及形成在间隙层的端部位置处的磁隙。 顶部磁极层在磁隙的相对位置处在整个宽度上磁接合到底部磁极层。 所有这些使得能够容易地生产保持磁路的磁阻小并且具有适合于更高记录密度的结构的薄膜磁头。

公开(公告)号：US5010429A

公开(公告)日：1991-04-23

申请号：US360124

申请日：1989-06-01

申请人： Akira Taguchi ,  Shigetoshi Morita ,  Shunichi Taka ,  Hirohide Yamada ,  Yoshiaki Takada ,  Shinji Furuichi ,  Masahiro Ao

发明人： Akira Taguchi ,  Shigetoshi Morita ,  Shunichi Taka ,  Hirohide Yamada ,  Yoshiaki Takada ,  Shinji Furuichi ,  Masahiro Ao

IPC分类号： G11B5/10 ,  G11B5/187 ,  G11B5/60

CPC分类号： G11B5/1871 ,  G11B5/10 ,  G11B5/6005

摘要： A floating type magnetic head is made of a polycrystalline material. A surface to be opposed to a magnetic recording medium is undulated with lands and grooves having a height different of 50 to 200 .ANG. on an average and a repetition pitch of 5 to 20 microns on an average. The portions, in which the heights of the lands and the grooves abruptly change, extend along the boundaries of the polycrystals. The head surface opposed to the magnetic recording medium is sputter-etched to have the predetermined surface roughness.

摘要翻译： 浮动式磁头由多晶材料制成。 与磁记录介质相对的表面平均地具有平均50至200安培高度的平台和重复间距为5至20微米的平台和凹槽。 其中土地和槽的高度突然变化的部分沿着多晶体的边界延伸。 与磁记录介质相对的头表面被溅射蚀刻以具有预定的表面粗糙度。

公开(公告)号：US4628387A

公开(公告)日：1986-12-09

申请号：US464858

申请日：1983-02-08

申请人： Shinji Furuichi

发明人： Shinji Furuichi

IPC分类号： G11B5/23 ,  G11B5/265 ,  G11B5/325

CPC分类号： G11B5/2655

摘要： A magnetic head assembly for writing on and reading out data or signals from a magnetic medium such as a floppy disc, having a read-write magnetic head and eraser magnetic heads in combination. Control of the depth of the eraser gap in this magnetic head assembly is accomplished not by the eraser magnetic head core, but by the read-write magnetic head core.

摘要翻译： 一种用于从诸如软盘的磁介质写入和读出数据或信号的磁头组件，其具有读写磁头和橡皮擦磁头的组合。 该磁头组件中的橡皮擦间隙深度的控制不是由橡皮磁头磁芯，而是由读写磁头磁芯完成的。

公开(公告)号：US08159212B2

公开(公告)日：2012-04-17

申请号：US12450205

申请日：2008-02-21

申请人： Yasunori Abe ,  Yuji Nihei ,  Shinji Furuichi ,  Yasuko Furuichi, legal representative

发明人： Yasunori Abe ,  Yuji Nihei ,  Shinji Furuichi

IPC分类号： G01B7/14

CPC分类号： G01D11/00 ,  G01D5/145 ,  Y10T29/49032

摘要： To disclose a magnetic encoder being subjected to only small gap variation between a magnetic sensor element and a magnetic medium and readily assembled, and having a smaller number of components, high sliding resistance, and high stability against outside force, such as shock or the like. The magnetic sensor holding mechanism has a swirling spring plate structure having elasticity with respect to rotation around a rotation axis in a reciprocative slide relative movement direction, elasticity with respect to rotation around a rotation axis in a direction perpendicular to the reciprocative relative movement direction and in parallel to the magnetic medium, and elasticity in the direction perpendicular to the sensor element. A load between 50 mN and 80 mN is applied to press onto the magnetic medium.

摘要翻译： 为了公开在磁传感器元件和磁介质之间仅具有小间隙变化的磁性编码器，并且易于组装，并且具有较少数量的部件，高滑动阻力和对外力（例如冲击等）的高稳定性 。 磁传感器保持机构具有旋转弹簧板结构，该旋转弹簧板结构相对于沿往复滑动相对移动方向的旋转轴线的旋转具有弹性，相对于沿着与往复运动相对运动方向垂直的方向上的旋转轴线的旋转的弹性， 平行于磁介质，并且在垂直于传感器元件的方向上具有弹性。 施加50mN至80mN之间的载荷以压在磁性介质上。