公开(公告)号：US08835928B2

公开(公告)日：2014-09-16

申请号：US13822658

申请日：2011-09-13

申请人： Hiromitsu Katsui ,  Takeshi Yaneda ,  Yoshiyuki Isomura

发明人： Hiromitsu Katsui ,  Takeshi Yaneda ,  Yoshiyuki Isomura

IPC分类号： H01L31/00 ,  H01L27/02 ,  H01L27/12 ,  H01L29/66 ,  G02F1/1362 ,  H01L29/49 ,  H01L29/786 ,  H01L29/45

CPC分类号： H01L27/1244 ,  G02F1/136204 ,  H01L27/0296 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/786 ,  H01L29/7869

摘要： A semiconductor device (100) according to the present invention includes a plurality of source lines (16), a thin film transistor (50A), and a diode element (10A) that electrically connects two source lines (16) among the plurality of source lines (16). A connection region (26) in which the source lines (16) and the diode element (10A) are connected to each other includes a first electrode (3), a second electrode (6a), a third electrode (9a), and a fourth electrode (9b). A part of each source line (16) is a source electrode of the thin film transistor (50A), and the second electrode (6a) and the source lines (16) are formed separately from each other.

摘要翻译： 根据本发明的半导体器件（100）包括多个源极线（16），薄膜晶体管（50A）和二极管元件（10A），其将多个源极中的两个源极线（16）电连接 线（16）。 其中源极线（16）和二极管元件（10A）彼此连接的连接区域（26）包括第一电极（3），第二电极（6a），第三电极（9a）和 第四电极（9b）。 每个源极线（16）的一部分是薄膜晶体管（50A）的源电极，并且第二电极（6a）和源极线（16）彼此分开地形成。

公开(公告)号：US20130207115A1

公开(公告)日：2013-08-15

申请号：US13822658

申请日：2011-09-13

申请人： Hiromitsu Katsui ,  Takeshi Yaneda ,  Yoshiyuki Isomura

发明人： Hiromitsu Katsui ,  Takeshi Yaneda ,  Yoshiyuki Isomura

IPC分类号： H01L29/66 ,  H01L29/786

CPC分类号： H01L27/1244 ,  G02F1/136204 ,  H01L27/0296 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/786 ,  H01L29/7869

摘要： A semiconductor device (100) according to the present invention includes a plurality of source lines (16), a thin film transistor (50A), and a diode element (10A) that electrically connects two source lines (16) among the plurality of source lines (16). A connection region (26) in which the source lines (16) and the diode element (10A) are connected to each other includes a first electrode (3), a second electrode (6a), a third electrode (9a), and a fourth electrode (9b). A part of each source line (16) is a source electrode of the thin film transistor (50A), and the second electrode (6a) and the source lines (16) are formed separately from each other.

摘要翻译： 根据本发明的半导体器件（100）包括多个源极线（16），薄膜晶体管（50A）和二极管元件（10A），其将多个源极中的两个源极线（16）电连接 线（16）。 其中源极线（16）和二极管元件（10A）彼此连接的连接区域（26）包括第一电极（3），第二电极（6a），第三电极（9a）和 第四电极（9b）。 每个源极线（16）的一部分是薄膜晶体管（50A）的源电极，并且第二电极（6a）和源极线（16）彼此分开地形成。

公开(公告)号：US06425580B1

公开(公告)日：2002-07-30

申请号：US09707776

申请日：2000-11-07

申请人： Takeshi Yaneda

发明人： Takeshi Yaneda

IPC分类号： B65H502

CPC分类号： B41J11/0085 ,  B41J11/007

摘要： There is provided a recording medium transportation apparatus providing air suction to adhere a recording medium to a belt while the recording medium is being transported thereby, wherein the belt can have an optimized surface roughness and adjacent suction holes provided therein can be spaced by an optimized distance to provide an optimized level of force allowing the belt to adhere to the recording medium to transport the recording medium with high precision. The belt transporting a sheet of paper adhered thereto through air suction has a surface roughness (Ra) set in a range obtained by substituting an equivalent adhesion diameter (Dx) defined by: 0.5 × D ⁢   ⁢ 0 2 ⁢   ⁢ e c0 / c1 ≦ Dx ≦ 0.95 × D ⁢   ⁢ 0 2 ⁢   ⁢ e c0 / c1 for that of Ra = { Dx 5 / 2 - ( D ⁢   ⁢ 0 / 2 ) 5 / 2 c ⁢   ⁢ 0 - c ⁢   ⁢ 1 ⁢   ⁢ ln ⁢   ⁢ ( 2 · Dx / D ⁢   ⁢ 0 ) } 1 / 3 wherein D0 represents a diameter of the suction hole and c0 and c1 each represent a fitting value (c0=16.49 and c1=6.05).

摘要翻译： 提供了一种记录介质传送装置，其在传送记录介质的同时提供空气抽吸以将记录介质粘附到带上，其中，带可以具有优化的表面粗糙度，并且设置在其中的相邻抽吸孔可以间隔优化的距离 以提供优化的力水平，允许带粘附到记录介质上以高精度输送记录介质。 传送通过空气吸附粘附到其上的纸张的带的表面粗糙度（Ra）设定在通过代替由下式定义的等效粘附直径（Dx）所获得的范围内：D0表示吸入孔的直径，c0和 c1分别表示拟合值（c0 = 16.49，c1 = 6.05）。

公开(公告)号：US08823002B2

公开(公告)日：2014-09-02

申请号：US13510315

申请日：2010-08-23

申请人： Michiko Takei ,  Tohru Okabe ,  Tetsuya Aita ,  Tsuyoshi Inoue ,  Yoshiyuki Harumoto ,  Takeshi Yaneda

发明人： Michiko Takei ,  Tohru Okabe ,  Tetsuya Aita ,  Tsuyoshi Inoue ,  Yoshiyuki Harumoto ,  Takeshi Yaneda

IPC分类号： H01L31/036 ,  H01L21/268 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L29/04

CPC分类号： H01L21/268 ,  H01L27/1229 ,  H01L27/1285 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78678

摘要： An object of this invention is to provide a semiconductor device in which TFTs with high mobility are arranged in both of display and peripheral circuit areas. A semiconductor device fabricating method according to the present invention includes the steps of: irradiating an amorphous silicon layer (34) with energy, thereby obtaining a microcrystalline silicon layer; and forming a doped semiconductor layer (35) on the amorphous silicon layer (34). In the step of irradiating, the amorphous silicon layer (34) is irradiated with energy that has a first quantity, thereby forming a first microcrystalline silicon layer (34A) including a channel layer for a first TFT (30A), and is also irradiated with energy that has a second quantity, which is larger than the first quantity, thereby forming a second microcrystalline silicon layer (34B) including a channel layer for a second TFT (30B).

摘要翻译： 本发明的目的是提供一种半导体器件，其中具有高迁移率的TFT被布置在显示器和外围电路区域中。 根据本发明的半导体器件制造方法包括以下步骤：用能量照射非晶硅层（34），从而获得微晶硅层; 以及在所述非晶硅层（34）上形成掺杂半导体层（35）。 在照射步骤中，用具有第一量的能量照射非晶硅层（34），由此形成包括用于第一TFT（30A）的沟道层的第一微晶硅层（34A），并且还用 具有大于第一量的第二量的能量，由此形成包括用于第二TFT（30B）的沟道层的第二微晶硅层（34B）。

公开(公告)号：US08441016B2

公开(公告)日：2013-05-14

申请号：US13383077

申请日：2010-07-08

申请人： Tsuyoshi Inoue ,  Tohru Okabe ,  Tetsuya Aita ,  Michiko Takei ,  Yoshiyuki Harumoto ,  Takeshi Yaneda

发明人： Tsuyoshi Inoue ,  Tohru Okabe ,  Tetsuya Aita ,  Michiko Takei ,  Yoshiyuki Harumoto ,  Takeshi Yaneda

IPC分类号： H01L33/08

CPC分类号： H01L29/78627 ,  G02F1/1368 ,  G02F2202/104 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78624

摘要： Disclosed is a high-quality, efficiently manufacturable thin film transistor in which leakage current is minimized. The thin film transistor is provided with a semiconductor layer (34) that contains a channel region (34C) having a microcrystalline semiconductor; source and drain contact layers (35S and 35D) that contains impurities; a first source metal layer (36S) and a first drain metal layer (36D), and a second source metal layer (37S) and a second drain metal layer (37D). The end portion of the second metal source layer (37S) is located at a position receded from the end portion of the first metal source layer (36S) and the end portion of the second drain metal layer (37D) is located at a position receded from the end portion of the first drain metal layer (36D). The semiconductor layer (34) contains low concentration impurity diffusion regions formed near the end portions of the aforementioned source contact layer (35S) and drain contact layer (35D).

摘要翻译： 公开了一种其中泄漏电流最小化的高品质，高效制造的薄膜晶体管。 薄膜晶体管设置有包含具有微晶半导体的沟道区（34C）的半导体层（34） 源极和漏极接触层（35S和35D），其含有杂质; 第一源极金属层（36S）和第一漏极金属层（36D）以及第二源极金属层（37S）和第二漏极金属层（37D）。 第二金属源层（37S）的端部位于从第一金属源层（36S）的端部退出的位置，第二漏极金属层（37D）的端部位于退出的位置 从第一漏极金属层（36D）的端部开始。 半导体层（34）包含在上述源极接触层（35S）和漏极接触层（35D）的端部附近形成的低浓度杂质扩散区域。

公开(公告)号：US20120001190A1

公开(公告)日：2012-01-05

申请号：US13259154

申请日：2010-02-09

申请人： Tohru Okabe ,  Takeshi Yaneda ,  Tetsuya Aita ,  Tsuyoshi Inoue ,  Yoshiyuki Harumoto

发明人： Tohru Okabe ,  Takeshi Yaneda ,  Tetsuya Aita ,  Tsuyoshi Inoue ,  Yoshiyuki Harumoto

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L21/02532 ,  H01L21/02678 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78696

摘要： The invention provides a thin film transistor that can improve its operating speed by improving crystallinity near a bottom surface of a channel layer. Of laser light irradiated onto an amorphous silicon layer, light transmitted through the amorphous silicon layer is absorbed by a gate electrode 130 and thereby produces heat. Since the gate electrode 130 is made of a titanium layer 102 with a low thermal conductivity, the produced heat is less likely to be transmitted through a gate wiring line 110 and dissipated and thus increases the temperature of the gate electrode 130. Radiant heat from the gate electrode 130 is provided to a bottom surface of the amorphous silicon layer and thus the amorphous silicon layer is also heated from its bottom surface. As a result, an amorphous silicon layer 106a melts not only from its top surface but also from its bottom surface and is solidified, whereby crystallization proceeds, and thus, the amorphous silicon layer 106a turns into a polycrystalline silicon layer 106b. Hence, the mobility near a bottom surface of the polycrystalline silicon layer 106b also increases, improving the operating speed of a thin film transistor 100.

摘要翻译： 本发明提供一种薄膜晶体管，其可以通过改善沟道层底表面附近的结晶度来提高其工作速度。 照射到非晶硅层上的激光，透过非晶硅层的光被栅电极130吸收，从而产生热量。 由于栅电极130由具有低热导率的钛层102制成，所产生的热不太可能通过栅极布线110透射并消散，因此增加了栅电极130的温度。来自 栅电极130被提供到非晶硅层的底表面，因此非晶硅层也从其底表面加热。 结果，非晶硅层106a不仅从其顶表面而且从其底表面熔化并且固化，从而进行结晶，因此非晶硅层106a变成多晶硅层106b。 因此，多晶硅层106b的底表面附近的迁移率也增加，提高了薄膜晶体管100的工作速度。

公开(公告)号：US08779430B2

公开(公告)日：2014-07-15

申请号：US13696623

申请日：2011-04-27

申请人： Shoji Okazaki ,  Takeshi Yaneda ,  Wataru Nakamura ,  Hiromitsu Katsui

发明人： Shoji Okazaki ,  Takeshi Yaneda ,  Wataru Nakamura ,  Hiromitsu Katsui

IPC分类号： H01L29/04 ,  H01L29/10 ,  H01L29/15 ,  H01L31/00 ,  H01L31/036 ,  H01L29/786 ,  G02F1/1368 ,  H01L29/423 ,  H01L29/417 ,  G02F1/1362

CPC分类号： H01L29/78696 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/13629 ,  H01L29/41733 ,  H01L29/42384

摘要： A semiconductor device (18) includes: a gate electrode (102) formed on a substrate (101); a semiconductor layer (104) formed above the gate electrode (102) and including a source region, a drain region, and a channel region; a source electrode (106) connected to the source region above the semiconductor layer (104); and a drain electrode (107) connected to the drain region above the semiconductor layer (104). The semiconductor layer (104) has, at a portion overlapping the drain electrode (107), a protrusion that protrudes outward along an extending direction of a drain line drawn out from the drain electrode (107). At an outside of the channel region sandwiched between the drain electrode (107) and the source electrode (106), the semiconductor layer (104) has an adjustment portion where an outer boundary of the semiconductor layer (104) is positioned more inward than an outer boundary of the gate electrode (102).

摘要翻译： 半导体器件（18）包括：形成在衬底（101）上的栅极（102）; 形成在栅电极（102）上方并包括源极区，漏极区和沟道区的半导体层（104） 与所述半导体层（104）上方的源极区域连接的源电极（106）。 以及连接到半导体层（104）上方的漏极区的漏电极（107）。 半导体层（104）在与漏电极（107）重叠的部分处具有沿着从漏电极（107）引出的漏极线的延伸方向向外突出的突起。 在夹在漏电极（107）和源电极（106）之间的沟道区域的外部，半导体层（104）具有调整部分，其中半导体层（104）的外边界位于 栅电极（102）的外边界。

公开(公告)号：US20130105802A1

公开(公告)日：2013-05-02

申请号：US13518566

申请日：2010-12-21

申请人： Yoshiyuki Harumoto ,  Takeshi Hara ,  Tohru Okabe ,  Takeshi Yaneda ,  Tetsuya Aita ,  Tsuyoshi Inoue ,  Michiko Takei

发明人： Yoshiyuki Harumoto ,  Takeshi Hara ,  Tohru Okabe ,  Takeshi Yaneda ,  Tetsuya Aita ,  Tsuyoshi Inoue ,  Michiko Takei

IPC分类号： H01L29/786 ,  H01L33/08 ,  H01L29/66

CPC分类号： H01L29/786 ,  H01L29/04 ,  H01L29/6675 ,  H01L29/66765 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78678 ,  H01L29/78696 ,  H01L33/08

摘要： The present invention has an object of providing a TFT in which generation of an OFF current is reduced by an efficient manufacturing method. A thin film transistor 100 according to the present invention has a gate electrode 12 formed on a substrate 10, an insulating layer 14 formed on the gate electrode 12, a microcrystalline amorphous silicon layer 18 and an amorphous silicon layer 16 that are formed on the insulating layer 14, a semiconductor layer 20 containing an impurity formed on the amorphous silicon layer 16, and a source electrode 22A and a drain electrode 22B that are formed on the semiconductor layer 20 containing an impurity. The microcrystalline amorphous silicon layer 18 and the semiconductor layer 20 containing an impurity are connected to each other through the amorphous silicon layer 16 without being in direct contact with each other.

摘要翻译： 本发明的目的是提供一种通过有效的制造方法来减少OFF电流的产生的TFT。 根据本发明的薄膜晶体管100具有形成在基板10上的栅电极12，形成在栅电极12上的绝缘层14，形成在绝缘层上的微晶非晶硅层18和非晶硅层16。 层14，包含形成在非晶硅层16上的杂质的半导体层20以及形成在包含杂质的半导体层20上的源电极22A和漏极22B。 含有杂质的微晶非晶硅层18和半导体层20通过非晶硅层16彼此连接而不直接接触。

公开(公告)号：US20130102115A1

公开(公告)日：2013-04-25

申请号：US13806964

申请日：2011-07-01

申请人： Takeshi Yaneda ,  Hiromitsu Katsui ,  Wataru Nakamura

发明人： Takeshi Yaneda ,  Hiromitsu Katsui ,  Wataru Nakamura

IPC分类号： H01L29/66

CPC分类号： H01L29/66742 ,  H01L27/124 ,  H01L27/1288

摘要： The disclosed method for manufacturing an active matrix substrate includes a step in which a first mask is used to pattern a first conductive layer G, CS, and S, a step in which a second mask is used to pattern a first insulating layer, a step in which a third mask is used to pattern a semiconductor layer, a step in which a fourth mask is used to pattern a second conductive later, a step in which a fifth mask is used to pattern a second insulating layer, and a step in which a sixth mask is used to pattern a third conductive layer.

摘要翻译： 所公开的制造有源矩阵基板的方法包括以下步骤：第一掩模用于对第一导电层G，CS和S进行图案化，其中使用第二掩模来对第一绝缘层进行图案化的步骤，步骤 其中使用第三掩模来对半导体层进行图案化，其中第四掩模用于稍后对第二导电图案化的步骤，使用第五掩模来对第二绝缘层进行图案化的步骤，以及其中 使用第六掩模来图案化第三导电层。

公开(公告)号：US20120228621A1

公开(公告)日：2012-09-13

申请号：US13510315

申请日：2010-08-23

申请人： Michiko Takei ,  Tohru Okabe ,  Tetsuya Aita ,  Tsuyoshi Inoue ,  Yoshiyuki Harumoto ,  Takeshi Yaneda

发明人： Michiko Takei ,  Tohru Okabe ,  Tetsuya Aita ,  Tsuyoshi Inoue ,  Yoshiyuki Harumoto ,  Takeshi Yaneda

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L21/268 ,  H01L27/1229 ,  H01L27/1285 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78678

摘要： An object of this invention is to provide a semiconductor device in which TFTs with high mobility are arranged in both of display and peripheral circuit areas. A semiconductor device fabricating method according to the present invention includes the steps of: irradiating an amorphous silicon layer (34) with energy, thereby obtaining a microcrystalline silicon layer; and forming a doped semiconductor layer (35) on the amorphous silicon layer (34). In the step of irradiating, the amorphous silicon layer (34) is irradiated with energy that has a first quantity, thereby forming a first microcrystalline silicon layer (34A) including a channel layer for a first TFT (30A), and is also irradiated with energy that has a second quantity, which is larger than the first quantity, thereby forming a second microcrystalline silicon layer (34B) including a channel layer for a second TFT (30B).

摘要翻译： 本发明的目的是提供一种半导体器件，其中具有高迁移率的TFT被布置在显示器和外围电路区域中。 根据本发明的半导体器件制造方法包括以下步骤：用能量照射非晶硅层（34），从而获得微晶硅层; 以及在所述非晶硅层（34）上形成掺杂半导体层（35）。 在照射步骤中，用具有第一量的能量照射非晶硅层（34），由此形成包括用于第一TFT（30A）的沟道层的第一微晶硅层（34A），并且还用 具有大于第一量的第二量的能量，由此形成包括用于第二TFT（30B）的沟道层的第二微晶硅层（34B）。