公开(公告)号：US07024293B2

公开(公告)日：2006-04-04

申请号：US10608676

申请日：2003-06-24

申请人： Tatsuya Ishizaki ,  Kazuo Matsuda

发明人： Tatsuya Ishizaki ,  Kazuo Matsuda

IPC分类号： B60K28/14 ,  B60R22/00

CPC分类号： B60R21/0132 ,  B60R21/0133 ,  B60R21/0136

摘要： A collision determination system of the present invention includes a plurality of acceleration sensors provided in a bumper face of a vehicle for detecting the acceleration of deformation of the bumper face when the vehicle collides with an object. The system also includes an actuation permitter which, even when one of the acceleration sensors detects an acceleration equal to or more than a set value and it is determined that a collision occurs, refers to another acceleration sensor for operation. Under the AND conditions that an actuation permitting signal is supplied from the actuation permitter and a collision detection signal is supplied from a collision detector, an actuating signal output outputs an actuating signal for actuating collision mitigating devices.

摘要翻译： 本发明的碰撞确定系统包括设置在车辆的保险杠面中的多个加速度传感器，用于当车辆与物体碰撞时检测保险杠面的变形加速度。 该系统还包括致动容许器，即使当加速度传感器中的一个检测到等于或大于设定值的加速度并且确定发生碰撞时，也是指另一个用于操作的加速度传感器。 在AND状态下，从致动容许器提供致动许可信号，并且从碰撞检测器提供碰撞检测信号，致动信号输出输出致动信号，用于致动碰撞缓解装置。

公开(公告)号：US06274251B1

公开(公告)日：2001-08-14

申请号：US09337520

申请日：1999-06-22

申请人： Kenji Ohashi ,  Tatsuya Ishizaki ,  Masayuki Umeno ,  Eiichi Asano ,  Kazutoshi Tomiyoshi ,  Shoichi Osada ,  Toshio Shiobara

发明人： Kenji Ohashi ,  Tatsuya Ishizaki ,  Masayuki Umeno ,  Eiichi Asano ,  Kazutoshi Tomiyoshi ,  Shoichi Osada ,  Toshio Shiobara

IPC分类号： C09D16300

CPC分类号： H01L23/293 ,  C08G59/688 ,  C08L63/00 ,  H01L2924/0002 ,  Y10T428/12528 ,  C08L61/04 ,  H01L2924/00

摘要： An epoxy resin composition contains (A) an epoxy resin, (B) a phenolic resin curing agent, (C) a curing catalyst, and (D) an inorganic filler. The catalyst is a quaternary phosphorus compound or a quaternary phosphorus compound which has been mixed and reacted with a phenolic resin having at least two hydroxyl groups. The composition is effectively flowable, moldable and curable and thus suitable for semiconductor encapsulation.

摘要翻译： 环氧树脂组合物含有（A）环氧树脂，（B）酚醛树脂固化剂，（C）固化催化剂和（D）无机填料。 催化剂是与具有至少两个羟基的酚醛树脂混合并反应的季磷化合物或季磷化合物。 该组合物是有效流动的，可模制的和可固化的，因此适合于半导体封装。

公开(公告)号：US5854537A

公开(公告)日：1998-12-29

申请号：US690892

申请日：1996-08-01

申请人： Shinichiro Gotoh ,  Takeshi Kobayashi ,  Shujiro Ohnuma ,  Tatsuya Ishizaki

发明人： Shinichiro Gotoh ,  Takeshi Kobayashi ,  Shujiro Ohnuma ,  Tatsuya Ishizaki

IPC分类号： B60Q1/00 ,  B60Q1/04 ,  B60Q1/08 ,  B60Q1/14 ,  B60Q1/18 ,  H05B37/02

CPC分类号： B60Q1/18 ,  B60Q1/085 ,  B60Q1/143 ,  B60Q2300/112 ,  B60Q2300/122 ,  B60Q2300/142 ,  B60Q2300/21 ,  B60Q2300/42

摘要： A head lamp device for a vehicle by which a pedestrian on the opposing vehicle lane side can be easily perceived without giving glare on an opposing vehicle. The head lamp device comprises main light emitting mechanism capable of changing over a low beam and a high beam from each other; an auxiliary light emitting mechanism for lighting a front and upper portion on the opposing vehicle lane side; an opposing vehicle sensor for detecting existence of an opposing vehicle; and a control mechanism for controlling the auxiliary light emitting mechanism. The control mechanism decreases or turns off the light of the auxiliary light emitting mechanism in response to input of an opposing vehicle detection signal from the opposing vehicle sensor when the main light emitting mechanism emits the low beam and at the same time the auxiliary light emitting mechanism is turned on.

摘要翻译： 一种用于车辆的前照灯装置，通过该前照灯装置可以容易地感觉到相对车辆车道侧的行人，而不会在相对车辆上产生眩光。 前照灯装置包括能够切换彼此的近光束和远光束的主发光机构; 用于照亮相对车辆车道侧的前部和上部的辅助发光机构; 用于检测相对车辆的存在的相对车辆传感器; 以及用于控制辅助发光机构的控制机构。 当主发光机构发射近光束时，控制机构响应于来自相对车辆传感器的相对车辆检测信号的输入而减小或关闭辅助发光机构的光，并且同时辅助发光机构 打开

公开(公告)号：US20090287888A1

公开(公告)日：2009-11-19

申请号：US12436483

申请日：2009-05-06

申请人： Tatsuya ISHIZAKI

发明人： Tatsuya ISHIZAKI

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G11C7/1006 ,  G11C7/1027 ,  G11C7/1078 ,  G11C7/1087

摘要： To solve a problem in that it is difficult for a conventional semiconductor memory device to improve a data transfer rate, there is provided a semiconductor memory device including: a first sub-array (data sub-array) that holds write data input from an outside of the semiconductor memory device; an input data recognition circuit (21) that generates decision bit information associated with the write data based on a combination of data items contained in the write data; a second sub-array (decision sub-array) that holds the decision bit information; an internal address generation circuit (24) that generates an internal address for selectively specifying read data stored in the first sub-array, based on the decision bit information; and an output circuit (25) that outputs the read data selected by the internal address.

摘要翻译： 为了解决传统半导体存储器件难以提高数据传输速率的问题，提供了一种半导体存储器件，包括：第一子阵列（数据子阵列），其保持从外部输入的写入数据 的半导体存储器件; 输入数据识别电路（21），其基于所述写入数据中包含的数据项的组合生成与所述写入数据相关联的判定位信息; 保持判定位信息的第二子阵列（判定子阵列）; 内部地址生成电路（24），其基于所述判定位信息生成用于选择性地指定存储在所述第一子阵列中的读取数据的内部地址; 以及输出由内部地址选择的读取数据的输出电路（25）。

公开(公告)号：US06728613B2

公开(公告)日：2004-04-27

申请号：US10223884

申请日：2002-08-19

申请人： Tatsuya Ishizaki ,  Kazuo Matsuda

发明人： Tatsuya Ishizaki ,  Kazuo Matsuda

IPC分类号： G06F700

CPC分类号： B60R21/0132 ,  B60R21/38 ,  B60R2021/01184 ,  B60W2520/105

摘要： The error determination section determines whether or not an acceleration data set has been received properly with no error. Received data memories store a plurality of the received acceleration data sets. Collision judgment control unit judges a possibility of a collision on the basis of a latest error-free proper data of the received acceleration data sets stored in the received data memories. Further, in case of occurrence of a data deficiency, an error-free proper data set is constantly stored in memory.

摘要翻译： 错误判定部判定是否没有错误地接收到加速度数据集合。 接收数据存储器存储多个接收到的加速度数据组。 碰撞判断控制单元基于存储在接收数据存储器中的接收到的加速度数据集的最新无误差正确数据来判断碰撞的可能性。 此外，在发生数据不足的情况下，在存储器中不断地存储无错误的正确数据集。

公开(公告)号：US06201724B1

公开(公告)日：2001-03-13

申请号：US09437010

申请日：1999-11-09

申请人： Tatsuya Ishizaki ,  Misao Suzuki ,  Souichirou Yoshida

发明人： Tatsuya Ishizaki ,  Misao Suzuki ,  Souichirou Yoshida

IPC分类号： G11C1500

CPC分类号： G11C7/106 ,  G11C7/1051 ,  G11C15/00 ,  G11C2207/2245

摘要： A semiconductor memory (100) is disclosed that includes a memory cell array (102) coupled to a register array section (104) that can function as a cache. Access times for misses to the register array section (104) during a continuous read operation can be reduced. A memory cell array (102) is coupled to the register array section (104) by a first transfer bus (TBT1-1 to TBN1-i). First transfer bus (TBT1-1 to TBN1-i) is connected to a local read/write bus (LRWBT and LRWBN) by transistors (106-1 to 108-i) and to register arrays (116-1 to 116-(i+j)) by first switches (118-1 to 118-(i+j)). In a continuous read operation, during a register array section miss, transistors (106-1 to 108-i) are turned on and the first switches (118-1 to 118-(i+j)) are turned on.

摘要翻译： 公开了一种半导体存储器（100），其包括耦合到可用作高速缓存的寄存器阵列部分（104）的存储单元阵列（102）。 可以减少连续读取操作期间寄存器阵列部分（104）的访问次数。 存储单元阵列（102）通过第一传输总线（TBT1-1至TBN1-i）耦合到寄存器阵列部分（104）。 第一传输总线（TBT1-1至TBN1-i）通过晶体管（106-1至108-i）连接到本地读/写总线（LRWBT和LRWBN），并将寄存器阵列（116-1至116-（i + j））由第一开关（118-1至118-（i + j）））。 在连续读取操作中，在寄存器阵列部分缺失期间，晶体管（106-1至108-i）导通，并且第一开关（118-1至118-（i + j））导通。

公开(公告)号：US06896086B2

公开(公告)日：2005-05-24

申请号：US10224030

申请日：2002-08-19

申请人： Tatsuya Ishizaki ,  Teruaki Aizawa

发明人： Tatsuya Ishizaki ,  Teruaki Aizawa

IPC分类号： B62D25/12 ,  B60R21/01 ,  B60R21/0136 ,  B60R21/34 ,  B60R21/38 ,  B62D25/10 ,  G06F17/00

CPC分类号： B60R21/013 ,  B60R21/38

摘要： Values of vehicle speed signals sequentially output by a vehicle speed detection section are stored in a memory. Wheel slip detection section detects a slip of a vehicle wheel on the basis of the values of the vehicle speed signals stored in the memory and thereby outputs a wheel slip detection signal. Hood activation control section for controlling operation of a hood-lifting actuator activates the actuator even when the value of a current vehicle speed signal is smaller than a predetermined apparatus-activating vehicle speed value, on condition that the wheel slip signal has been received from the wheel slip detection section and that a collision detection signal has been received from a collision detection section.

摘要翻译： 由车速检测部顺序输出的车速信号的值被存储在存储器中。 轮滑检测部根据存储在存储器中的车速信号的值来检测车轮的滑动，从而输出车轮滑移检测信号。 即使在当前车速信号的值小于规定的装置起动车速值的情况下，控制发动机执行机构的操作的机罩启动控制部也起动致动器， 并且从碰撞检测部接收到碰撞检测信号。

公开(公告)号：US06516278B1

公开(公告)日：2003-02-04

申请号：US09662190

申请日：2000-09-15

申请人： Tatsuya Ishizaki ,  Kaoru Nagatomi

发明人： Tatsuya Ishizaki ,  Kaoru Nagatomi

IPC分类号： G06F1700

CPC分类号： B60R21/013 ,  B60R21/0136 ,  B60R21/38

摘要： A vehicle hood operating system has a control unit for controlling an actuator which is designed to lift a hood over a vehicle when an obstacle with which the vehicle has collided is an object to be protected. The control unit controls the actuator such that it lifts the hood when the velocity of the vehicle is equal to, or higher than, a predetermined value at the time of its collision, while at the same time, the speed of deformation caused to a bumper by the collision is equal to, or higher than, its threshold value varying with the vehicle velocity. When the vehicle velocity is lower than the predetermined value, the object to be protected is unlikely to strike against the hood. As the threshold value varies with the vehicle velocity, it is possible to distinguish quickly and accurately if the obstacle is an object to be protected, or not.

摘要翻译： 车辆驾驶室操作系统具有控制单元，用于控制致动器，所述致动器被设计成当车辆碰撞的障碍物是被保护物体时在车辆上提升罩子。 控制单元控制致动器，使得当车辆的速度等于或高于其碰撞时的预定值时，其提升罩，同时，对保险杠造成的变形速度 通过碰撞等于或高于其阈值随车速而变化。 当车速低于预定值时，被保护物体不可能撞击罩。 当阈值随着车辆速度而变化时，如果障碍物是要被保护的物体，则可以快速准确地区分。

公开(公告)号：US07907473B2

公开(公告)日：2011-03-15

申请号：US12216673

申请日：2008-07-09

申请人： Tatsuya Ishizaki ,  Hironori Nakamura ,  Takayuki Kurokawa ,  Kenichi Ushikoshi

发明人： Tatsuya Ishizaki ,  Hironori Nakamura ,  Takayuki Kurokawa ,  Kenichi Ushikoshi

IPC分类号： G11C8/00

CPC分类号： G11C8/10 ,  G11C7/1006 ,  G11C8/12

摘要： A semiconductor memory device for storing data defining a multidimensional space based on coordinate information of the data, includes: a cell array having memory cells arranged in a lattice pattern, for storing the data; a word line selector selecting and driving any one of a plurality of word lines which activate memory cells arranged in a row direction; write amplifiers/sense amplifiers writing/reading data to/from the memory cells arranged in a column direction; an amplifier selector inputting/outputting the data to/from the selected one of the write amplifiers/sense amplifiers; and an address conversion circuit generating a row address to be supplied to the word line selector based on the coordinate information of the data, and to generate a column address to be supplied to the amplifier selector by converting the coordinate information of the data into one-dimensional information.

摘要翻译： 一种用于存储基于数据的坐标信息定义多维空间的数据的半导体存储器件，包括：具有以格子图案排列的存储单元的单元阵列，用于存储数据; 选择并驱动激活沿行方向布置的存储单元的多个字线中的任一个的字线选择器; 写放大器/读出放大器向/从布置在列方向上的存储单元写入/读取数据; 一个放大器选择器，输入/输出来自所选择的一个写入放大器/读出放大器的数据; 以及地址转换电路，其基于数据的坐标信息产生要提供给字线选择器的行地址，并且通过将数据的坐标信息转换为一维地生成要提供给放大器选择器的列地址， 尺寸信息。

公开(公告)号：US20110051534A1

公开(公告)日：2011-03-03

申请号：US12801426

申请日：2010-06-08

申请人： Tatsuya Ishizaki

发明人： Tatsuya Ishizaki

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C5/066 ,  G11C7/10 ,  G11C11/4093

摘要： A semiconductor storage device, in which successive reading and successive writing of data having a predetermined length from and to a memory cell specified by a certain address are performed, includes a plurality of memory cells, address input terminals through which the address is input, data output terminals through which read data having the predetermined length is output, and data input terminals through which write data having the predetermine length is input. Part of the address input terminals are also used as the data output terminals. In this way, the operation of successive reading and successive writing performed in succession at the same address can be made faster without increasing the number of terminals.

摘要翻译： 一种半导体存储装置，其中执行从特定地址指定的具有预定长度的数据的连续读取和连续写入，包括多个存储单元，输入地址的地址输入端，数据 输出具有预定长度的读取数据的输出端子以及输入具有预定长度的写入数据的数据输入端子。 部分地址输入端子也用作数据输出端子。 以这种方式，可以在不增加终端数量的情况下，连续读取和连续写入相同地址的操作更快。