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18 条记录 (耗时 0.018 秒)

    Error recovery in RFID reader systems
    1.
    发明申请
    Error recovery in RFID reader systems 有权
    RFID阅读器系统中的错误恢复

    公开(公告)号：US20060236203A1

    公开(公告)日：2006-10-19

    申请号：US11388235

    申请日：2006-03-22

    申请人： Christopher Diorio ,  Seth Bridges ,  Aanand Esterberg ,  William Colleran

    发明人： Christopher Diorio ,  Seth Bridges ,  Aanand Esterberg ,  William Colleran

    IPC分类号： H03M13/00

    CPC分类号： H03M13/09 ,  G06K7/0008 ,  G06K17/00

    摘要： RFID systems, devices, software and methods are adapted for receiving from an RFID tag at least waves that communicate at least a first version of its code. An output tag code is output that is the same as the first version, if a fidelity criterion is met regarding the first version. If not met, the output tag code is instead a final version that is reconstructed from the first version, and also from any additionally optionally subsequently received versions. In some embodiments, an error recovery block includes a subcomponent fidelity criterion checking block that can determine whether the fidelity criterion is met, and a code reconstruction block that can derive the final version.

    摘要翻译： RFID系统，设备，软件和方法适于从RFID标签接收至少传达其代码的第一版本的波。 如果满足关于第一版本的保真度标准，输出与第一版本相同的输出标签代码。 如果不满足，则输出标签代码是从第一版本重建的最终版本，也可以是任何另外可选地随后接收的版本。 在一些实施例中，错误恢复块包括可以确定是否满足保真度准则的子组件保真度准则检查块，以及可以导出最终版本的代码重建块。

    Selecting RFID tags using memory-mapped parameters
    2.
    发明申请
    Selecting RFID tags using memory-mapped parameters 审中-公开
    使用存储器映射参数选择RFID标签

    公开(公告)号：US20060187031A1

    公开(公告)日：2006-08-24

    申请号：US11217616

    申请日：2005-08-31

    申请人： Vincent Moretti ,  William Colleran ,  Christopher Diorio

    发明人： Vincent Moretti ,  William Colleran ,  Christopher Diorio

    IPC分类号： G08B1/08 ,  G05B19/00 ,  H04Q5/22 ,  G08B13/14 ,  G08C19/16

    CPC分类号： G06Q10/08

    摘要： Radio frequency identification (RFID) tags are associated with sensors. Sensor data from a sensor is internally associated with a mask address, such as that of a memory. The tags receive commands by a reader, which can include selection commands. The selection commands can be for selecting according to the sensor data, by invoking the mask address. The selection commands can be further associated with a mask value, calling for setting a selection flag only by those tags whose sensor data meets a selection condition relative to the mask value. Therefore the reader can select a sub-population of tags from a larger population based on sensor data.

    摘要翻译： 射频识别（RFID）标签与传感器相关联。 来自传感器的传感器数据在内部与掩码地址相关联，例如存储器的掩码地址。 这些标签由读取器接收命令，其可以包括选择命令。 选择命令可以通过调用掩码地址来根据传感器数据进行选择。 选择命令可以进一步与掩码值相关联，仅要求传感器数据满足相对于掩码值的选择条件的标签来设置选择标志。 因此，读者可以基于传感器数据从更大的群体中选择标签的子群体。

    On wafer testing of RFID tag circuit with pseudo antenna signal
    3.
    发明申请
    On wafer testing of RFID tag circuit with pseudo antenna signal 审中-公开
    在具有伪天线信号的RFID标签电路的晶片测试上

    公开(公告)号：US20060125508A1

    公开(公告)日：2006-06-15

    申请号：US11325988

    申请日：2006-01-04

    申请人： Robert Glidden ,  William Colleran

    发明人： Robert Glidden ,  William Colleran

    IPC分类号： G01R31/26 ,  H04Q5/22 ,  G08B21/00 ,  G01R31/02

    CPC分类号： G01R31/2822 ,  G01R31/3025 ,  G06K19/0723

    摘要： An RFID tag circuit is described having a pair of signal paths that flow to an input of a demodulator of the RFID tag circuit. A first of the signal paths couple the demodulator to an antenna port of the RFID tag circuit. A second of the signal paths couple the demodulator to a location where a pseudo antenna signal first appears on the RFID tag circuit while the RFID tag circuit is being tested on-wafer.

    摘要翻译： 描述了RFID标签电路，其具有流向RFID标签电路的解调器的输入的一对信号路径。 信号路径中的第一个将解调器耦合到RFID标签电路的天线端口。 信号路径中的第二个将解调器耦合到伪天线信号首先出现在RFID标签电路上的位置，同时在RFID晶片上测试RFID标签电路。

    High-voltage LDMOSFET and applications therefor in standard CMOS
    4.
    发明申请
    High-voltage LDMOSFET and applications therefor in standard CMOS 有权
    高压LDMOSFET及其应用于标准CMOS

    公开(公告)号：US20050258461A1

    公开(公告)日：2005-11-24

    申请号：US10952708

    申请日：2004-09-28

    申请人： Bin Wang ,  William Colleran ,  Chih-Hsin Wang

    发明人： Bin Wang ,  William Colleran ,  Chih-Hsin Wang

    IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/76 ,  H01L29/78

    CPC分类号： H01L29/4983 ,  H01L29/0653 ,  H01L29/1045 ,  H01L29/42368 ,  H01L29/4916 ,  H01L29/7835

    摘要： A high-voltage LDMOSFET includes a semiconductor substrate, in which a gate well is formed. A source well and a drain well are formed on either side of the gate well, and include insulating regions within them that do not reach the full depth. An insulating layer is disposed on the substrate, covering the gate well and a portion of the source well and the drain well. A conductive gate is disposed on the insulating layer. Biasing wells are formed adjacent the source well and the drain well. A deep well is formed in the substrate such that it communicates with the biasing wells and the gate well, while extending under the source well and the drain well, such as to avoid them. Biasing contacts at the top of the biasing wells bias the deep well, and therefore also the gate well.

    摘要翻译： 高压LDMOSFET包括其中形成栅极阱的半导体衬底。 源极阱和漏极阱形成在栅极阱的任一侧上，并且在其内部包括未达到全部深度的绝缘区域。 绝缘层设置在衬底上，覆盖栅极阱以及源极阱和漏极阱的一部分。 导电栅极设置在绝缘层上。 在源阱和排水井附近形成偏置井。 在衬底中形成深阱，使得其在偏压井和浇口井下连通，同时在源井和排水井下方延伸，以避免它们。 偏置井顶部的偏置接触偏压深井，因此井也很好。

    ADAPTIVE RADIO TRANSCEIVER
    7.
    发明申请
    ADAPTIVE RADIO TRANSCEIVER 有权
    自适应无线收发器

    公开(公告)号：US20080045162A1

    公开(公告)日：2008-02-21

    申请号：US11780905

    申请日：2007-07-20

    申请人： Ahmadreza Rofougaran ,  Maryam Rofougaran ,  Meng-An Pan ,  Hung-Ming Chien ,  Shahla Khorram ,  William Colleran ,  Jacob Rael ,  Masood Syed ,  Brima Ibrahim ,  Stephen Wu ,  Shervin Moloudi

    发明人： Ahmadreza Rofougaran ,  Maryam Rofougaran ,  Meng-An Pan ,  Hung-Ming Chien ,  Shahla Khorram ,  William Colleran ,  Jacob Rael ,  Masood Syed ,  Brima Ibrahim ,  Stephen Wu ,  Shervin Moloudi

    IPC分类号： H04B1/38

    CPC分类号： H03D3/244 ,  H03J2200/04 ,  H03L7/0995 ,  H03L7/18 ,  H03L2207/12 ,  H04B1/707 ,  H04B1/713 ,  H04B17/101 ,  H04B17/14 ,  H04B17/19 ,  H04B17/20

    摘要： An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

    摘要翻译： 在说明书和附图中描述和示出的本发明的示例性实施例是具有接收器，发射器，本地振荡器（LO）发生器，控制器和自检单元的收发器。 所有这些组件都可以封装以集成到单个IC中，其中包括过滤器和电感器等组件。 用于接收机，发射机和LO发生器的自适应编程和校准的控制器。 自检单元产生用于确定接收机，发射机和LO发生器的增益，频率特性，选择性，本底噪声和失真特性。 要强调的是，该摘要被提供以符合要求摘要的规则，这将允许搜索者或其他读者快速确定技术公开的主题。 提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

    Inverter non-volatile memory cell and array system
    8.
    发明申请
    Inverter non-volatile memory cell and array system 有权
    逆变器非易失性存储单元和阵列系统

    公开(公告)号：US20060209598A1

    公开(公告)日：2006-09-21

    申请号：US11084214

    申请日：2005-03-17

    申请人： Bin Wang ,  Chih-Hsin Wang ,  William Colleran

    发明人： Bin Wang ,  Chih-Hsin Wang ,  William Colleran

    IPC分类号： G11C16/04

    CPC分类号： G11C16/10

    摘要： NVM arrays include rows and columns of NVM cells comprising a floating gate, dual transistor, inverter storage element. Supply voltage for selected storage elements is turned off during a programming and an erase mode. Isolation transistors for each NVM cell or for each row of NVM cells may be used to control the supply voltage.

    摘要翻译： NVM阵列包括包括浮动栅极，双晶体管，逆变器存储元件的NVM单元的行和列。 在编程和擦除模式期间，所选存储元件的电源电压关闭。 可以使用每个NVM单元或每行NVM单元的隔离晶体管来控制电源电压。

    RFID joint acquisition of time sync and timebase
    10.
    发明申请
    RFID joint acquisition of time sync and timebase 有权
    RFID联合获取时间同步和时基

    公开(公告)号：US20050269408A1

    公开(公告)日：2005-12-08

    申请号：US11136948

    申请日：2005-05-24

    申请人： Aanand Esterberg ,  William Colleran ,  Scott Cooper

    发明人： Aanand Esterberg ,  William Colleran ,  Scott Cooper

    IPC分类号： G06K7/00

    CPC分类号： G06K7/0008

    摘要： Systems and methods to determine timebase and timing (i.e., time sync) of received signals in RFID systems. Multiple matched filters corresponding to multiple timebases are used to receive the preambles of signals received from RFID tags. The multiple matched filters define a range of expected timebases of the received signals. The matched filter with the maximum output signal peak is used to derive the timebase and timing of the received signal. Viterbi techniques can be used in determining the timebase and timing to incorporate a portion of the data signal in addition to the preamble. Reconfigurable matched filters can be used so that after a preliminary timebase is determined as described above, the matched filters can be reconfigured to define a new smaller range centered about the preliminary timebase. This allows the timebase to be determined with finer resolution when another preamble portion is received.

    摘要翻译： 确定RFID系统中接收信号的时基和定时（即，时间同步）的系统和方法。 对应于多个时基的多个匹配滤波器被用于接收从RFID标签接收的信号的前导码。 多个匹配滤波器定义了接收信号的预期时基的范围。 具有最大输出信号峰值的匹配滤波器用于导出接收信号的时基和定时。 除了前导码之外，维特比技术可用于确定并入数据信号的一部分的时基和定时。 可以使用可重配置匹配滤波器，使得在如上所述确定初步时基之后，可以重新配置匹配滤波器以定义以初步时基为中心的新的较小范围。 这允许当接收另一个前同步码部分时，以更精细的分辨率确定时基。